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authorAnton Vorontsov <avorontsov@mvista.com>2010-04-15 14:36:31 -0400
committerKumar Gala <galak@kernel.crashing.org>2010-05-17 11:52:45 -0400
commit7541ef78c3b83e906b580f005207000545cf770a (patch)
tree1e9437cbaed709099a790d49d9959aa048445d24 /arch/powerpc/boot
parent18f397c838e50bb2b8d581dcfc73f3d35ee5b1e2 (diff)
powerpc/85xx: Add eTSEC 2.0 support for P1020RDB boards
This patch adds support for eTSEC 2.0 as found in P1020. The changes include introduction of the group nodes for the etsec nodes. Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/p1020rdb.dts119
1 files changed, 119 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index df5269093af8..49848c545d86 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -19,6 +19,9 @@
19 aliases { 19 aliases {
20 serial0 = &serial0; 20 serial0 = &serial0;
21 serial1 = &serial1; 21 serial1 = &serial1;
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24 ethernet2 = &enet2;
22 pci0 = &pci0; 25 pci0 = &pci0;
23 pci1 = &pci1; 26 pci1 = &pci1;
24 }; 27 };
@@ -346,6 +349,122 @@
346 }; 349 };
347 }; 350 };
348 351
352 mdio@24000 {
353 #address-cells = <1>;
354 #size-cells = <0>;
355 compatible = "fsl,etsec2-mdio";
356 reg = <0x24000 0x1000 0xb0030 0x4>;
357
358 phy0: ethernet-phy@0 {
359 interrupt-parent = <&mpic>;
360 interrupts = <3 1>;
361 reg = <0x0>;
362 };
363
364 phy1: ethernet-phy@1 {
365 interrupt-parent = <&mpic>;
366 interrupts = <2 1>;
367 reg = <0x1>;
368 };
369 };
370
371 mdio@25000 {
372 #address-cells = <1>;
373 #size-cells = <0>;
374 compatible = "fsl,etsec2-tbi";
375 reg = <0x25000 0x1000 0xb1030 0x4>;
376
377 tbi0: tbi-phy@11 {
378 reg = <0x11>;
379 device_type = "tbi-phy";
380 };
381 };
382
383 enet0: ethernet@b0000 {
384 #address-cells = <1>;
385 #size-cells = <1>;
386 device_type = "network";
387 model = "eTSEC";
388 compatible = "fsl,etsec2";
389 fsl,num_rx_queues = <0x8>;
390 fsl,num_tx_queues = <0x8>;
391 local-mac-address = [ 00 00 00 00 00 00 ];
392 interrupt-parent = <&mpic>;
393 fixed-link = <1 1 1000 0 0>;
394 phy-connection-type = "rgmii-id";
395
396 queue-group@0 {
397 #address-cells = <1>;
398 #size-cells = <1>;
399 reg = <0xb0000 0x1000>;
400 interrupts = <29 2 30 2 34 2>;
401 };
402
403 queue-group@1 {
404 #address-cells = <1>;
405 #size-cells = <1>;
406 reg = <0xb4000 0x1000>;
407 interrupts = <17 2 18 2 24 2>;
408 };
409 };
410
411 enet1: ethernet@b1000 {
412 #address-cells = <1>;
413 #size-cells = <1>;
414 device_type = "network";
415 model = "eTSEC";
416 compatible = "fsl,etsec2";
417 fsl,num_rx_queues = <0x8>;
418 fsl,num_tx_queues = <0x8>;
419 local-mac-address = [ 00 00 00 00 00 00 ];
420 interrupt-parent = <&mpic>;
421 phy-handle = <&phy0>;
422 tbi-handle = <&tbi0>;
423 phy-connection-type = "sgmii";
424
425 queue-group@0 {
426 #address-cells = <1>;
427 #size-cells = <1>;
428 reg = <0xb1000 0x1000>;
429 interrupts = <35 2 36 2 40 2>;
430 };
431
432 queue-group@1 {
433 #address-cells = <1>;
434 #size-cells = <1>;
435 reg = <0xb5000 0x1000>;
436 interrupts = <51 2 52 2 67 2>;
437 };
438 };
439
440 enet2: ethernet@b2000 {
441 #address-cells = <1>;
442 #size-cells = <1>;
443 device_type = "network";
444 model = "eTSEC";
445 compatible = "fsl,etsec2";
446 fsl,num_rx_queues = <0x8>;
447 fsl,num_tx_queues = <0x8>;
448 local-mac-address = [ 00 00 00 00 00 00 ];
449 interrupt-parent = <&mpic>;
450 phy-handle = <&phy1>;
451 phy-connection-type = "rgmii-id";
452
453 queue-group@0 {
454 #address-cells = <1>;
455 #size-cells = <1>;
456 reg = <0xb2000 0x1000>;
457 interrupts = <31 2 32 2 33 2>;
458 };
459
460 queue-group@1 {
461 #address-cells = <1>;
462 #size-cells = <1>;
463 reg = <0xb6000 0x1000>;
464 interrupts = <25 2 26 2 27 2>;
465 };
466 };
467
349 usb@22000 { 468 usb@22000 {
350 #address-cells = <1>; 469 #address-cells = <1>;
351 #size-cells = <0>; 470 #size-cells = <0>;