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authorTirumala Marri <tmarri@apm.com>2010-09-13 09:26:11 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2010-10-13 08:47:09 -0400
commit6edc323db720c65b9e6a770b4bed98f251dd49f0 (patch)
treeef5364409ee8b38e8e851700021a2c6b065cdcf8 /arch/powerpc/boot
parent4108d9ba9091c55cfb968d42dd7dcae9a098b876 (diff)
powerpc/44x: Add support for the AMCC APM821xx SoC
This patch adds CPU, device tree, defconfig and bluestone board support for APM821xx SoC. Signed-off-by: Tirumala R Marri <tmarri@apm.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/bluestone.dts254
1 files changed, 254 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
new file mode 100644
index 000000000000..9bb3d72c0e5a
--- /dev/null
+++ b/arch/powerpc/boot/dts/bluestone.dts
@@ -0,0 +1,254 @@
1/*
2 * Device Tree for Bluestone (APM821xx) board.
3 *
4 * Copyright (c) 2010, Applied Micro Circuits Corporation
5 * Author: Tirumala R Marri <tmarri@apm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 *
22 */
23
24/dts-v1/;
25
26/ {
27 #address-cells = <2>;
28 #size-cells = <1>;
29 model = "apm,bluestone";
30 compatible = "apm,bluestone";
31 dcr-parent = <&{/cpus/cpu@0}>;
32
33 aliases {
34 ethernet0 = &EMAC0;
35 serial0 = &UART0;
36 serial1 = &UART1;
37 };
38
39 cpus {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 cpu@0 {
44 device_type = "cpu";
45 model = "PowerPC,apm821xx";
46 reg = <0x00000000>;
47 clock-frequency = <0>; /* Filled in by U-Boot */
48 timebase-frequency = <0>; /* Filled in by U-Boot */
49 i-cache-line-size = <32>;
50 d-cache-line-size = <32>;
51 i-cache-size = <32768>;
52 d-cache-size = <32768>;
53 dcr-controller;
54 dcr-access-method = "native";
55 next-level-cache = <&L2C0>;
56 };
57 };
58
59 memory {
60 device_type = "memory";
61 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
62 };
63
64 UIC0: interrupt-controller0 {
65 compatible = "ibm,uic";
66 interrupt-controller;
67 cell-index = <0>;
68 dcr-reg = <0x0c0 0x009>;
69 #address-cells = <0>;
70 #size-cells = <0>;
71 #interrupt-cells = <2>;
72 };
73
74 UIC1: interrupt-controller1 {
75 compatible = "ibm,uic";
76 interrupt-controller;
77 cell-index = <1>;
78 dcr-reg = <0x0d0 0x009>;
79 #address-cells = <0>;
80 #size-cells = <0>;
81 #interrupt-cells = <2>;
82 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
83 interrupt-parent = <&UIC0>;
84 };
85
86 UIC2: interrupt-controller2 {
87 compatible = "ibm,uic";
88 interrupt-controller;
89 cell-index = <2>;
90 dcr-reg = <0x0e0 0x009>;
91 #address-cells = <0>;
92 #size-cells = <0>;
93 #interrupt-cells = <2>;
94 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
95 interrupt-parent = <&UIC0>;
96 };
97
98 UIC3: interrupt-controller3 {
99 compatible = "ibm,uic";
100 interrupt-controller;
101 cell-index = <3>;
102 dcr-reg = <0x0f0 0x009>;
103 #address-cells = <0>;
104 #size-cells = <0>;
105 #interrupt-cells = <2>;
106 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
107 interrupt-parent = <&UIC0>;
108 };
109
110 SDR0: sdr {
111 compatible = "ibm,sdr-apm821xx";
112 dcr-reg = <0x00e 0x002>;
113 };
114
115 CPR0: cpr {
116 compatible = "ibm,cpr-apm821xx";
117 dcr-reg = <0x00c 0x002>;
118 };
119
120 plb {
121 compatible = "ibm,plb4";
122 #address-cells = <2>;
123 #size-cells = <1>;
124 ranges;
125 clock-frequency = <0>; /* Filled in by U-Boot */
126
127 SDRAM0: sdram {
128 compatible = "ibm,sdram-apm821xx";
129 dcr-reg = <0x010 0x002>;
130 };
131
132 MAL0: mcmal {
133 compatible = "ibm,mcmal2";
134 descriptor-memory = "ocm";
135 dcr-reg = <0x180 0x062>;
136 num-tx-chans = <1>;
137 num-rx-chans = <1>;
138 #address-cells = <0>;
139 #size-cells = <0>;
140 interrupt-parent = <&UIC2>;
141 interrupts = < /*TXEOB*/ 0x6 0x4
142 /*RXEOB*/ 0x7 0x4
143 /*SERR*/ 0x3 0x4
144 /*TXDE*/ 0x4 0x4
145 /*RXDE*/ 0x5 0x4
146 };
147
148 POB0: opb {
149 compatible = "ibm,opb";
150 #address-cells = <1>;
151 #size-cells = <1>;
152 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
153 clock-frequency = <0>; /* Filled in by U-Boot */
154
155 EBC0: ebc {
156 compatible = "ibm,ebc";
157 dcr-reg = <0x012 0x002>;
158 #address-cells = <2>;
159 #size-cells = <1>;
160 clock-frequency = <0>; /* Filled in by U-Boot */
161 /* ranges property is supplied by U-Boot */
162 ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;
163 interrupts = <0x6 0x4>;
164 interrupt-parent = <&UIC1>;
165
166 nor_flash@0,0 {
167 compatible = "amd,s29gl512n", "cfi-flash";
168 bank-width = <2>;
169 reg = <0x00000000 0x00000000 0x00400000>;
170 #address-cells = <1>;
171 #size-cells = <1>;
172 partition@0 {
173 label = "kernel";
174 reg = <0x00000000 0x00180000>;
175 };
176 partition@180000 {
177 label = "env";
178 reg = <0x00180000 0x00020000>;
179 };
180 partition@1a0000 {
181 label = "u-boot";
182 reg = <0x001a0000 0x00060000>;
183 };
184 };
185 }
186
187 UART0: serial@ef600300 {
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <0xef600300 0x00000008>;
191 virtual-reg = <0xef600300>;
192 clock-frequency = <0>; /* Filled in by U-Boot */
193 current-speed = <0>; /* Filled in by U-Boot */
194 interrupt-parent = <&UIC1>;
195 interrupts = <0x1 0x4>;
196 };
197
198 IIC0: i2c@ef600700 {
199 compatible = "ibm,iic";
200 reg = <0xef600700 0x00000014>;
201 interrupt-parent = <&UIC0>;
202 interrupts = <0x2 0x4>;
203 };
204
205 IIC1: i2c@ef600800 {
206 compatible = "ibm,iic";
207 reg = <0xef600800 0x00000014>;
208 interrupt-parent = <&UIC0>;
209 interrupts = <0x3 0x4>;
210 };
211
212 RGMII0: emac-rgmii@ef601500 {
213 compatible = "ibm,rgmii";
214 reg = <0xef601500 0x00000008>;
215 has-mdio;
216 };
217
218 TAH0: emac-tah@ef601350 {
219 compatible = "ibm,tah";
220 reg = <0xef601350 0x00000030>;
221 };
222
223 EMAC0: ethernet@ef600c00 {
224 device_type = "network";
225 compatible = "ibm,emac4sync";
226 interrupt-parent = <&EMAC0>;
227 interrupts = <0x0 0x1>;
228 #interrupt-cells = <1>;
229 #address-cells = <0>;
230 #size-cells = <0>;
231 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
232 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
233 reg = <0xef600c00 0x000000c4>;
234 local-mac-address = [000000000000]; /* Filled in by U-Boot */
235 mal-device = <&MAL0>;
236 mal-tx-channel = <0>;
237 mal-rx-channel = <0>;
238 cell-index = <0>;
239 max-frame-size = <9000>;
240 rx-fifo-size = <16384>;
241 tx-fifo-size = <2048>;
242 phy-mode = "rgmii";
243 phy-map = <0x00000000>;
244 rgmii-device = <&RGMII0>;
245 rgmii-channel = <0>;
246 tah-device = <&TAH0>;
247 tah-channel = <0>;
248 has-inverted-stacr-oc;
249 has-new-stacr-staopc;
250 };
251 };
252
253 };
254};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-02 14:07:52 -0500