diff options
author | Becky Bruce <beckyb@kernel.crashing.org> | 2009-04-20 12:26:47 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2009-05-19 01:46:17 -0400 |
commit | abd7d4837fbdd9bf0cf0f3efefa1312d6fa3082c (patch) | |
tree | bb779fb3a1498e2767ee58c206df204e76812127 /arch/powerpc/boot | |
parent | 9bf8b2741e6cd2e5ee98bfc050e3694890fdc811 (diff) |
powerpc/86xx: Add 36-bit device tree for mpc8641hpcn
The new dts places most of the devices in physical address space
above 32-bits, which allows us to have more than 4GB of RAM present.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts | 597 |
1 files changed, 597 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts new file mode 100644 index 000000000000..b5dc94204d03 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts | |||
@@ -0,0 +1,597 @@ | |||
1 | /* | ||
2 | * MPC8641 HPCN Device Tree Source | ||
3 | * | ||
4 | * Copyright 2008-2009 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "MPC8641HPCN"; | ||
16 | compatible = "fsl,mpc8641hpcn"; | ||
17 | #address-cells = <2>; | ||
18 | #size-cells = <2>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &enet0; | ||
22 | ethernet1 = &enet1; | ||
23 | ethernet2 = &enet2; | ||
24 | ethernet3 = &enet3; | ||
25 | serial0 = &serial0; | ||
26 | serial1 = &serial1; | ||
27 | pci0 = &pci0; | ||
28 | pci1 = &pci1; | ||
29 | }; | ||
30 | |||
31 | cpus { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | PowerPC,8641@0 { | ||
36 | device_type = "cpu"; | ||
37 | reg = <0>; | ||
38 | d-cache-line-size = <32>; // 32 bytes | ||
39 | i-cache-line-size = <32>; // 32 bytes | ||
40 | d-cache-size = <32768>; // L1, 32K | ||
41 | i-cache-size = <32768>; // L1, 32K | ||
42 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
43 | bus-frequency = <0>; // From uboot | ||
44 | clock-frequency = <0>; // From uboot | ||
45 | }; | ||
46 | PowerPC,8641@1 { | ||
47 | device_type = "cpu"; | ||
48 | reg = <1>; | ||
49 | d-cache-line-size = <32>; // 32 bytes | ||
50 | i-cache-line-size = <32>; // 32 bytes | ||
51 | d-cache-size = <32768>; // L1, 32K | ||
52 | i-cache-size = <32768>; // L1, 32K | ||
53 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
54 | bus-frequency = <0>; // From uboot | ||
55 | clock-frequency = <0>; // From uboot | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | memory { | ||
60 | device_type = "memory"; | ||
61 | reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0 | ||
62 | }; | ||
63 | |||
64 | localbus@fffe05000 { | ||
65 | #address-cells = <2>; | ||
66 | #size-cells = <1>; | ||
67 | compatible = "fsl,mpc8641-localbus", "simple-bus"; | ||
68 | reg = <0x0f 0xffe05000 0x0 0x1000>; | ||
69 | interrupts = <19 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | |||
72 | ranges = <0 0 0xf 0xef800000 0x00800000 | ||
73 | 2 0 0xf 0xffdf8000 0x00008000 | ||
74 | 3 0 0xf 0xffdf0000 0x00008000>; | ||
75 | |||
76 | flash@0,0 { | ||
77 | compatible = "cfi-flash"; | ||
78 | reg = <0 0 0x00800000>; | ||
79 | bank-width = <2>; | ||
80 | device-width = <2>; | ||
81 | #address-cells = <1>; | ||
82 | #size-cells = <1>; | ||
83 | partition@0 { | ||
84 | label = "kernel"; | ||
85 | reg = <0x00000000 0x00300000>; | ||
86 | }; | ||
87 | partition@300000 { | ||
88 | label = "firmware b"; | ||
89 | reg = <0x00300000 0x00100000>; | ||
90 | read-only; | ||
91 | }; | ||
92 | partition@400000 { | ||
93 | label = "fs"; | ||
94 | reg = <0x00400000 0x00300000>; | ||
95 | }; | ||
96 | partition@700000 { | ||
97 | label = "firmware a"; | ||
98 | reg = <0x00700000 0x00100000>; | ||
99 | read-only; | ||
100 | }; | ||
101 | }; | ||
102 | }; | ||
103 | |||
104 | soc8641@fffe00000 { | ||
105 | #address-cells = <1>; | ||
106 | #size-cells = <1>; | ||
107 | device_type = "soc"; | ||
108 | compatible = "simple-bus"; | ||
109 | ranges = <0x00000000 0x0f 0xffe00000 0x00100000>; | ||
110 | reg = <0x0f 0xffe00000 0x0 0x00001000>; // CCSRBAR | ||
111 | bus-frequency = <0>; | ||
112 | |||
113 | i2c@3000 { | ||
114 | #address-cells = <1>; | ||
115 | #size-cells = <0>; | ||
116 | cell-index = <0>; | ||
117 | compatible = "fsl-i2c"; | ||
118 | reg = <0x3000 0x100>; | ||
119 | interrupts = <43 2>; | ||
120 | interrupt-parent = <&mpic>; | ||
121 | dfsrr; | ||
122 | }; | ||
123 | |||
124 | i2c@3100 { | ||
125 | #address-cells = <1>; | ||
126 | #size-cells = <0>; | ||
127 | cell-index = <1>; | ||
128 | compatible = "fsl-i2c"; | ||
129 | reg = <0x3100 0x100>; | ||
130 | interrupts = <43 2>; | ||
131 | interrupt-parent = <&mpic>; | ||
132 | dfsrr; | ||
133 | }; | ||
134 | |||
135 | dma@21300 { | ||
136 | #address-cells = <1>; | ||
137 | #size-cells = <1>; | ||
138 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | ||
139 | reg = <0x21300 0x4>; | ||
140 | ranges = <0x0 0x21100 0x200>; | ||
141 | cell-index = <0>; | ||
142 | dma-channel@0 { | ||
143 | compatible = "fsl,mpc8641-dma-channel", | ||
144 | "fsl,eloplus-dma-channel"; | ||
145 | reg = <0x0 0x80>; | ||
146 | cell-index = <0>; | ||
147 | interrupt-parent = <&mpic>; | ||
148 | interrupts = <20 2>; | ||
149 | }; | ||
150 | dma-channel@80 { | ||
151 | compatible = "fsl,mpc8641-dma-channel", | ||
152 | "fsl,eloplus-dma-channel"; | ||
153 | reg = <0x80 0x80>; | ||
154 | cell-index = <1>; | ||
155 | interrupt-parent = <&mpic>; | ||
156 | interrupts = <21 2>; | ||
157 | }; | ||
158 | dma-channel@100 { | ||
159 | compatible = "fsl,mpc8641-dma-channel", | ||
160 | "fsl,eloplus-dma-channel"; | ||
161 | reg = <0x100 0x80>; | ||
162 | cell-index = <2>; | ||
163 | interrupt-parent = <&mpic>; | ||
164 | interrupts = <22 2>; | ||
165 | }; | ||
166 | dma-channel@180 { | ||
167 | compatible = "fsl,mpc8641-dma-channel", | ||
168 | "fsl,eloplus-dma-channel"; | ||
169 | reg = <0x180 0x80>; | ||
170 | cell-index = <3>; | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <23 2>; | ||
173 | }; | ||
174 | }; | ||
175 | |||
176 | enet0: ethernet@24000 { | ||
177 | #address-cells = <1>; | ||
178 | #size-cells = <1>; | ||
179 | cell-index = <0>; | ||
180 | device_type = "network"; | ||
181 | model = "TSEC"; | ||
182 | compatible = "gianfar"; | ||
183 | reg = <0x24000 0x1000>; | ||
184 | ranges = <0x0 0x24000 0x1000>; | ||
185 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
186 | interrupts = <29 2 30 2 34 2>; | ||
187 | interrupt-parent = <&mpic>; | ||
188 | tbi-handle = <&tbi0>; | ||
189 | phy-handle = <&phy0>; | ||
190 | phy-connection-type = "rgmii-id"; | ||
191 | |||
192 | mdio@520 { | ||
193 | #address-cells = <1>; | ||
194 | #size-cells = <0>; | ||
195 | compatible = "fsl,gianfar-mdio"; | ||
196 | reg = <0x520 0x20>; | ||
197 | |||
198 | phy0: ethernet-phy@0 { | ||
199 | interrupt-parent = <&mpic>; | ||
200 | interrupts = <10 1>; | ||
201 | reg = <0>; | ||
202 | device_type = "ethernet-phy"; | ||
203 | }; | ||
204 | phy1: ethernet-phy@1 { | ||
205 | interrupt-parent = <&mpic>; | ||
206 | interrupts = <10 1>; | ||
207 | reg = <1>; | ||
208 | device_type = "ethernet-phy"; | ||
209 | }; | ||
210 | phy2: ethernet-phy@2 { | ||
211 | interrupt-parent = <&mpic>; | ||
212 | interrupts = <10 1>; | ||
213 | reg = <2>; | ||
214 | device_type = "ethernet-phy"; | ||
215 | }; | ||
216 | phy3: ethernet-phy@3 { | ||
217 | interrupt-parent = <&mpic>; | ||
218 | interrupts = <10 1>; | ||
219 | reg = <3>; | ||
220 | device_type = "ethernet-phy"; | ||
221 | }; | ||
222 | tbi0: tbi-phy@11 { | ||
223 | reg = <0x11>; | ||
224 | device_type = "tbi-phy"; | ||
225 | }; | ||
226 | }; | ||
227 | }; | ||
228 | |||
229 | enet1: ethernet@25000 { | ||
230 | #address-cells = <1>; | ||
231 | #size-cells = <1>; | ||
232 | cell-index = <1>; | ||
233 | device_type = "network"; | ||
234 | model = "TSEC"; | ||
235 | compatible = "gianfar"; | ||
236 | reg = <0x25000 0x1000>; | ||
237 | ranges = <0x0 0x25000 0x1000>; | ||
238 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
239 | interrupts = <35 2 36 2 40 2>; | ||
240 | interrupt-parent = <&mpic>; | ||
241 | tbi-handle = <&tbi1>; | ||
242 | phy-handle = <&phy1>; | ||
243 | phy-connection-type = "rgmii-id"; | ||
244 | |||
245 | mdio@520 { | ||
246 | #address-cells = <1>; | ||
247 | #size-cells = <0>; | ||
248 | compatible = "fsl,gianfar-tbi"; | ||
249 | reg = <0x520 0x20>; | ||
250 | |||
251 | tbi1: tbi-phy@11 { | ||
252 | reg = <0x11>; | ||
253 | device_type = "tbi-phy"; | ||
254 | }; | ||
255 | }; | ||
256 | }; | ||
257 | |||
258 | enet2: ethernet@26000 { | ||
259 | #address-cells = <1>; | ||
260 | #size-cells = <1>; | ||
261 | cell-index = <2>; | ||
262 | device_type = "network"; | ||
263 | model = "TSEC"; | ||
264 | compatible = "gianfar"; | ||
265 | reg = <0x26000 0x1000>; | ||
266 | ranges = <0x0 0x26000 0x1000>; | ||
267 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
268 | interrupts = <31 2 32 2 33 2>; | ||
269 | interrupt-parent = <&mpic>; | ||
270 | tbi-handle = <&tbi2>; | ||
271 | phy-handle = <&phy2>; | ||
272 | phy-connection-type = "rgmii-id"; | ||
273 | |||
274 | mdio@520 { | ||
275 | #address-cells = <1>; | ||
276 | #size-cells = <0>; | ||
277 | compatible = "fsl,gianfar-tbi"; | ||
278 | reg = <0x520 0x20>; | ||
279 | |||
280 | tbi2: tbi-phy@11 { | ||
281 | reg = <0x11>; | ||
282 | device_type = "tbi-phy"; | ||
283 | }; | ||
284 | }; | ||
285 | }; | ||
286 | |||
287 | enet3: ethernet@27000 { | ||
288 | #address-cells = <1>; | ||
289 | #size-cells = <1>; | ||
290 | cell-index = <3>; | ||
291 | device_type = "network"; | ||
292 | model = "TSEC"; | ||
293 | compatible = "gianfar"; | ||
294 | reg = <0x27000 0x1000>; | ||
295 | ranges = <0x0 0x27000 0x1000>; | ||
296 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
297 | interrupts = <37 2 38 2 39 2>; | ||
298 | interrupt-parent = <&mpic>; | ||
299 | tbi-handle = <&tbi3>; | ||
300 | phy-handle = <&phy3>; | ||
301 | phy-connection-type = "rgmii-id"; | ||
302 | |||
303 | mdio@520 { | ||
304 | #address-cells = <1>; | ||
305 | #size-cells = <0>; | ||
306 | compatible = "fsl,gianfar-tbi"; | ||
307 | reg = <0x520 0x20>; | ||
308 | |||
309 | tbi3: tbi-phy@11 { | ||
310 | reg = <0x11>; | ||
311 | device_type = "tbi-phy"; | ||
312 | }; | ||
313 | }; | ||
314 | }; | ||
315 | |||
316 | serial0: serial@4500 { | ||
317 | cell-index = <0>; | ||
318 | device_type = "serial"; | ||
319 | compatible = "ns16550"; | ||
320 | reg = <0x4500 0x100>; | ||
321 | clock-frequency = <0>; | ||
322 | interrupts = <42 2>; | ||
323 | interrupt-parent = <&mpic>; | ||
324 | }; | ||
325 | |||
326 | serial1: serial@4600 { | ||
327 | cell-index = <1>; | ||
328 | device_type = "serial"; | ||
329 | compatible = "ns16550"; | ||
330 | reg = <0x4600 0x100>; | ||
331 | clock-frequency = <0>; | ||
332 | interrupts = <28 2>; | ||
333 | interrupt-parent = <&mpic>; | ||
334 | }; | ||
335 | |||
336 | mpic: pic@40000 { | ||
337 | interrupt-controller; | ||
338 | #address-cells = <0>; | ||
339 | #interrupt-cells = <2>; | ||
340 | reg = <0x40000 0x40000>; | ||
341 | compatible = "chrp,open-pic"; | ||
342 | device_type = "open-pic"; | ||
343 | }; | ||
344 | |||
345 | global-utilities@e0000 { | ||
346 | compatible = "fsl,mpc8641-guts"; | ||
347 | reg = <0xe0000 0x1000>; | ||
348 | fsl,has-rstcr; | ||
349 | }; | ||
350 | }; | ||
351 | |||
352 | pci0: pcie@fffe08000 { | ||
353 | cell-index = <0>; | ||
354 | compatible = "fsl,mpc8641-pcie"; | ||
355 | device_type = "pci"; | ||
356 | #interrupt-cells = <1>; | ||
357 | #size-cells = <2>; | ||
358 | #address-cells = <3>; | ||
359 | reg = <0x0f 0xffe08000 0x0 0x1000>; | ||
360 | bus-range = <0x0 0xff>; | ||
361 | ranges = <0x02000000 0x0 0xc0000000 0x0c 0x00000000 0x0 0x20000000 | ||
362 | 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>; | ||
363 | clock-frequency = <33333333>; | ||
364 | interrupt-parent = <&mpic>; | ||
365 | interrupts = <24 2>; | ||
366 | interrupt-map-mask = <0xff00 0 0 7>; | ||
367 | interrupt-map = < | ||
368 | /* IDSEL 0x11 func 0 - PCI slot 1 */ | ||
369 | 0x8800 0 0 1 &mpic 2 1 | ||
370 | 0x8800 0 0 2 &mpic 3 1 | ||
371 | 0x8800 0 0 3 &mpic 4 1 | ||
372 | 0x8800 0 0 4 &mpic 1 1 | ||
373 | |||
374 | /* IDSEL 0x11 func 1 - PCI slot 1 */ | ||
375 | 0x8900 0 0 1 &mpic 2 1 | ||
376 | 0x8900 0 0 2 &mpic 3 1 | ||
377 | 0x8900 0 0 3 &mpic 4 1 | ||
378 | 0x8900 0 0 4 &mpic 1 1 | ||
379 | |||
380 | /* IDSEL 0x11 func 2 - PCI slot 1 */ | ||
381 | 0x8a00 0 0 1 &mpic 2 1 | ||
382 | 0x8a00 0 0 2 &mpic 3 1 | ||
383 | 0x8a00 0 0 3 &mpic 4 1 | ||
384 | 0x8a00 0 0 4 &mpic 1 1 | ||
385 | |||
386 | /* IDSEL 0x11 func 3 - PCI slot 1 */ | ||
387 | 0x8b00 0 0 1 &mpic 2 1 | ||
388 | 0x8b00 0 0 2 &mpic 3 1 | ||
389 | 0x8b00 0 0 3 &mpic 4 1 | ||
390 | 0x8b00 0 0 4 &mpic 1 1 | ||
391 | |||
392 | /* IDSEL 0x11 func 4 - PCI slot 1 */ | ||
393 | 0x8c00 0 0 1 &mpic 2 1 | ||
394 | 0x8c00 0 0 2 &mpic 3 1 | ||
395 | 0x8c00 0 0 3 &mpic 4 1 | ||
396 | 0x8c00 0 0 4 &mpic 1 1 | ||
397 | |||
398 | /* IDSEL 0x11 func 5 - PCI slot 1 */ | ||
399 | 0x8d00 0 0 1 &mpic 2 1 | ||
400 | 0x8d00 0 0 2 &mpic 3 1 | ||
401 | 0x8d00 0 0 3 &mpic 4 1 | ||
402 | 0x8d00 0 0 4 &mpic 1 1 | ||
403 | |||
404 | /* IDSEL 0x11 func 6 - PCI slot 1 */ | ||
405 | 0x8e00 0 0 1 &mpic 2 1 | ||
406 | 0x8e00 0 0 2 &mpic 3 1 | ||
407 | 0x8e00 0 0 3 &mpic 4 1 | ||
408 | 0x8e00 0 0 4 &mpic 1 1 | ||
409 | |||
410 | /* IDSEL 0x11 func 7 - PCI slot 1 */ | ||
411 | 0x8f00 0 0 1 &mpic 2 1 | ||
412 | 0x8f00 0 0 2 &mpic 3 1 | ||
413 | 0x8f00 0 0 3 &mpic 4 1 | ||
414 | 0x8f00 0 0 4 &mpic 1 1 | ||
415 | |||
416 | /* IDSEL 0x12 func 0 - PCI slot 2 */ | ||
417 | 0x9000 0 0 1 &mpic 3 1 | ||
418 | 0x9000 0 0 2 &mpic 4 1 | ||
419 | 0x9000 0 0 3 &mpic 1 1 | ||
420 | 0x9000 0 0 4 &mpic 2 1 | ||
421 | |||
422 | /* IDSEL 0x12 func 1 - PCI slot 2 */ | ||
423 | 0x9100 0 0 1 &mpic 3 1 | ||
424 | 0x9100 0 0 2 &mpic 4 1 | ||
425 | 0x9100 0 0 3 &mpic 1 1 | ||
426 | 0x9100 0 0 4 &mpic 2 1 | ||
427 | |||
428 | /* IDSEL 0x12 func 2 - PCI slot 2 */ | ||
429 | 0x9200 0 0 1 &mpic 3 1 | ||
430 | 0x9200 0 0 2 &mpic 4 1 | ||
431 | 0x9200 0 0 3 &mpic 1 1 | ||
432 | 0x9200 0 0 4 &mpic 2 1 | ||
433 | |||
434 | /* IDSEL 0x12 func 3 - PCI slot 2 */ | ||
435 | 0x9300 0 0 1 &mpic 3 1 | ||
436 | 0x9300 0 0 2 &mpic 4 1 | ||
437 | 0x9300 0 0 3 &mpic 1 1 | ||
438 | 0x9300 0 0 4 &mpic 2 1 | ||
439 | |||
440 | /* IDSEL 0x12 func 4 - PCI slot 2 */ | ||
441 | 0x9400 0 0 1 &mpic 3 1 | ||
442 | 0x9400 0 0 2 &mpic 4 1 | ||
443 | 0x9400 0 0 3 &mpic 1 1 | ||
444 | 0x9400 0 0 4 &mpic 2 1 | ||
445 | |||
446 | /* IDSEL 0x12 func 5 - PCI slot 2 */ | ||
447 | 0x9500 0 0 1 &mpic 3 1 | ||
448 | 0x9500 0 0 2 &mpic 4 1 | ||
449 | 0x9500 0 0 3 &mpic 1 1 | ||
450 | 0x9500 0 0 4 &mpic 2 1 | ||
451 | |||
452 | /* IDSEL 0x12 func 6 - PCI slot 2 */ | ||
453 | 0x9600 0 0 1 &mpic 3 1 | ||
454 | 0x9600 0 0 2 &mpic 4 1 | ||
455 | 0x9600 0 0 3 &mpic 1 1 | ||
456 | 0x9600 0 0 4 &mpic 2 1 | ||
457 | |||
458 | /* IDSEL 0x12 func 7 - PCI slot 2 */ | ||
459 | 0x9700 0 0 1 &mpic 3 1 | ||
460 | 0x9700 0 0 2 &mpic 4 1 | ||
461 | 0x9700 0 0 3 &mpic 1 1 | ||
462 | 0x9700 0 0 4 &mpic 2 1 | ||
463 | |||
464 | // IDSEL 0x1c USB | ||
465 | 0xe000 0 0 1 &i8259 12 2 | ||
466 | 0xe100 0 0 2 &i8259 9 2 | ||
467 | 0xe200 0 0 3 &i8259 10 2 | ||
468 | 0xe300 0 0 4 &i8259 11 2 | ||
469 | |||
470 | // IDSEL 0x1d Audio | ||
471 | 0xe800 0 0 1 &i8259 6 2 | ||
472 | |||
473 | // IDSEL 0x1e Legacy | ||
474 | 0xf000 0 0 1 &i8259 7 2 | ||
475 | 0xf100 0 0 1 &i8259 7 2 | ||
476 | |||
477 | // IDSEL 0x1f IDE/SATA | ||
478 | 0xf800 0 0 1 &i8259 14 2 | ||
479 | 0xf900 0 0 1 &i8259 5 2 | ||
480 | >; | ||
481 | |||
482 | pcie@0 { | ||
483 | reg = <0 0 0 0 0>; | ||
484 | #size-cells = <2>; | ||
485 | #address-cells = <3>; | ||
486 | device_type = "pci"; | ||
487 | ranges = <0x02000000 0x0 0xc0000000 | ||
488 | 0x02000000 0x0 0xc0000000 | ||
489 | 0x0 0x20000000 | ||
490 | |||
491 | 0x01000000 0x0 0x00000000 | ||
492 | 0x01000000 0x0 0x00000000 | ||
493 | 0x0 0x00010000>; | ||
494 | uli1575@0 { | ||
495 | reg = <0 0 0 0 0>; | ||
496 | #size-cells = <2>; | ||
497 | #address-cells = <3>; | ||
498 | ranges = <0x02000000 0x0 0xc0000000 | ||
499 | 0x02000000 0x0 0xc0000000 | ||
500 | 0x0 0x20000000 | ||
501 | 0x01000000 0x0 0x00000000 | ||
502 | 0x01000000 0x0 0x00000000 | ||
503 | 0x0 0x00010000>; | ||
504 | isa@1e { | ||
505 | device_type = "isa"; | ||
506 | #interrupt-cells = <2>; | ||
507 | #size-cells = <1>; | ||
508 | #address-cells = <2>; | ||
509 | reg = <0xf000 0 0 0 0>; | ||
510 | ranges = <1 0 0x01000000 0 0 | ||
511 | 0x00001000>; | ||
512 | interrupt-parent = <&i8259>; | ||
513 | |||
514 | i8259: interrupt-controller@20 { | ||
515 | reg = <1 0x20 2 | ||
516 | 1 0xa0 2 | ||
517 | 1 0x4d0 2>; | ||
518 | interrupt-controller; | ||
519 | device_type = "interrupt-controller"; | ||
520 | #address-cells = <0>; | ||
521 | #interrupt-cells = <2>; | ||
522 | compatible = "chrp,iic"; | ||
523 | interrupts = <9 2>; | ||
524 | interrupt-parent = <&mpic>; | ||
525 | }; | ||
526 | |||
527 | i8042@60 { | ||
528 | #size-cells = <0>; | ||
529 | #address-cells = <1>; | ||
530 | reg = <1 0x60 1 1 0x64 1>; | ||
531 | interrupts = <1 3 12 3>; | ||
532 | interrupt-parent = | ||
533 | <&i8259>; | ||
534 | |||
535 | keyboard@0 { | ||
536 | reg = <0>; | ||
537 | compatible = "pnpPNP,303"; | ||
538 | }; | ||
539 | |||
540 | mouse@1 { | ||
541 | reg = <1>; | ||
542 | compatible = "pnpPNP,f03"; | ||
543 | }; | ||
544 | }; | ||
545 | |||
546 | rtc@70 { | ||
547 | compatible = | ||
548 | "pnpPNP,b00"; | ||
549 | reg = <1 0x70 2>; | ||
550 | }; | ||
551 | |||
552 | gpio@400 { | ||
553 | reg = <1 0x400 0x80>; | ||
554 | }; | ||
555 | }; | ||
556 | }; | ||
557 | }; | ||
558 | |||
559 | }; | ||
560 | |||
561 | pci1: pcie@fffe09000 { | ||
562 | cell-index = <1>; | ||
563 | compatible = "fsl,mpc8641-pcie"; | ||
564 | device_type = "pci"; | ||
565 | #interrupt-cells = <1>; | ||
566 | #size-cells = <2>; | ||
567 | #address-cells = <3>; | ||
568 | reg = <0x0f 0xffe09000 0x0 0x1000>; | ||
569 | bus-range = <0x0 0xff>; | ||
570 | ranges = <0x02000000 0x0 0xc0000000 0x0c 0x20000000 0x0 0x20000000 | ||
571 | 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>; | ||
572 | clock-frequency = <33333333>; | ||
573 | interrupt-parent = <&mpic>; | ||
574 | interrupts = <25 2>; | ||
575 | interrupt-map-mask = <0xf800 0 0 7>; | ||
576 | interrupt-map = < | ||
577 | /* IDSEL 0x0 */ | ||
578 | 0x0000 0 0 1 &mpic 4 1 | ||
579 | 0x0000 0 0 2 &mpic 5 1 | ||
580 | 0x0000 0 0 3 &mpic 6 1 | ||
581 | 0x0000 0 0 4 &mpic 7 1 | ||
582 | >; | ||
583 | pcie@0 { | ||
584 | reg = <0 0 0 0 0>; | ||
585 | #size-cells = <2>; | ||
586 | #address-cells = <3>; | ||
587 | device_type = "pci"; | ||
588 | ranges = <0x02000000 0x0 0xc0000000 | ||
589 | 0x02000000 0x0 0xc0000000 | ||
590 | 0x0 0x20000000 | ||
591 | |||
592 | 0x01000000 0x0 0x00000000 | ||
593 | 0x01000000 0x0 0x00000000 | ||
594 | 0x0 0x00010000>; | ||
595 | }; | ||
596 | }; | ||
597 | }; | ||