powerpc/4xx: Simple platform for the ISS 4xx simulator

This is a trivial 4xx plaform that uses the new simple bsp from
Josh and is handy to use in simulators such as ISS or even Mambo
who don't properly implement most of the actual devices in the
SoC but really only the core.

Signed-off-by: Torez Smith  <lnxtorez@linux.vnet.ibm.com>
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

5 files changed, 334 insertions, 1 deletions

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 25e889c0c06e..ad0df7d0a643 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -44,6 +44,7 @@ $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
 $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
+$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
 
 
@@ -77,7 +78,7 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
                 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
                 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
                 cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
-                gamecube-head.S gamecube.c wii-head.S wii.c
+                gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -206,6 +207,8 @@ image-$(CONFIG_TAISHAN)			+= cuImage.taishan
 image-$(CONFIG_KATMAI)                  += cuImage.katmai
 image-$(CONFIG_WARP)                    += cuImage.warp
 image-$(CONFIG_YOSEMITE)                += cuImage.yosemite
+image-$(CONFIG_ISS4xx)                  += treeImage.iss4xx \
+                                           treeImage.iss4xx-mpic
 
 # Board ports in arch/powerpc/platform/8xx/Kconfig
 image-$(CONFIG_MPC86XADS)               += cuImage.mpc866ads
diff --git a/arch/powerpc/boot/dts/iss4xx-mpic.dts b/arch/powerpc/boot/dts/iss4xx-mpic.dts
new file mode 100644
index 000000000000..23e9d9b7e400
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss4xx-mpic.dts
@@ -0,0 +1,155 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ *     Copyright (c) 2006, 2007 IBM Corp.
+ *     Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x01f00000 0x00100000;
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "ibm,iss-4xx";
+        compatible = "ibm,iss-4xx";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <0>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "ok";
+                };
+                cpu@1 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <1>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00100>;
+                };
+                cpu@2 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <2>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00200>;
+                };
+                cpu@3 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <3>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        status = "disabled";
+                        enable-method = "spin-table";
+                        cpu-release-addr = <0 0x01f00300>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg =  <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+
+        };
+
+        MPIC: interrupt-controller {
+                compatible = "chrp,open-pic";
+                interrupt-controller;
+                dcr-reg = <0xffc00000 0x00030000>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+
+        };
+
+        plb {
+                compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; // Filled in by zImage
+
+                POB0: opb {
+                        compatible = "ibm,opb-4xx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Wish there was a nicer way of specifying a full 32-bit
+                           range */
+                        ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+                                  0x80000000 0x00000001 0x80000000 0x80000000>;
+                        clock-frequency = <0>; // Filled in by zImage
+                        UART0: serial@40000200 {
+                                device_type = "serial";
+                                compatible = "ns16550a";
+                                reg = <0x40000200 0x00000008>;
+                                virtual-reg = <0xe0000200>;
+                                clock-frequency = <11059200>;
+                                current-speed = <115200>;
+                                interrupt-parent = <&MPIC>;
+                                interrupts = <0x0 0x2>;
+                        };
+                };
+        };
+
+        nvrtc {
+                compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+                reg = <0 0xEF703000 0x2000>;
+        };
+        iss-block {
+                compatible = "ibm,iss-sim-block-device";
+                reg = <0 0xEF701000 0x1000>;
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@40000200";
+        };
+};
diff --git a/arch/powerpc/boot/dts/iss4xx.dts b/arch/powerpc/boot/dts/iss4xx.dts
new file mode 100644
index 000000000000..4ff6555c866d
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss4xx.dts
@@ -0,0 +1,116 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ *    Copyright (c) 2006, 2007 IBM Corp.
+ *    Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "ibm,iss-4xx";
+        compatible = "ibm,iss-4xx";
+        dcr-parent = <&{/cpus/cpu@0}>;
+
+        aliases {
+                serial0 = &UART0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,4xx"; // real CPU changed in sim
+                        reg = <0x00000000>;
+                        clock-frequency = <100000000>; // 100Mhz :-)
+                        timebase-frequency = <100000000>;
+                        i-cache-line-size = <32>; // may need fixup in sim
+                        d-cache-line-size = <32>; // may need fixup in sim
+                        i-cache-size = <32768>; /* may need fixup in sim */
+                        d-cache-size = <32768>; /* may need fixup in sim */
+                        dcr-controller;
+                        dcr-access-method = "native";
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+        };
+
+        UIC0: interrupt-controller0 {
+                compatible = "ibm,uic-4xx", "ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0x0c0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+
+        };
+
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic-4xx", "ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0x0d0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+
+        plb {
+                compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; // Filled in by zImage
+
+                POB0: opb {
+                        compatible = "ibm,opb-4xx", "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        /* Wish there was a nicer way of specifying a full 32-bit
+                           range */
+                        ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+                                  0x80000000 0x00000001 0x80000000 0x80000000>;
+                        clock-frequency = <0>; // Filled in by zImage
+                        UART0: serial@40000200 {
+                                device_type = "serial";
+                                compatible = "ns16550a";
+                                reg = <0x40000200 0x00000008>;
+                                virtual-reg = <0xe0000200>;
+                                clock-frequency = <11059200>;
+                                current-speed = <115200>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x0 0x4>;
+                        };
+                };
+        };
+
+        nvrtc {
+                compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+                reg = <0 0xEF703000 0x2000>;
+        };
+        iss-block {
+                compatible = "ibm,iss-sim-block-device";
+                reg = <0 0xEF701000 0x1000>;
+        };
+
+        chosen {
+                linux,stdout-path = "/plb/opb/serial@40000200";
+        };
+};
diff --git a/arch/powerpc/boot/treeboot-iss4xx.c b/arch/powerpc/boot/treeboot-iss4xx.c
new file mode 100644
index 000000000000..fcc44952874e
--- /dev/null
+++ b/arch/powerpc/boot/treeboot-iss4xx.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
+ *
+ * Based on earlier code:
+ *   Copyright (C) Paul Mackerras 1997.
+ *
+ *   Matt Porter <mporter@kernel.crashing.org>
+ *   Copyright 2002-2005 MontaVista Software Inc.
+ *
+ *   Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ *   Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ *    Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "reg.h"
+#include "io.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+#include "libfdt.h"
+
+BSS_STACK(4096);
+
+static void iss_4xx_fixups(void)
+{
+        ibm4xx_sdram_fixup_memsize();
+}
+
+#define SPRN_PIR        0x11E   /* Processor Indentification Register */
+void platform_init(void)
+{
+        unsigned long end_of_ram = 0x08000000;
+        unsigned long avail_ram = end_of_ram - (unsigned long)_end;
+        u32 pir_reg;
+
+        simple_alloc_init(_end, avail_ram, 128, 64);
+        platform_ops.fixups = iss_4xx_fixups;
+        platform_ops.exit = ibm44x_dbcr_reset;
+        pir_reg = mfspr(SPRN_PIR);
+        fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
+        fdt_init(_dtb_start);
+        serial_console_init();
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 7160b3b1fb35..cb97e7511d7e 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -241,6 +241,9 @@ gamecube|wii)
     link_address='0x600000'
     platformo="$object/$platform-head.o $object/$platform.o"
     ;;
+treeboot-iss4xx-mpic)
+    platformo="$object/treeboot-iss4xx.o"
+    ;;
 esac
 
 vmz="$tmpdir/`basename \"$kernel\"`.$ext"