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authorAnton Vorontsov <avorontsov@ru.mvista.com>2009-09-15 17:43:59 -0400
committerKumar Gala <galak@kernel.crashing.org>2009-11-11 22:43:29 -0500
commit3cfee0aaa1c7767e1b85272a0621e3a78ece7879 (patch)
treeae4a9f393db8fdb12b8fc56201449db85a2f872e /arch/powerpc/boot
parent4ffd6952a078015fd0bb5905a6ba7cd592f1b817 (diff)
powerpc/85xx: Add power management support for MPC85xxMDS boards
- Add power management controller nodes; - Add interrupts for RTC nodes, the RTC interrupt may be used as a wakeup source; - Add sleep properties (DEVDISR bit mask) and sleep-nexus nodes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts119
-rw-r--r--arch/powerpc/boot/dts/mpc8569mds.dts111
2 files changed, 152 insertions, 78 deletions
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 00c2bbda7013..6d892ba74e55 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -40,6 +40,8 @@
40 i-cache-line-size = <32>; // 32 bytes 40 i-cache-line-size = <32>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K 41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K 42 i-cache-size = <0x8000>; // L1, 32K
43 sleep = <&pmc 0x00008000 // core
44 &pmc 0x00004000>; // timebase
43 timebase-frequency = <0>; 45 timebase-frequency = <0>;
44 bus-frequency = <0>; 46 bus-frequency = <0>;
45 clock-frequency = <0>; 47 clock-frequency = <0>;
@@ -94,31 +96,41 @@
94 interrupts = <16 2>; 96 interrupts = <16 2>;
95 }; 97 };
96 98
97 i2c@3000 { 99 i2c-sleep-nexus {
98 #address-cells = <1>; 100 #address-cells = <1>;
99 #size-cells = <0>; 101 #size-cells = <1>;
100 cell-index = <0>; 102 compatible = "simple-bus";
101 compatible = "fsl-i2c"; 103 sleep = <&pmc 0x00000004>;
102 reg = <0x3000 0x100>; 104 ranges;
103 interrupts = <43 2>;
104 interrupt-parent = <&mpic>;
105 dfsrr;
106 105
107 rtc@68 { 106 i2c@3000 {
108 compatible = "dallas,ds1374"; 107 #address-cells = <1>;
109 reg = <0x68>; 108 #size-cells = <0>;
109 cell-index = <0>;
110 compatible = "fsl-i2c";
111 reg = <0x3000 0x100>;
112 interrupts = <43 2>;
113 interrupt-parent = <&mpic>;
114 dfsrr;
115
116 rtc@68 {
117 compatible = "dallas,ds1374";
118 reg = <0x68>;
119 interrupts = <3 1>;
120 interrupt-parent = <&mpic>;
121 };
110 }; 122 };
111 };
112 123
113 i2c@3100 { 124 i2c@3100 {
114 #address-cells = <1>; 125 #address-cells = <1>;
115 #size-cells = <0>; 126 #size-cells = <0>;
116 cell-index = <1>; 127 cell-index = <1>;
117 compatible = "fsl-i2c"; 128 compatible = "fsl-i2c";
118 reg = <0x3100 0x100>; 129 reg = <0x3100 0x100>;
119 interrupts = <43 2>; 130 interrupts = <43 2>;
120 interrupt-parent = <&mpic>; 131 interrupt-parent = <&mpic>;
121 dfsrr; 132 dfsrr;
133 };
122 }; 134 };
123 135
124 dma@21300 { 136 dma@21300 {
@@ -128,6 +140,8 @@
128 reg = <0x21300 0x4>; 140 reg = <0x21300 0x4>;
129 ranges = <0x0 0x21100 0x200>; 141 ranges = <0x0 0x21100 0x200>;
130 cell-index = <0>; 142 cell-index = <0>;
143 sleep = <&pmc 0x00000400>;
144
131 dma-channel@0 { 145 dma-channel@0 {
132 compatible = "fsl,mpc8568-dma-channel", 146 compatible = "fsl,mpc8568-dma-channel",
133 "fsl,eloplus-dma-channel"; 147 "fsl,eloplus-dma-channel";
@@ -176,6 +190,7 @@
176 interrupt-parent = <&mpic>; 190 interrupt-parent = <&mpic>;
177 tbi-handle = <&tbi0>; 191 tbi-handle = <&tbi0>;
178 phy-handle = <&phy2>; 192 phy-handle = <&phy2>;
193 sleep = <&pmc 0x00000080>;
179 194
180 mdio@520 { 195 mdio@520 {
181 #address-cells = <1>; 196 #address-cells = <1>;
@@ -228,6 +243,7 @@
228 interrupt-parent = <&mpic>; 243 interrupt-parent = <&mpic>;
229 tbi-handle = <&tbi1>; 244 tbi-handle = <&tbi1>;
230 phy-handle = <&phy3>; 245 phy-handle = <&phy3>;
246 sleep = <&pmc 0x00000040>;
231 247
232 mdio@520 { 248 mdio@520 {
233 #address-cells = <1>; 249 #address-cells = <1>;
@@ -242,30 +258,47 @@
242 }; 258 };
243 }; 259 };
244 260
245 serial0: serial@4500 { 261 duart-sleep-nexus {
246 cell-index = <0>; 262 #address-cells = <1>;
247 device_type = "serial"; 263 #size-cells = <1>;
248 compatible = "ns16550"; 264 compatible = "simple-bus";
249 reg = <0x4500 0x100>; 265 sleep = <&pmc 0x00000002>;
250 clock-frequency = <0>; 266 ranges;
251 interrupts = <42 2>; 267
252 interrupt-parent = <&mpic>; 268 serial0: serial@4500 {
269 cell-index = <0>;
270 device_type = "serial";
271 compatible = "ns16550";
272 reg = <0x4500 0x100>;
273 clock-frequency = <0>;
274 interrupts = <42 2>;
275 interrupt-parent = <&mpic>;
276 };
277
278 serial1: serial@4600 {
279 cell-index = <1>;
280 device_type = "serial";
281 compatible = "ns16550";
282 reg = <0x4600 0x100>;
283 clock-frequency = <0>;
284 interrupts = <42 2>;
285 interrupt-parent = <&mpic>;
286 };
253 }; 287 };
254 288
255 global-utilities@e0000 { //global utilities block 289 global-utilities@e0000 {
256 compatible = "fsl,mpc8548-guts"; 290 #address-cells = <1>;
291 #size-cells = <1>;
292 compatible = "fsl,mpc8568-guts", "fsl,mpc8548-guts";
257 reg = <0xe0000 0x1000>; 293 reg = <0xe0000 0x1000>;
294 ranges = <0 0xe0000 0x1000>;
258 fsl,has-rstcr; 295 fsl,has-rstcr;
259 };
260 296
261 serial1: serial@4600 { 297 pmc: power@70 {
262 cell-index = <1>; 298 compatible = "fsl,mpc8568-pmc",
263 device_type = "serial"; 299 "fsl,mpc8548-pmc";
264 compatible = "ns16550"; 300 reg = <0x70 0x20>;
265 reg = <0x4600 0x100>; 301 };
266 clock-frequency = <0>;
267 interrupts = <42 2>;
268 interrupt-parent = <&mpic>;
269 }; 302 };
270 303
271 crypto@30000 { 304 crypto@30000 {
@@ -277,6 +310,7 @@
277 fsl,channel-fifo-len = <24>; 310 fsl,channel-fifo-len = <24>;
278 fsl,exec-units-mask = <0xfe>; 311 fsl,exec-units-mask = <0xfe>;
279 fsl,descriptor-types-mask = <0x12b0ebf>; 312 fsl,descriptor-types-mask = <0x12b0ebf>;
313 sleep = <&pmc 0x01000000>;
280 }; 314 };
281 315
282 mpic: pic@40000 { 316 mpic: pic@40000 {
@@ -376,6 +410,7 @@
376 compatible = "fsl,qe"; 410 compatible = "fsl,qe";
377 ranges = <0x0 0xe0080000 0x40000>; 411 ranges = <0x0 0xe0080000 0x40000>;
378 reg = <0xe0080000 0x480>; 412 reg = <0xe0080000 0x480>;
413 sleep = <&pmc 0x00000800>;
379 brg-frequency = <0>; 414 brg-frequency = <0>;
380 bus-frequency = <396000000>; 415 bus-frequency = <396000000>;
381 fsl,qe-num-riscs = <2>; 416 fsl,qe-num-riscs = <2>;
@@ -509,6 +544,7 @@
509 bus-range = <0 255>; 544 bus-range = <0 255>;
510 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 545 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
511 0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>; 546 0x1000000 0x0 0x0 0xe2000000 0x0 0x800000>;
547 sleep = <&pmc 0x80000000>;
512 clock-frequency = <66666666>; 548 clock-frequency = <66666666>;
513 #interrupt-cells = <1>; 549 #interrupt-cells = <1>;
514 #size-cells = <2>; 550 #size-cells = <2>;
@@ -534,6 +570,7 @@
534 bus-range = <0 255>; 570 bus-range = <0 255>;
535 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 571 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
536 0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>; 572 0x1000000 0x0 0x0 0xe2800000 0x0 0x800000>;
573 sleep = <&pmc 0x20000000>;
537 clock-frequency = <33333333>; 574 clock-frequency = <33333333>;
538 #interrupt-cells = <1>; 575 #interrupt-cells = <1>;
539 #size-cells = <2>; 576 #size-cells = <2>;
@@ -570,5 +607,7 @@
570 55 2 /* msg2_tx */ 607 55 2 /* msg2_tx */
571 56 2 /* msg2_rx */>; 608 56 2 /* msg2_rx */>;
572 interrupt-parent = <&mpic>; 609 interrupt-parent = <&mpic>;
610 sleep = <&pmc 0x00080000 /* controller */
611 &pmc 0x00040000>; /* message unit */
573 }; 612 };
574}; 613};
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts
index 1e3ec8f059bf..795eb362fcf9 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -41,6 +41,8 @@
41 i-cache-line-size = <32>; // 32 bytes 41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K 42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K 43 i-cache-size = <0x8000>; // L1, 32K
44 sleep = <&pmc 0x00008000 // core
45 &pmc 0x00004000>; // timebase
44 timebase-frequency = <0>; 46 timebase-frequency = <0>;
45 bus-frequency = <0>; 47 bus-frequency = <0>;
46 clock-frequency = <0>; 48 clock-frequency = <0>;
@@ -59,6 +61,7 @@
59 reg = <0xe0005000 0x1000>; 61 reg = <0xe0005000 0x1000>;
60 interrupts = <19 2>; 62 interrupts = <19 2>;
61 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 sleep = <&pmc 0x08000000>;
62 65
63 ranges = <0x0 0x0 0xfe000000 0x02000000 66 ranges = <0x0 0x0 0xfe000000 0x02000000
64 0x1 0x0 0xf8000000 0x00008000 67 0x1 0x0 0xf8000000 0x00008000
@@ -158,51 +161,69 @@
158 interrupts = <18 2>; 161 interrupts = <18 2>;
159 }; 162 };
160 163
161 i2c@3000 { 164 i2c-sleep-nexus {
162 #address-cells = <1>; 165 #address-cells = <1>;
163 #size-cells = <0>; 166 #size-cells = <1>;
164 cell-index = <0>; 167 compatible = "simple-bus";
165 compatible = "fsl-i2c"; 168 sleep = <&pmc 0x00000004>;
166 reg = <0x3000 0x100>; 169 ranges;
167 interrupts = <43 2>; 170
168 interrupt-parent = <&mpic>; 171 i2c@3000 {
169 dfsrr; 172 #address-cells = <1>;
173 #size-cells = <0>;
174 cell-index = <0>;
175 compatible = "fsl-i2c";
176 reg = <0x3000 0x100>;
177 interrupts = <43 2>;
178 interrupt-parent = <&mpic>;
179 dfsrr;
180
181 rtc@68 {
182 compatible = "dallas,ds1374";
183 reg = <0x68>;
184 interrupts = <3 1>;
185 interrupt-parent = <&mpic>;
186 };
187 };
170 188
171 rtc@68 { 189 i2c@3100 {
172 compatible = "dallas,ds1374"; 190 #address-cells = <1>;
173 reg = <0x68>; 191 #size-cells = <0>;
192 cell-index = <1>;
193 compatible = "fsl-i2c";
194 reg = <0x3100 0x100>;
195 interrupts = <43 2>;
196 interrupt-parent = <&mpic>;
197 dfsrr;
174 }; 198 };
175 }; 199 };
176 200
177 i2c@3100 { 201 duart-sleep-nexus {
178 #address-cells = <1>; 202 #address-cells = <1>;
179 #size-cells = <0>; 203 #size-cells = <1>;
180 cell-index = <1>; 204 compatible = "simple-bus";
181 compatible = "fsl-i2c"; 205 sleep = <&pmc 0x00000002>;
182 reg = <0x3100 0x100>; 206 ranges;
183 interrupts = <43 2>;
184 interrupt-parent = <&mpic>;
185 dfsrr;
186 };
187 207
188 serial0: serial@4500 { 208 serial0: serial@4500 {
189 cell-index = <0>; 209 cell-index = <0>;
190 device_type = "serial"; 210 device_type = "serial";
191 compatible = "ns16550"; 211 compatible = "ns16550";
192 reg = <0x4500 0x100>; 212 reg = <0x4500 0x100>;
193 clock-frequency = <0>; 213 clock-frequency = <0>;
194 interrupts = <42 2>; 214 interrupts = <42 2>;
195 interrupt-parent = <&mpic>; 215 interrupt-parent = <&mpic>;
196 }; 216 };
197 217
198 serial1: serial@4600 { 218 serial1: serial@4600 {
199 cell-index = <1>; 219 cell-index = <1>;
200 device_type = "serial"; 220 device_type = "serial";
201 compatible = "ns16550"; 221 compatible = "ns16550";
202 reg = <0x4600 0x100>; 222 reg = <0x4600 0x100>;
203 clock-frequency = <0>; 223 clock-frequency = <0>;
204 interrupts = <42 2>; 224 interrupts = <42 2>;
205 interrupt-parent = <&mpic>; 225 interrupt-parent = <&mpic>;
226 };
206 }; 227 };
207 228
208 L2: l2-cache-controller@20000 { 229 L2: l2-cache-controller@20000 {
@@ -260,6 +281,7 @@
260 reg = <0x2e000 0x1000>; 281 reg = <0x2e000 0x1000>;
261 interrupts = <72 0x8>; 282 interrupts = <72 0x8>;
262 interrupt-parent = <&mpic>; 283 interrupt-parent = <&mpic>;
284 sleep = <&pmc 0x00200000>;
263 /* Filled in by U-Boot */ 285 /* Filled in by U-Boot */
264 clock-frequency = <0>; 286 clock-frequency = <0>;
265 status = "disabled"; 287 status = "disabled";
@@ -276,6 +298,7 @@
276 fsl,channel-fifo-len = <24>; 298 fsl,channel-fifo-len = <24>;
277 fsl,exec-units-mask = <0xbfe>; 299 fsl,exec-units-mask = <0xbfe>;
278 fsl,descriptor-types-mask = <0x3ab0ebf>; 300 fsl,descriptor-types-mask = <0x3ab0ebf>;
301 sleep = <&pmc 0x01000000>;
279 }; 302 };
280 303
281 mpic: pic@40000 { 304 mpic: pic@40000 {
@@ -304,9 +327,18 @@
304 }; 327 };
305 328
306 global-utilities@e0000 { 329 global-utilities@e0000 {
307 compatible = "fsl,mpc8569-guts"; 330 #address-cells = <1>;
331 #size-cells = <1>;
332 compatible = "fsl,mpc8569-guts", "fsl,mpc8548-guts";
308 reg = <0xe0000 0x1000>; 333 reg = <0xe0000 0x1000>;
334 ranges = <0 0xe0000 0x1000>;
309 fsl,has-rstcr; 335 fsl,has-rstcr;
336
337 pmc: power@70 {
338 compatible = "fsl,mpc8569-pmc",
339 "fsl,mpc8548-pmc";
340 reg = <0x70 0x20>;
341 };
310 }; 342 };
311 343
312 par_io@e0100 { 344 par_io@e0100 {
@@ -422,6 +454,7 @@
422 compatible = "fsl,qe"; 454 compatible = "fsl,qe";
423 ranges = <0x0 0xe0080000 0x40000>; 455 ranges = <0x0 0xe0080000 0x40000>;
424 reg = <0xe0080000 0x480>; 456 reg = <0xe0080000 0x480>;
457 sleep = <&pmc 0x00000800>;
425 brg-frequency = <0>; 458 brg-frequency = <0>;
426 bus-frequency = <0>; 459 bus-frequency = <0>;
427 fsl,qe-num-riscs = <4>; 460 fsl,qe-num-riscs = <4>;
@@ -684,6 +717,7 @@
684 bus-range = <0 255>; 717 bus-range = <0 255>;
685 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000 718 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
686 0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>; 719 0x1000000 0x0 0x00000000 0xe2800000 0x0 0x00800000>;
720 sleep = <&pmc 0x20000000>;
687 clock-frequency = <33333333>; 721 clock-frequency = <33333333>;
688 pcie@0 { 722 pcie@0 {
689 reg = <0x0 0x0 0x0 0x0 0x0>; 723 reg = <0x0 0x0 0x0 0x0 0x0>;
@@ -714,5 +748,6 @@
714 55 2 /* msg2_tx */ 748 55 2 /* msg2_tx */
715 56 2 /* msg2_rx */>; 749 56 2 /* msg2_rx */>;
716 interrupt-parent = <&mpic>; 750 interrupt-parent = <&mpic>;
751 sleep = <&pmc 0x00080000>;
717 }; 752 };
718}; 753};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 00:57:12 -0500