[POWERPC] 85xx: Enable MSI support for 85xxds board

This patch enabled MSI on 8544ds and 8572ds board.
So far only one MSI interrupt can generate on 8544 board.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

2 files changed, 32 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 6a0d8db96d97..1cfd97078170 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -219,6 +219,22 @@
                         device_type = "open-pic";
                         big-endian;
                 };
+
+                msi@41600 {
+                        compatible = "fsl,mpc8544-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
         };
 
         pci0: pci@e0008000 {
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 66f27ab613a2..174d51aff924 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -221,6 +221,22 @@
                         fsl,has-rstcr;
                 };
 
+                msi@41600 {
+                        compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 mpic: pic@40000 {
                         clock-frequency = <0>;
                         interrupt-controller;