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authorScott Wood <scottwood@freescale.com>2007-09-05 15:00:54 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-04 12:02:47 -0400
commit3611f2ad424094655d381f099613a6f43239824d (patch)
treeceaeadb752a4552f73eaf0ceed6bf37a0c3bcb36 /arch/powerpc/boot
parente00c5498a2a614931cbb7d88a53979d5d47594e1 (diff)
[POWERPC] mpc82xx: Add pq2fads board support.
Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/pq2fads.dts229
1 files changed, 229 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
new file mode 100644
index 000000000000..54e8bd1ae22f
--- /dev/null
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -0,0 +1,229 @@
1/*
2 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "pq2fads";
14 compatible = "fsl,pq2fads";
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 cpus {
19 #address-cells = <1>;
20 #size-cells = <0>;
21
22 cpu@0 {
23 device_type = "cpu";
24 reg = <0>;
25 d-cache-line-size = <d#32>;
26 i-cache-line-size = <d#32>;
27 d-cache-size = <d#16384>;
28 i-cache-size = <d#16384>;
29 timebase-frequency = <0>;
30 clock-frequency = <0>;
31 };
32 };
33
34 memory {
35 device_type = "memory";
36 reg = <0 0>;
37 };
38
39 localbus@f0010100 {
40 compatible = "fsl,mpc8280-localbus",
41 "fsl,pq2-localbus";
42 #address-cells = <2>;
43 #size-cells = <1>;
44 reg = <f0010100 60>;
45
46 ranges = <0 0 fe000000 00800000
47 1 0 f4500000 00008000
48 8 0 f8200000 00008000>;
49
50 flash@0,0 {
51 compatible = "jedec-flash";
52 reg = <0 0 800000>;
53 bank-width = <4>;
54 device-width = <1>;
55 };
56
57 bcsr@1,0 {
58 reg = <1 0 20>;
59 compatible = "fsl,pq2fads-bcsr";
60 };
61
62 PCI_PIC: pic@8,0 {
63 #interrupt-cells = <1>;
64 interrupt-controller;
65 reg = <8 0 8>;
66 compatible = "fsl,pq2ads-pci-pic";
67 interrupt-parent = <&PIC>;
68 interrupts = <18 8>;
69 };
70 };
71
72 pci@f0010800 {
73 device_type = "pci";
74 reg = <f0010800 10c f00101ac 8 f00101c4 8>;
75 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
76 #interrupt-cells = <1>;
77 #size-cells = <2>;
78 #address-cells = <3>;
79 clock-frequency = <d#66000000>;
80 interrupt-map-mask = <f800 0 0 7>;
81 interrupt-map = <
82 /* IDSEL 0x16 */
83 b000 0 0 1 &PCI_PIC 0
84 b000 0 0 2 &PCI_PIC 1
85 b000 0 0 3 &PCI_PIC 2
86 b000 0 0 4 &PCI_PIC 3
87
88 /* IDSEL 0x17 */
89 b800 0 0 1 &PCI_PIC 4
90 b800 0 0 2 &PCI_PIC 5
91 b800 0 0 3 &PCI_PIC 6
92 b800 0 0 4 &PCI_PIC 7
93
94 /* IDSEL 0x18 */
95 c000 0 0 1 &PCI_PIC 8
96 c000 0 0 2 &PCI_PIC 9
97 c000 0 0 3 &PCI_PIC a
98 c000 0 0 4 &PCI_PIC b>;
99
100 interrupt-parent = <&PIC>;
101 interrupts = <12 8>;
102 ranges = <42000000 0 80000000 80000000 0 20000000
103 02000000 0 a0000000 a0000000 0 20000000
104 01000000 0 00000000 f6000000 0 02000000>;
105 };
106
107 soc@f0000000 {
108 #address-cells = <1>;
109 #size-cells = <1>;
110 device_type = "soc";
111 compatible = "fsl,mpc8280", "fsl,pq2-soc";
112 ranges = <00000000 f0000000 00053000>;
113
114 // Temporary -- will go away once kernel uses ranges for get_immrbase().
115 reg = <f0000000 00053000>;
116
117 cpm@119c0 {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 #interrupt-cells = <2>;
121 compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
122 reg = <119c0 30 0 2000>;
123 ranges;
124
125 brg@119f0 {
126 compatible = "fsl,mpc8280-brg",
127 "fsl,cpm2-brg",
128 "fsl,cpm-brg";
129 reg = <119f0 10 115f0 10>;
130 };
131
132 serial@11a00 {
133 device_type = "serial";
134 compatible = "fsl,mpc8280-scc-uart",
135 "fsl,cpm2-scc-uart";
136 reg = <11a00 20 8000 100>;
137 interrupts = <28 8>;
138 interrupt-parent = <&PIC>;
139 fsl,cpm-brg = <1>;
140 fsl,cpm-command = <00800000>;
141 };
142
143 serial@11a20 {
144 device_type = "serial";
145 compatible = "fsl,mpc8280-scc-uart",
146 "fsl,cpm2-scc-uart";
147 reg = <11a20 20 8100 100>;
148 interrupts = <29 8>;
149 interrupt-parent = <&PIC>;
150 fsl,cpm-brg = <2>;
151 fsl,cpm-command = <04a00000>;
152 };
153
154 ethernet@11320 {
155 device_type = "network";
156 compatible = "fsl,mpc8280-fcc-enet",
157 "fsl,cpm2-fcc-enet";
158 reg = <11320 20 8500 100 113b0 1>;
159 interrupts = <21 8>;
160 interrupt-parent = <&PIC>;
161 phy-handle = <&PHY0>;
162 linux,network-index = <0>;
163 fsl,cpm-command = <16200300>;
164 };
165
166 ethernet@11340 {
167 device_type = "network";
168 compatible = "fsl,mpc8280-fcc-enet",
169 "fsl,cpm2-fcc-enet";
170 reg = <11340 20 8600 100 113d0 1>;
171 interrupts = <22 8>;
172 interrupt-parent = <&PIC>;
173 phy-handle = <&PHY1>;
174 linux,network-index = <1>;
175 fsl,cpm-command = <1a400300>;
176 local-mac-address = [00 e0 0c 00 79 01];
177 };
178
179 mdio@10d40 {
180 device_type = "mdio";
181 compatible = "fsl,pq2fads-mdio-bitbang",
182 "fsl,mpc8280-mdio-bitbang",
183 "fsl,cpm2-mdio-bitbang";
184 #address-cells = <1>;
185 #size-cells = <0>;
186 reg = <10d40 14>;
187 fsl,mdio-pin = <9>;
188 fsl,mdc-pin = <a>;
189
190 PHY0: ethernet-phy@0 {
191 interrupt-parent = <&PIC>;
192 interrupts = <19 2>;
193 reg = <0>;
194 device_type = "ethernet-phy";
195 };
196
197 PHY1: ethernet-phy@1 {
198 interrupt-parent = <&PIC>;
199 interrupts = <19 2>;
200 reg = <3>;
201 device_type = "ethernet-phy";
202 };
203 };
204
205 usb@11b60 {
206 #address-cells = <1>;
207 #size-cells = <0>;
208 compatible = "fsl,mpc8280-usb",
209 "fsl,cpm2-usb";
210 reg = <11b60 18 8b00 100>;
211 interrupt-parent = <&PIC>;
212 interrupts = <b 8>;
213 fsl,cpm-command = <2e600000>;
214 };
215 };
216
217 PIC: interrupt-controller@10c00 {
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 reg = <10c00 80>;
221 compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
222 };
223
224 };
225
226 chosen {
227 linux,stdout-path = "/soc/cpm/serial@11a00";
228 };
229};