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authorHugh Blemings <hugh@blemings.org>2007-12-20 23:39:28 -0500
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 14:13:33 -0500
commit6bbc5476298a3dd46a7a19c2af03778b094acb15 (patch)
treed88cbb289b92195f079d62f3695224b09865e855 /arch/powerpc/boot
parent379865d63cb97f8e8241724aae48e795a6b7cb10 (diff)
[POWERPC] 4xx: Base support for 440GX Taishan eval board
This patch adds base support for the AMCC Taishan 440GX evaluation board. Signed-off-by: Hugh Blemings <hugh@blemings.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/Makefile5
-rw-r--r--arch/powerpc/boot/cuboot-taishan.c56
-rw-r--r--arch/powerpc/boot/dts/taishan.dts375
3 files changed, 435 insertions, 1 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 8e5bdd35fd48..a20ad4bd7356 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -37,8 +37,10 @@ BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
37 37
38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440 38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440
39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440 39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440
40$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
40$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 41$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
41 42
43
42zlib := inffast.c inflate.c inftrees.c 44zlib := inffast.c inflate.c inftrees.c
43zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h 45zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
44zliblinuxheader := zlib.h zconf.h zutil.h 46zliblinuxheader := zlib.h zconf.h zutil.h
@@ -58,7 +60,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
58 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ 60 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
59 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ 61 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
60 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ 62 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
61 fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c 63 fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c
62src-boot := $(src-wlib) $(src-plat) empty.c 64src-boot := $(src-wlib) $(src-plat) empty.c
63 65
64src-boot := $(addprefix $(obj)/, $(src-boot)) 66src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -199,6 +201,7 @@ image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
199image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo 201image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
200image-$(CONFIG_SEQUOIA) += cuImage.sequoia 202image-$(CONFIG_SEQUOIA) += cuImage.sequoia
201image-$(CONFIG_WALNUT) += treeImage.walnut 203image-$(CONFIG_WALNUT) += treeImage.walnut
204image-$(CONFIG_TAISHAN) += cuImage.taishan
202endif 205endif
203 206
204# For 32-bit powermacs, build the COFF and miboot images 207# For 32-bit powermacs, build the COFF and miboot images
diff --git a/arch/powerpc/boot/cuboot-taishan.c b/arch/powerpc/boot/cuboot-taishan.c
new file mode 100644
index 000000000000..4ef92021d012
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-taishan.c
@@ -0,0 +1,56 @@
1/*
2 * Old U-boot compatibility for Taishan
3 *
4 * Author: Hugh Blemings <hugh@au.ibm.com>
5 *
6 * Copyright 2007 Hugh Blemings, IBM Corporation.
7 * Based on cuboot-ebony.c which is:
8 * Copyright 2007 David Gibson, IBM Corporation.
9 * Based on cuboot-83xx.c, which is:
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "cuboot.h"
20#include "reg.h"
21#include "dcr.h"
22#include "4xx.h"
23
24#define TARGET_44x
25#include "ppcboot.h"
26
27static bd_t bd;
28
29BSS_STACK(4096);
30
31static void taishan_fixups(void)
32{
33 /* FIXME: sysclk should be derived by reading the FPGA
34 registers */
35 unsigned long sysclk = 33000000;
36
37 /* 440EP Clock logic is all but identical to 440GX
38 so we just use that code for now at least */
39 ibm440ep_fixup_clocks(sysclk, 6 * 1843200);
40
41 ibm4xx_fixup_memsize();
42
43 dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
44
45 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
46}
47
48void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
49 unsigned long r6, unsigned long r7)
50{
51 CUBOOT_INIT();
52
53 platform_ops.fixups = taishan_fixups;
54 fdt_init(_dtb_start);
55 serial_console_init();
56}
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
new file mode 100644
index 000000000000..259972b594b2
--- /dev/null
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -0,0 +1,375 @@
1/*
2 * Device Tree Source for IBM/AMCC Taishan
3 *
4 * Copyright 2007 IBM Corp.
5 * Hugh Blemings <hugh@au.ibm.com> based off code by
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without
10 * any warranty of any kind, whether express or implied.
11 */
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,taishan";
17 compatible = "amcc,taishan";
18 dcr-parent = <&/cpus/PowerPC,440GX@0>;
19
20 cpus {
21 #address-cells = <1>;
22 #size-cells = <0>;
23
24 PowerPC,440GX@0 {
25 device_type = "cpu";
26 reg = <0>;
27 clock-frequency = <2FAF0800>; // 800MHz
28 timebase-frequency = <0>; // Filled in by zImage
29 i-cache-line-size = <32>;
30 d-cache-line-size = <32>;
31 i-cache-size = <8000>; /* 32 kB */
32 d-cache-size = <8000>; /* 32 kB */
33 dcr-controller;
34 dcr-access-method = "native";
35 };
36 };
37
38 memory {
39 device_type = "memory";
40 reg = <0 0 0>; // Filled in by zImage
41 };
42
43
44 UICB0: interrupt-controller-base {
45 compatible = "ibm,uic-440gx", "ibm,uic";
46 interrupt-controller;
47 cell-index = <3>;
48 dcr-reg = <200 009>;
49 #address-cells = <0>;
50 #size-cells = <0>;
51 #interrupt-cells = <2>;
52 };
53
54
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440gx", "ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
59 dcr-reg = <0c0 009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 interrupts = <01 4 00 4>; /* cascade - first non-critical */
64 interrupt-parent = <&UICB0>;
65
66 };
67
68 UIC1: interrupt-controller1 {
69 compatible = "ibm,uic-440gx", "ibm,uic";
70 interrupt-controller;
71 cell-index = <1>;
72 dcr-reg = <0d0 009>;
73 #address-cells = <0>;
74 #size-cells = <0>;
75 #interrupt-cells = <2>;
76 interrupts = <03 4 02 4>; /* cascade */
77 interrupt-parent = <&UICB0>;
78 };
79
80 UIC2: interrupt-controller2 {
81 compatible = "ibm,uic-440gx", "ibm,uic";
82 interrupt-controller;
83 cell-index = <2>; /* was 1 */
84 dcr-reg = <210 009>;
85 #address-cells = <0>;
86 #size-cells = <0>;
87 #interrupt-cells = <2>;
88 interrupts = <05 4 04 4>; /* cascade */
89 interrupt-parent = <&UICB0>;
90 };
91
92
93 CPC0: cpc {
94 compatible = "ibm,cpc-440gp";
95 dcr-reg = <0b0 003 0e0 010>;
96 // FIXME: anything else?
97 };
98
99 plb {
100 compatible = "ibm,plb-440gx", "ibm,plb4";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 ranges;
104 clock-frequency = <9896800>; // 160MHz
105
106 SDRAM0: memory-controller {
107 compatible = "ibm,sdram-440gp";
108 dcr-reg = <010 2>;
109 // FIXME: anything else?
110 };
111
112 SRAM0: sram {
113 compatible = "ibm,sram-440gp";
114 dcr-reg = <020 8 00a 1>;
115 };
116
117 DMA0: dma {
118 // FIXME: ???
119 compatible = "ibm,dma-440gp";
120 dcr-reg = <100 027>;
121 };
122
123 MAL0: mcmal {
124 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
125 dcr-reg = <180 62>;
126 num-tx-chans = <4>;
127 num-rx-chans = <4>;
128 interrupt-parent = <&MAL0>;
129 interrupts = <0 1 2 3 4>;
130 #interrupt-cells = <1>;
131 #address-cells = <0>;
132 #size-cells = <0>;
133 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
134 /*RXEOB*/ 1 &UIC0 b 4
135 /*SERR*/ 2 &UIC1 0 4
136 /*TXDE*/ 3 &UIC1 1 4
137 /*RXDE*/ 4 &UIC1 2 4>;
138 interrupt-map-mask = <ffffffff>;
139 };
140
141 POB0: opb {
142 compatible = "ibm,opb-440gx", "ibm,opb";
143 #address-cells = <1>;
144 #size-cells = <1>;
145 /* Wish there was a nicer way of specifying a full 32-bit
146 range */
147 ranges = <00000000 1 00000000 80000000
148 80000000 1 80000000 80000000>;
149 dcr-reg = <090 00b>;
150 interrupt-parent = <&UIC1>;
151 interrupts = <7 4>;
152 clock-frequency = <4C4B400>; // 80MHz
153
154
155 EBC0: ebc {
156 compatible = "ibm,ebc-440gx", "ibm,ebc";
157 dcr-reg = <012 2>;
158 #address-cells = <2>;
159 #size-cells = <1>;
160 clock-frequency = <4C4B400>; // 80MHz
161
162 /* ranges property is supplied by zImage
163 * based on firmware's configuration of the
164 * EBC bridge */
165
166 interrupts = <5 4>;
167 interrupt-parent = <&UIC1>;
168
169 /* TODO: Add other EBC devices */
170 };
171
172
173
174 UART0: serial@40000200 {
175 device_type = "serial";
176 compatible = "ns16550";
177 reg = <40000200 8>;
178 virtual-reg = <e0000200>;
179 clock-frequency = <A8C000>;
180 current-speed = <1C200>; /* 115200 */
181 interrupt-parent = <&UIC0>;
182 interrupts = <0 4>;
183 };
184
185 UART1: serial@40000300 {
186 device_type = "serial";
187 compatible = "ns16550";
188 reg = <40000300 8>;
189 virtual-reg = <e0000300>;
190 clock-frequency = <A8C000>;
191 current-speed = <1C200>; /* 115200 */
192 interrupt-parent = <&UIC0>;
193 interrupts = <1 4>;
194 };
195
196 IIC0: i2c@40000400 {
197 /* FIXME */
198 device_type = "i2c";
199 compatible = "ibm,iic-440gp", "ibm,iic";
200 reg = <40000400 14>;
201 interrupt-parent = <&UIC0>;
202 interrupts = <2 4>;
203 };
204 IIC1: i2c@40000500 {
205 /* FIXME */
206 device_type = "i2c";
207 compatible = "ibm,iic-440gp", "ibm,iic";
208 reg = <40000500 14>;
209 interrupt-parent = <&UIC0>;
210 interrupts = <3 4>;
211 };
212
213 GPIO0: gpio@40000700 {
214 /* FIXME */
215 compatible = "ibm,gpio-440gp";
216 reg = <40000700 20>;
217 };
218
219 ZMII0: emac-zmii@40000780 {
220 device_type = "zgmii-interface";
221 compatible = "ibm,zmii-440gx", "ibm,zmii";
222 reg = <40000780 c>;
223 };
224
225 RGMII0: emac-rgmii@40000790 {
226 device_type = "rgmii-interface";
227 compatible = "ibm,rgmii";
228 reg = <40000790 8>;
229 };
230
231
232 EMAC0: ethernet@40000800 {
233 unused = <1>;
234 linux,network-index = <2>;
235 device_type = "network";
236 compatible = "ibm,emac-440gx", "ibm,emac4";
237 interrupt-parent = <&UIC1>;
238 interrupts = <1c 4 1d 4>;
239 reg = <40000800 70>;
240 local-mac-address = [000000000000]; // Filled in by zImage
241 mal-device = <&MAL0>;
242 mal-tx-channel = <0>;
243 mal-rx-channel = <0>;
244 cell-index = <0>;
245 max-frame-size = <5dc>;
246 rx-fifo-size = <1000>;
247 tx-fifo-size = <800>;
248 phy-mode = "rmii";
249 phy-map = <00000001>;
250 zmii-device = <&ZMII0>;
251 zmii-channel = <0>;
252 };
253 EMAC1: ethernet@40000900 {
254 unused = <1>;
255 linux,network-index = <3>;
256 device_type = "network";
257 compatible = "ibm,emac-440gx", "ibm,emac4";
258 interrupt-parent = <&UIC1>;
259 interrupts = <1e 4 1f 4>;
260 reg = <40000900 70>;
261 local-mac-address = [000000000000]; // Filled in by zImage
262 mal-device = <&MAL0>;
263 mal-tx-channel = <1>;
264 mal-rx-channel = <1>;
265 cell-index = <1>;
266 max-frame-size = <5dc>;
267 rx-fifo-size = <1000>;
268 tx-fifo-size = <800>;
269 phy-mode = "rmii";
270 phy-map = <00000001>;
271 zmii-device = <&ZMII0>;
272 zmii-channel = <1>;
273 };
274
275 EMAC2: ethernet@40000c00 {
276 linux,network-index = <0>;
277 device_type = "network";
278 compatible = "ibm,emac-440gx", "ibm,emac4";
279 interrupt-parent = <&UIC2>;
280 interrupts = <0 4 1 4>;
281 reg = <40000c00 70>;
282 local-mac-address = [000000000000]; // Filled in by zImage
283 mal-device = <&MAL0>;
284 mal-tx-channel = <2>;
285 mal-rx-channel = <2>;
286 cell-index = <2>;
287 max-frame-size = <5dc>;
288 rx-fifo-size = <1000>;
289 tx-fifo-size = <800>;
290 phy-mode = "rgmii";
291 phy-map = <00000001>;
292 rgmii-device = <&RGMII0>;
293 rgmii-channel = <0>;
294 zmii-device = <&ZMII0>;
295 zmii-channel = <2>;
296 };
297
298 EMAC3: ethernet@40000e00 {
299 linux,network-index = <1>;
300 device_type = "network";
301 compatible = "ibm,emac-440gx", "ibm,emac4";
302 interrupt-parent = <&UIC2>;
303 interrupts = <2 4 3 4>;
304 reg = <40000e00 70>;
305 local-mac-address = [000000000000]; // Filled in by zImage
306 mal-device = <&MAL0>;
307 mal-tx-channel = <3>;
308 mal-rx-channel = <3>;
309 cell-index = <3>;
310 max-frame-size = <5dc>;
311 rx-fifo-size = <1000>;
312 tx-fifo-size = <800>;
313 phy-mode = "rgmii";
314 phy-map = <00000003>;
315 rgmii-device = <&RGMII0>;
316 rgmii-channel = <1>;
317 zmii-device = <&ZMII0>;
318 zmii-channel = <3>;
319 };
320
321
322 GPT0: gpt@40000a00 {
323 /* FIXME */
324 reg = <40000a00 d4>;
325 interrupt-parent = <&UIC0>;
326 interrupts = <12 4 13 4 14 4 15 4 16 4>;
327 };
328
329 };
330
331 PCIX0: pci@20ec00000 {
332 device_type = "pci";
333 #interrupt-cells = <1>;
334 #size-cells = <2>;
335 #address-cells = <3>;
336 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
337 primary;
338 large-inbound-windows;
339 enable-msi-hole;
340 reg = <2 0ec00000 8 /* Config space access */
341 0 0 0 /* no IACK cycles */
342 2 0ed00000 4 /* Special cycles */
343 2 0ec80000 100 /* Internal registers */
344 2 0ec80100 fc>; /* Internal messaging registers */
345
346 /* Outbound ranges, one memory and one IO,
347 * later cannot be changed
348 */
349 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
350 01000000 0 00000000 00000002 08000000 0 00010000>;
351
352 /* Inbound 2GB range starting at 0 */
353 dma-ranges = <42000000 0 0 0 0 0 80000000>;
354
355 interrupt-map-mask = <f800 0 0 7>;
356 interrupt-map = <
357 /* IDSEL 1 */
358 0800 0 0 1 &UIC0 17 8
359 0800 0 0 2 &UIC0 18 8
360 0800 0 0 3 &UIC0 19 8
361 0800 0 0 4 &UIC0 1a 8
362
363 /* IDSEL 2 */
364 1000 0 0 1 &UIC0 18 8
365 1000 0 0 2 &UIC0 19 8
366 1000 0 0 3 &UIC0 1a 8
367 1000 0 0 4 &UIC0 17 8
368 >;
369 };
370 };
371
372 chosen {
373 linux,stdout-path = "/plb/opb/serial@40000300";
374 };
375};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-23 23:21:19 -0500