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authorPaul Mackerras <paulus@samba.org>2008-01-30 18:50:17 -0500
committerPaul Mackerras <paulus@samba.org>2008-01-30 18:50:17 -0500
commit4eece4ccf997c0e6d8fdad3d842e37b16b8d705f (patch)
treeb8ddfaa3401a6af36ab06829b1b0c31e0ff2fb38 /arch/powerpc/boot
parentcda13dd164f91df79ba797ab84848352b03de115 (diff)
parent4fb4c5582475452d3bf7c5072ef2d15ee06f7723 (diff)
Merge branch 'for-2.6.25' of git://git.secretlab.ca/git/linux-2.6-mpc52xx
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts60
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts96
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts93
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts68
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts45
-rw-r--r--arch/powerpc/boot/serial.c2
6 files changed, 160 insertions, 204 deletions
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 9295083d1ce9..30737eafe68e 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -45,17 +45,16 @@
45 }; 45 };
46 46
47 soc5200@f0000000 { 47 soc5200@f0000000 {
48 model = "fsl,mpc5200b"; 48 #address-cells = <1>;
49 compatible = "fsl,mpc5200b"; 49 #size-cells = <1>;
50 revision = ""; // from bootloader 50 compatible = "fsl,mpc5200b-immr";
51 device_type = "soc";
52 ranges = <0 f0000000 0000c000>; 51 ranges = <0 f0000000 0000c000>;
53 reg = <f0000000 00000100>; 52 reg = <f0000000 00000100>;
54 bus-frequency = <0>; // from bootloader 53 bus-frequency = <0>; // from bootloader
55 system-frequency = <0>; // from bootloader 54 system-frequency = <0>; // from bootloader
56 55
57 cdm@200 { 56 cdm@200 {
58 compatible = "mpc5200b-cdm","mpc5200-cdm"; 57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
59 reg = <200 38>; 58 reg = <200 38>;
60 }; 59 };
61 60
@@ -63,11 +62,11 @@
63 // 5200 interrupts are encoded into two levels; 62 // 5200 interrupts are encoded into two levels;
64 interrupt-controller; 63 interrupt-controller;
65 #interrupt-cells = <3>; 64 #interrupt-cells = <3>;
66 compatible = "mpc5200b-pic","mpc5200-pic"; 65 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
67 reg = <500 80>; 66 reg = <500 80>;
68 }; 67 };
69 68
70 gpt@600 { // General Purpose Timer 69 timer@600 { // General Purpose Timer
71 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 70 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
72 reg = <600 10>; 71 reg = <600 10>;
73 interrupts = <1 9 0>; 72 interrupts = <1 9 0>;
@@ -75,49 +74,49 @@
75 fsl,has-wdt; 74 fsl,has-wdt;
76 }; 75 };
77 76
78 gpt@610 { // General Purpose Timer 77 timer@610 { // General Purpose Timer
79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 78 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
80 reg = <610 10>; 79 reg = <610 10>;
81 interrupts = <1 a 0>; 80 interrupts = <1 a 0>;
82 interrupt-parent = <&mpc5200_pic>; 81 interrupt-parent = <&mpc5200_pic>;
83 }; 82 };
84 83
85 gpt@620 { // General Purpose Timer 84 timer@620 { // General Purpose Timer
86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 85 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
87 reg = <620 10>; 86 reg = <620 10>;
88 interrupts = <1 b 0>; 87 interrupts = <1 b 0>;
89 interrupt-parent = <&mpc5200_pic>; 88 interrupt-parent = <&mpc5200_pic>;
90 }; 89 };
91 90
92 gpt@630 { // General Purpose Timer 91 timer@630 { // General Purpose Timer
93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 reg = <630 10>; 93 reg = <630 10>;
95 interrupts = <1 c 0>; 94 interrupts = <1 c 0>;
96 interrupt-parent = <&mpc5200_pic>; 95 interrupt-parent = <&mpc5200_pic>;
97 }; 96 };
98 97
99 gpt@640 { // General Purpose Timer 98 timer@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 99 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 reg = <640 10>; 100 reg = <640 10>;
102 interrupts = <1 d 0>; 101 interrupts = <1 d 0>;
103 interrupt-parent = <&mpc5200_pic>; 102 interrupt-parent = <&mpc5200_pic>;
104 }; 103 };
105 104
106 gpt@650 { // General Purpose Timer 105 timer@650 { // General Purpose Timer
107 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
108 reg = <650 10>; 107 reg = <650 10>;
109 interrupts = <1 e 0>; 108 interrupts = <1 e 0>;
110 interrupt-parent = <&mpc5200_pic>; 109 interrupt-parent = <&mpc5200_pic>;
111 }; 110 };
112 111
113 gpt@660 { // General Purpose Timer 112 timer@660 { // General Purpose Timer
114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 113 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
115 reg = <660 10>; 114 reg = <660 10>;
116 interrupts = <1 f 0>; 115 interrupts = <1 f 0>;
117 interrupt-parent = <&mpc5200_pic>; 116 interrupt-parent = <&mpc5200_pic>;
118 }; 117 };
119 118
120 gpt@670 { // General Purpose Timer 119 timer@670 { // General Purpose Timer
121 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
122 reg = <670 10>; 121 reg = <670 10>;
123 interrupts = <1 10 0>; 122 interrupts = <1 10 0>;
@@ -125,43 +124,42 @@
125 }; 124 };
126 125
127 rtc@800 { // Real time clock 126 rtc@800 { // Real time clock
128 compatible = "mpc5200b-rtc","mpc5200-rtc"; 127 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
129 reg = <800 100>; 128 reg = <800 100>;
130 interrupts = <1 5 0 1 6 0>; 129 interrupts = <1 5 0 1 6 0>;
131 interrupt-parent = <&mpc5200_pic>; 130 interrupt-parent = <&mpc5200_pic>;
132 }; 131 };
133 132
134 gpio@b00 { 133 gpio@b00 {
135 compatible = "mpc5200b-gpio","mpc5200-gpio"; 134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
136 reg = <b00 40>; 135 reg = <b00 40>;
137 interrupts = <1 7 0>; 136 interrupts = <1 7 0>;
138 interrupt-parent = <&mpc5200_pic>; 137 interrupt-parent = <&mpc5200_pic>;
139 }; 138 };
140 139
141 gpio-wkup@c00 { 140 gpio@c00 {
142 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 141 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
143 reg = <c00 40>; 142 reg = <c00 40>;
144 interrupts = <1 8 0 0 3 0>; 143 interrupts = <1 8 0 0 3 0>;
145 interrupt-parent = <&mpc5200_pic>; 144 interrupt-parent = <&mpc5200_pic>;
146 }; 145 };
147 146
148 spi@f00 { 147 spi@f00 {
149 compatible = "mpc5200b-spi","mpc5200-spi"; 148 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
150 reg = <f00 20>; 149 reg = <f00 20>;
151 interrupts = <2 d 0 2 e 0>; 150 interrupts = <2 d 0 2 e 0>;
152 interrupt-parent = <&mpc5200_pic>; 151 interrupt-parent = <&mpc5200_pic>;
153 }; 152 };
154 153
155 usb@1000 { 154 usb@1000 {
156 device_type = "usb-ohci-be"; 155 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
157 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
158 reg = <1000 ff>; 156 reg = <1000 ff>;
159 interrupts = <2 6 0>; 157 interrupts = <2 6 0>;
160 interrupt-parent = <&mpc5200_pic>; 158 interrupt-parent = <&mpc5200_pic>;
161 }; 159 };
162 160
163 dma-controller@1200 { 161 dma-controller@1200 {
164 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
165 reg = <1200 80>; 163 reg = <1200 80>;
166 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
167 3 4 0 3 5 0 3 6 0 3 7 0 165 3 4 0 3 5 0 3 6 0 3 7 0
@@ -171,13 +169,13 @@
171 }; 169 };
172 170
173 xlb@1f00 { 171 xlb@1f00 {
174 compatible = "mpc5200b-xlb","mpc5200-xlb"; 172 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
175 reg = <1f00 100>; 173 reg = <1f00 100>;
176 }; 174 };
177 175
178 serial@2000 { // PSC1 176 serial@2000 { // PSC1
179 device_type = "serial"; 177 device_type = "serial";
180 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 178 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
181 port-number = <0>; // Logical port assignment 179 port-number = <0>; // Logical port assignment
182 reg = <2000 100>; 180 reg = <2000 100>;
183 interrupts = <2 1 0>; 181 interrupts = <2 1 0>;
@@ -186,7 +184,7 @@
186 184
187 serial@2200 { // PSC2 185 serial@2200 { // PSC2
188 device_type = "serial"; 186 device_type = "serial";
189 compatible = "mpc5200-psc-uart"; 187 compatible = "fsl,mpc5200-psc-uart";
190 port-number = <1>; // Logical port assignment 188 port-number = <1>; // Logical port assignment
191 reg = <2200 100>; 189 reg = <2200 100>;
192 interrupts = <2 2 0>; 190 interrupts = <2 2 0>;
@@ -195,7 +193,7 @@
195 193
196 serial@2400 { // PSC3 194 serial@2400 { // PSC3
197 device_type = "serial"; 195 device_type = "serial";
198 compatible = "mpc5200-psc-uart"; 196 compatible = "fsl,mpc5200-psc-uart";
199 port-number = <2>; // Logical port assignment 197 port-number = <2>; // Logical port assignment
200 reg = <2400 100>; 198 reg = <2400 100>;
201 interrupts = <2 3 0>; 199 interrupts = <2 3 0>;
@@ -204,7 +202,7 @@
204 202
205 serial@2c00 { // PSC6 203 serial@2c00 { // PSC6
206 device_type = "serial"; 204 device_type = "serial";
207 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
208 port-number = <5>; // Logical port assignment 206 port-number = <5>; // Logical port assignment
209 reg = <2c00 100>; 207 reg = <2c00 100>;
210 interrupts = <2 4 0>; 208 interrupts = <2 4 0>;
@@ -213,15 +211,15 @@
213 211
214 ethernet@3000 { 212 ethernet@3000 {
215 device_type = "network"; 213 device_type = "network";
216 compatible = "mpc5200b-fec","mpc5200-fec"; 214 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
217 reg = <3000 800>; 215 reg = <3000 800>;
218 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 216 local-mac-address = [ 00 00 00 00 00 00 ];
219 interrupts = <2 5 0>; 217 interrupts = <2 5 0>;
220 interrupt-parent = <&mpc5200_pic>; 218 interrupt-parent = <&mpc5200_pic>;
221 }; 219 };
222 220
223 i2c@3d40 { 221 i2c@3d40 {
224 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 222 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
225 reg = <3d40 40>; 223 reg = <3d40 40>;
226 interrupts = <2 10 0>; 224 interrupts = <2 10 0>;
227 interrupt-parent = <&mpc5200_pic>; 225 interrupt-parent = <&mpc5200_pic>;
@@ -229,7 +227,7 @@
229 }; 227 };
230 228
231 sram@8000 { 229 sram@8000 {
232 compatible = "mpc5200b-sram","mpc5200-sram"; 230 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
233 reg = <8000 4000>; 231 reg = <8000 4000>;
234 }; 232 };
235 }; 233 };
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index e1d6f441532f..0d701c1bf539 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -10,15 +10,8 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "fsl,lite5200"; 14 model = "fsl,lite5200";
21 // revision = "1.0";
22 compatible = "fsl,lite5200"; 15 compatible = "fsl,lite5200";
23 #address-cells = <1>; 16 #address-cells = <1>;
24 #size-cells = <1>; 17 #size-cells = <1>;
@@ -46,30 +39,29 @@
46 }; 39 };
47 40
48 soc5200@f0000000 { 41 soc5200@f0000000 {
49 model = "fsl,mpc5200"; 42 #address-cells = <1>;
50 compatible = "mpc5200"; 43 #size-cells = <1>;
51 revision = ""; // from bootloader 44 compatible = "fsl,mpc5200-immr";
52 device_type = "soc";
53 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
55 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
56 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
57 49
58 cdm@200 { 50 cdm@200 {
59 compatible = "mpc5200-cdm"; 51 compatible = "fsl,mpc5200-cdm";
60 reg = <200 38>; 52 reg = <200 38>;
61 }; 53 };
62 54
63 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
64 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
65 interrupt-controller; 57 interrupt-controller;
66 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
67 device_type = "interrupt-controller"; 59 device_type = "interrupt-controller";
68 compatible = "mpc5200-pic"; 60 compatible = "fsl,mpc5200-pic";
69 reg = <500 80>; 61 reg = <500 80>;
70 }; 62 };
71 63
72 gpt@600 { // General Purpose Timer 64 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200-gpt"; 65 compatible = "fsl,mpc5200-gpt";
74 cell-index = <0>; 66 cell-index = <0>;
75 reg = <600 10>; 67 reg = <600 10>;
@@ -78,7 +70,7 @@
78 fsl,has-wdt; 70 fsl,has-wdt;
79 }; 71 };
80 72
81 gpt@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
82 compatible = "fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200-gpt";
83 cell-index = <1>; 75 cell-index = <1>;
84 reg = <610 10>; 76 reg = <610 10>;
@@ -86,7 +78,7 @@
86 interrupt-parent = <&mpc5200_pic>; 78 interrupt-parent = <&mpc5200_pic>;
87 }; 79 };
88 80
89 gpt@620 { // General Purpose Timer 81 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200-gpt"; 82 compatible = "fsl,mpc5200-gpt";
91 cell-index = <2>; 83 cell-index = <2>;
92 reg = <620 10>; 84 reg = <620 10>;
@@ -94,7 +86,7 @@
94 interrupt-parent = <&mpc5200_pic>; 86 interrupt-parent = <&mpc5200_pic>;
95 }; 87 };
96 88
97 gpt@630 { // General Purpose Timer 89 timer@630 { // General Purpose Timer
98 compatible = "fsl,mpc5200-gpt"; 90 compatible = "fsl,mpc5200-gpt";
99 cell-index = <3>; 91 cell-index = <3>;
100 reg = <630 10>; 92 reg = <630 10>;
@@ -102,7 +94,7 @@
102 interrupt-parent = <&mpc5200_pic>; 94 interrupt-parent = <&mpc5200_pic>;
103 }; 95 };
104 96
105 gpt@640 { // General Purpose Timer 97 timer@640 { // General Purpose Timer
106 compatible = "fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200-gpt";
107 cell-index = <4>; 99 cell-index = <4>;
108 reg = <640 10>; 100 reg = <640 10>;
@@ -110,7 +102,7 @@
110 interrupt-parent = <&mpc5200_pic>; 102 interrupt-parent = <&mpc5200_pic>;
111 }; 103 };
112 104
113 gpt@650 { // General Purpose Timer 105 timer@650 { // General Purpose Timer
114 compatible = "fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200-gpt";
115 cell-index = <5>; 107 cell-index = <5>;
116 reg = <650 10>; 108 reg = <650 10>;
@@ -118,7 +110,7 @@
118 interrupt-parent = <&mpc5200_pic>; 110 interrupt-parent = <&mpc5200_pic>;
119 }; 111 };
120 112
121 gpt@660 { // General Purpose Timer 113 timer@660 { // General Purpose Timer
122 compatible = "fsl,mpc5200-gpt"; 114 compatible = "fsl,mpc5200-gpt";
123 cell-index = <6>; 115 cell-index = <6>;
124 reg = <660 10>; 116 reg = <660 10>;
@@ -126,7 +118,7 @@
126 interrupt-parent = <&mpc5200_pic>; 118 interrupt-parent = <&mpc5200_pic>;
127 }; 119 };
128 120
129 gpt@670 { // General Purpose Timer 121 timer@670 { // General Purpose Timer
130 compatible = "fsl,mpc5200-gpt"; 122 compatible = "fsl,mpc5200-gpt";
131 cell-index = <7>; 123 cell-index = <7>;
132 reg = <670 10>; 124 reg = <670 10>;
@@ -135,25 +127,23 @@
135 }; 127 };
136 128
137 rtc@800 { // Real time clock 129 rtc@800 { // Real time clock
138 compatible = "mpc5200-rtc"; 130 compatible = "fsl,mpc5200-rtc";
139 device_type = "rtc"; 131 device_type = "rtc";
140 reg = <800 100>; 132 reg = <800 100>;
141 interrupts = <1 5 0 1 6 0>; 133 interrupts = <1 5 0 1 6 0>;
142 interrupt-parent = <&mpc5200_pic>; 134 interrupt-parent = <&mpc5200_pic>;
143 }; 135 };
144 136
145 mscan@900 { 137 can@900 {
146 device_type = "mscan"; 138 compatible = "fsl,mpc5200-mscan";
147 compatible = "mpc5200-mscan";
148 cell-index = <0>; 139 cell-index = <0>;
149 interrupts = <2 11 0>; 140 interrupts = <2 11 0>;
150 interrupt-parent = <&mpc5200_pic>; 141 interrupt-parent = <&mpc5200_pic>;
151 reg = <900 80>; 142 reg = <900 80>;
152 }; 143 };
153 144
154 mscan@980 { 145 can@980 {
155 device_type = "mscan"; 146 compatible = "fsl,mpc5200-mscan";
156 compatible = "mpc5200-mscan";
157 cell-index = <1>; 147 cell-index = <1>;
158 interrupts = <2 12 0>; 148 interrupts = <2 12 0>;
159 interrupt-parent = <&mpc5200_pic>; 149 interrupt-parent = <&mpc5200_pic>;
@@ -161,38 +151,36 @@
161 }; 151 };
162 152
163 gpio@b00 { 153 gpio@b00 {
164 compatible = "mpc5200-gpio"; 154 compatible = "fsl,mpc5200-gpio";
165 reg = <b00 40>; 155 reg = <b00 40>;
166 interrupts = <1 7 0>; 156 interrupts = <1 7 0>;
167 interrupt-parent = <&mpc5200_pic>; 157 interrupt-parent = <&mpc5200_pic>;
168 }; 158 };
169 159
170 gpio-wkup@c00 { 160 gpio@c00 {
171 compatible = "mpc5200-gpio-wkup"; 161 compatible = "fsl,mpc5200-gpio-wkup";
172 reg = <c00 40>; 162 reg = <c00 40>;
173 interrupts = <1 8 0 0 3 0>; 163 interrupts = <1 8 0 0 3 0>;
174 interrupt-parent = <&mpc5200_pic>; 164 interrupt-parent = <&mpc5200_pic>;
175 }; 165 };
176 166
177 spi@f00 { 167 spi@f00 {
178 device_type = "spi"; 168 compatible = "fsl,mpc5200-spi";
179 compatible = "mpc5200-spi";
180 reg = <f00 20>; 169 reg = <f00 20>;
181 interrupts = <2 d 0 2 e 0>; 170 interrupts = <2 d 0 2 e 0>;
182 interrupt-parent = <&mpc5200_pic>; 171 interrupt-parent = <&mpc5200_pic>;
183 }; 172 };
184 173
185 usb@1000 { 174 usb@1000 {
186 device_type = "usb-ohci-be"; 175 compatible = "fsl,mpc5200-ohci","ohci-be";
187 compatible = "mpc5200-ohci","ohci-be";
188 reg = <1000 ff>; 176 reg = <1000 ff>;
189 interrupts = <2 6 0>; 177 interrupts = <2 6 0>;
190 interrupt-parent = <&mpc5200_pic>; 178 interrupt-parent = <&mpc5200_pic>;
191 }; 179 };
192 180
193 bestcomm@1200 { 181 dma-controller@1200 {
194 device_type = "dma-controller"; 182 device_type = "dma-controller";
195 compatible = "mpc5200-bestcomm"; 183 compatible = "fsl,mpc5200-bestcomm";
196 reg = <1200 80>; 184 reg = <1200 80>;
197 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 185 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
198 3 4 0 3 5 0 3 6 0 3 7 0 186 3 4 0 3 5 0 3 6 0 3 7 0
@@ -202,13 +190,13 @@
202 }; 190 };
203 191
204 xlb@1f00 { 192 xlb@1f00 {
205 compatible = "mpc5200-xlb"; 193 compatible = "fsl,mpc5200-xlb";
206 reg = <1f00 100>; 194 reg = <1f00 100>;
207 }; 195 };
208 196
209 serial@2000 { // PSC1 197 serial@2000 { // PSC1
210 device_type = "serial"; 198 device_type = "serial";
211 compatible = "mpc5200-psc-uart"; 199 compatible = "fsl,mpc5200-psc-uart";
212 port-number = <0>; // Logical port assignment 200 port-number = <0>; // Logical port assignment
213 cell-index = <0>; 201 cell-index = <0>;
214 reg = <2000 100>; 202 reg = <2000 100>;
@@ -218,8 +206,7 @@
218 206
219 // PSC2 in ac97 mode example 207 // PSC2 in ac97 mode example
220 //ac97@2200 { // PSC2 208 //ac97@2200 { // PSC2
221 // device_type = "sound"; 209 // compatible = "fsl,mpc5200-psc-ac97";
222 // compatible = "mpc5200-psc-ac97";
223 // cell-index = <1>; 210 // cell-index = <1>;
224 // reg = <2200 100>; 211 // reg = <2200 100>;
225 // interrupts = <2 2 0>; 212 // interrupts = <2 2 0>;
@@ -228,8 +215,7 @@
228 215
229 // PSC3 in CODEC mode example 216 // PSC3 in CODEC mode example
230 //i2s@2400 { // PSC3 217 //i2s@2400 { // PSC3
231 // device_type = "sound"; 218 // compatible = "fsl,mpc5200-psc-i2s";
232 // compatible = "mpc5200-psc-i2s";
233 // cell-index = <2>; 219 // cell-index = <2>;
234 // reg = <2400 100>; 220 // reg = <2400 100>;
235 // interrupts = <2 3 0>; 221 // interrupts = <2 3 0>;
@@ -239,7 +225,7 @@
239 // PSC4 in uart mode example 225 // PSC4 in uart mode example
240 //serial@2600 { // PSC4 226 //serial@2600 { // PSC4
241 // device_type = "serial"; 227 // device_type = "serial";
242 // compatible = "mpc5200-psc-uart"; 228 // compatible = "fsl,mpc5200-psc-uart";
243 // cell-index = <3>; 229 // cell-index = <3>;
244 // reg = <2600 100>; 230 // reg = <2600 100>;
245 // interrupts = <2 b 0>; 231 // interrupts = <2 b 0>;
@@ -249,7 +235,7 @@
249 // PSC5 in uart mode example 235 // PSC5 in uart mode example
250 //serial@2800 { // PSC5 236 //serial@2800 { // PSC5
251 // device_type = "serial"; 237 // device_type = "serial";
252 // compatible = "mpc5200-psc-uart"; 238 // compatible = "fsl,mpc5200-psc-uart";
253 // cell-index = <4>; 239 // cell-index = <4>;
254 // reg = <2800 100>; 240 // reg = <2800 100>;
255 // interrupts = <2 c 0>; 241 // interrupts = <2 c 0>;
@@ -258,8 +244,7 @@
258 244
259 // PSC6 in spi mode example 245 // PSC6 in spi mode example
260 //spi@2c00 { // PSC6 246 //spi@2c00 { // PSC6
261 // device_type = "spi"; 247 // compatible = "fsl,mpc5200-psc-spi";
262 // compatible = "mpc5200-psc-spi";
263 // cell-index = <5>; 248 // cell-index = <5>;
264 // reg = <2c00 100>; 249 // reg = <2c00 100>;
265 // interrupts = <2 4 0>; 250 // interrupts = <2 4 0>;
@@ -268,16 +253,16 @@
268 253
269 ethernet@3000 { 254 ethernet@3000 {
270 device_type = "network"; 255 device_type = "network";
271 compatible = "mpc5200-fec"; 256 compatible = "fsl,mpc5200-fec";
272 reg = <3000 800>; 257 reg = <3000 800>;
273 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 258 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <2 5 0>; 259 interrupts = <2 5 0>;
275 interrupt-parent = <&mpc5200_pic>; 260 interrupt-parent = <&mpc5200_pic>;
276 }; 261 };
277 262
278 ata@3a00 { 263 ata@3a00 {
279 device_type = "ata"; 264 device_type = "ata";
280 compatible = "mpc5200-ata"; 265 compatible = "fsl,mpc5200-ata";
281 reg = <3a00 100>; 266 reg = <3a00 100>;
282 interrupts = <2 7 0>; 267 interrupts = <2 7 0>;
283 interrupt-parent = <&mpc5200_pic>; 268 interrupt-parent = <&mpc5200_pic>;
@@ -286,7 +271,7 @@
286 i2c@3d00 { 271 i2c@3d00 {
287 #address-cells = <1>; 272 #address-cells = <1>;
288 #size-cells = <0>; 273 #size-cells = <0>;
289 compatible = "mpc5200-i2c","fsl-i2c"; 274 compatible = "fsl,mpc5200-i2c","fsl-i2c";
290 cell-index = <0>; 275 cell-index = <0>;
291 reg = <3d00 40>; 276 reg = <3d00 40>;
292 interrupts = <2 f 0>; 277 interrupts = <2 f 0>;
@@ -297,7 +282,7 @@
297 i2c@3d40 { 282 i2c@3d40 {
298 #address-cells = <1>; 283 #address-cells = <1>;
299 #size-cells = <0>; 284 #size-cells = <0>;
300 compatible = "mpc5200-i2c","fsl-i2c"; 285 compatible = "fsl,mpc5200-i2c","fsl-i2c";
301 cell-index = <1>; 286 cell-index = <1>;
302 reg = <3d40 40>; 287 reg = <3d40 40>;
303 interrupts = <2 10 0>; 288 interrupts = <2 10 0>;
@@ -305,8 +290,7 @@
305 fsl5200-clocking; 290 fsl5200-clocking;
306 }; 291 };
307 sram@8000 { 292 sram@8000 {
308 device_type = "sram"; 293 compatible = "fsl,mpc5200-sram","sram";
309 compatible = "mpc5200-sram","sram";
310 reg = <8000 4000>; 294 reg = <8000 4000>;
311 }; 295 };
312 }; 296 };
@@ -316,7 +300,7 @@
316 #size-cells = <2>; 300 #size-cells = <2>;
317 #address-cells = <3>; 301 #address-cells = <3>;
318 device_type = "pci"; 302 device_type = "pci";
319 compatible = "mpc5200-pci"; 303 compatible = "fsl,mpc5200-pci";
320 reg = <f0000d00 100>; 304 reg = <f0000d00 100>;
321 interrupt-map-mask = <f800 0 0 7>; 305 interrupt-map-mask = <f800 0 0 7>;
322 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 306 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 3e06f58a0a71..571ba02accac 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -18,7 +18,6 @@
18 18
19/ { 19/ {
20 model = "fsl,lite5200b"; 20 model = "fsl,lite5200b";
21 // revision = "1.0";
22 compatible = "fsl,lite5200b"; 21 compatible = "fsl,lite5200b";
23 #address-cells = <1>; 22 #address-cells = <1>;
24 #size-cells = <1>; 23 #size-cells = <1>;
@@ -46,30 +45,29 @@
46 }; 45 };
47 46
48 soc5200@f0000000 { 47 soc5200@f0000000 {
49 model = "fsl,mpc5200b"; 48 #address-cells = <1>;
50 compatible = "mpc5200"; 49 #size-cells = <1>;
51 revision = ""; // from bootloader 50 compatible = "fsl,mpc5200b-immr";
52 device_type = "soc";
53 ranges = <0 f0000000 0000c000>; 51 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>; 52 reg = <f0000000 00000100>;
55 bus-frequency = <0>; // from bootloader 53 bus-frequency = <0>; // from bootloader
56 system-frequency = <0>; // from bootloader 54 system-frequency = <0>; // from bootloader
57 55
58 cdm@200 { 56 cdm@200 {
59 compatible = "mpc5200b-cdm","mpc5200-cdm"; 57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
60 reg = <200 38>; 58 reg = <200 38>;
61 }; 59 };
62 60
63 mpc5200_pic: pic@500 { 61 mpc5200_pic: interrupt-controller@500 {
64 // 5200 interrupts are encoded into two levels; 62 // 5200 interrupts are encoded into two levels;
65 interrupt-controller; 63 interrupt-controller;
66 #interrupt-cells = <3>; 64 #interrupt-cells = <3>;
67 device_type = "interrupt-controller"; 65 device_type = "interrupt-controller";
68 compatible = "mpc5200b-pic","mpc5200-pic"; 66 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
69 reg = <500 80>; 67 reg = <500 80>;
70 }; 68 };
71 69
72 gpt@600 { // General Purpose Timer 70 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 71 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
74 cell-index = <0>; 72 cell-index = <0>;
75 reg = <600 10>; 73 reg = <600 10>;
@@ -78,7 +76,7 @@
78 fsl,has-wdt; 76 fsl,has-wdt;
79 }; 77 };
80 78
81 gpt@610 { // General Purpose Timer 79 timer@610 { // General Purpose Timer
82 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
83 cell-index = <1>; 81 cell-index = <1>;
84 reg = <610 10>; 82 reg = <610 10>;
@@ -86,7 +84,7 @@
86 interrupt-parent = <&mpc5200_pic>; 84 interrupt-parent = <&mpc5200_pic>;
87 }; 85 };
88 86
89 gpt@620 { // General Purpose Timer 87 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
91 cell-index = <2>; 89 cell-index = <2>;
92 reg = <620 10>; 90 reg = <620 10>;
@@ -94,7 +92,7 @@
94 interrupt-parent = <&mpc5200_pic>; 92 interrupt-parent = <&mpc5200_pic>;
95 }; 93 };
96 94
97 gpt@630 { // General Purpose Timer 95 timer@630 { // General Purpose Timer
98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 96 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
99 cell-index = <3>; 97 cell-index = <3>;
100 reg = <630 10>; 98 reg = <630 10>;
@@ -102,7 +100,7 @@
102 interrupt-parent = <&mpc5200_pic>; 100 interrupt-parent = <&mpc5200_pic>;
103 }; 101 };
104 102
105 gpt@640 { // General Purpose Timer 103 timer@640 { // General Purpose Timer
106 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
107 cell-index = <4>; 105 cell-index = <4>;
108 reg = <640 10>; 106 reg = <640 10>;
@@ -110,7 +108,7 @@
110 interrupt-parent = <&mpc5200_pic>; 108 interrupt-parent = <&mpc5200_pic>;
111 }; 109 };
112 110
113 gpt@650 { // General Purpose Timer 111 timer@650 { // General Purpose Timer
114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 112 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
115 cell-index = <5>; 113 cell-index = <5>;
116 reg = <650 10>; 114 reg = <650 10>;
@@ -118,7 +116,7 @@
118 interrupt-parent = <&mpc5200_pic>; 116 interrupt-parent = <&mpc5200_pic>;
119 }; 117 };
120 118
121 gpt@660 { // General Purpose Timer 119 timer@660 { // General Purpose Timer
122 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
123 cell-index = <6>; 121 cell-index = <6>;
124 reg = <660 10>; 122 reg = <660 10>;
@@ -126,7 +124,7 @@
126 interrupt-parent = <&mpc5200_pic>; 124 interrupt-parent = <&mpc5200_pic>;
127 }; 125 };
128 126
129 gpt@670 { // General Purpose Timer 127 timer@670 { // General Purpose Timer
130 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 128 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
131 cell-index = <7>; 129 cell-index = <7>;
132 reg = <670 10>; 130 reg = <670 10>;
@@ -135,25 +133,23 @@
135 }; 133 };
136 134
137 rtc@800 { // Real time clock 135 rtc@800 { // Real time clock
138 compatible = "mpc5200b-rtc","mpc5200-rtc"; 136 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
139 device_type = "rtc"; 137 device_type = "rtc";
140 reg = <800 100>; 138 reg = <800 100>;
141 interrupts = <1 5 0 1 6 0>; 139 interrupts = <1 5 0 1 6 0>;
142 interrupt-parent = <&mpc5200_pic>; 140 interrupt-parent = <&mpc5200_pic>;
143 }; 141 };
144 142
145 mscan@900 { 143 can@900 {
146 device_type = "mscan"; 144 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
147 compatible = "mpc5200b-mscan","mpc5200-mscan";
148 cell-index = <0>; 145 cell-index = <0>;
149 interrupts = <2 11 0>; 146 interrupts = <2 11 0>;
150 interrupt-parent = <&mpc5200_pic>; 147 interrupt-parent = <&mpc5200_pic>;
151 reg = <900 80>; 148 reg = <900 80>;
152 }; 149 };
153 150
154 mscan@980 { 151 can@980 {
155 device_type = "mscan"; 152 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
156 compatible = "mpc5200b-mscan","mpc5200-mscan";
157 cell-index = <1>; 153 cell-index = <1>;
158 interrupts = <2 12 0>; 154 interrupts = <2 12 0>;
159 interrupt-parent = <&mpc5200_pic>; 155 interrupt-parent = <&mpc5200_pic>;
@@ -161,38 +157,36 @@
161 }; 157 };
162 158
163 gpio@b00 { 159 gpio@b00 {
164 compatible = "mpc5200b-gpio","mpc5200-gpio"; 160 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
165 reg = <b00 40>; 161 reg = <b00 40>;
166 interrupts = <1 7 0>; 162 interrupts = <1 7 0>;
167 interrupt-parent = <&mpc5200_pic>; 163 interrupt-parent = <&mpc5200_pic>;
168 }; 164 };
169 165
170 gpio-wkup@c00 { 166 gpio@c00 {
171 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 167 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
172 reg = <c00 40>; 168 reg = <c00 40>;
173 interrupts = <1 8 0 0 3 0>; 169 interrupts = <1 8 0 0 3 0>;
174 interrupt-parent = <&mpc5200_pic>; 170 interrupt-parent = <&mpc5200_pic>;
175 }; 171 };
176 172
177 spi@f00 { 173 spi@f00 {
178 device_type = "spi"; 174 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
179 compatible = "mpc5200b-spi","mpc5200-spi";
180 reg = <f00 20>; 175 reg = <f00 20>;
181 interrupts = <2 d 0 2 e 0>; 176 interrupts = <2 d 0 2 e 0>;
182 interrupt-parent = <&mpc5200_pic>; 177 interrupt-parent = <&mpc5200_pic>;
183 }; 178 };
184 179
185 usb@1000 { 180 usb@1000 {
186 device_type = "usb-ohci-be"; 181 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
187 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
188 reg = <1000 ff>; 182 reg = <1000 ff>;
189 interrupts = <2 6 0>; 183 interrupts = <2 6 0>;
190 interrupt-parent = <&mpc5200_pic>; 184 interrupt-parent = <&mpc5200_pic>;
191 }; 185 };
192 186
193 bestcomm@1200 { 187 dma-controller@1200 {
194 device_type = "dma-controller"; 188 device_type = "dma-controller";
195 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 189 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
196 reg = <1200 80>; 190 reg = <1200 80>;
197 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 191 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
198 3 4 0 3 5 0 3 6 0 3 7 0 192 3 4 0 3 5 0 3 6 0 3 7 0
@@ -202,13 +196,13 @@
202 }; 196 };
203 197
204 xlb@1f00 { 198 xlb@1f00 {
205 compatible = "mpc5200b-xlb","mpc5200-xlb"; 199 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
206 reg = <1f00 100>; 200 reg = <1f00 100>;
207 }; 201 };
208 202
209 serial@2000 { // PSC1 203 serial@2000 { // PSC1
210 device_type = "serial"; 204 device_type = "serial";
211 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
212 port-number = <0>; // Logical port assignment 206 port-number = <0>; // Logical port assignment
213 cell-index = <0>; 207 cell-index = <0>;
214 reg = <2000 100>; 208 reg = <2000 100>;
@@ -218,8 +212,7 @@
218 212
219 // PSC2 in ac97 mode example 213 // PSC2 in ac97 mode example
220 //ac97@2200 { // PSC2 214 //ac97@2200 { // PSC2
221 // device_type = "sound"; 215 // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
222 // compatible = "mpc5200b-psc-ac97","mpc5200-psc-ac97";
223 // cell-index = <1>; 216 // cell-index = <1>;
224 // reg = <2200 100>; 217 // reg = <2200 100>;
225 // interrupts = <2 2 0>; 218 // interrupts = <2 2 0>;
@@ -228,8 +221,7 @@
228 221
229 // PSC3 in CODEC mode example 222 // PSC3 in CODEC mode example
230 //i2s@2400 { // PSC3 223 //i2s@2400 { // PSC3
231 // device_type = "sound"; 224 // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
232 // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
233 // cell-index = <2>; 225 // cell-index = <2>;
234 // reg = <2400 100>; 226 // reg = <2400 100>;
235 // interrupts = <2 3 0>; 227 // interrupts = <2 3 0>;
@@ -239,7 +231,7 @@
239 // PSC4 in uart mode example 231 // PSC4 in uart mode example
240 //serial@2600 { // PSC4 232 //serial@2600 { // PSC4
241 // device_type = "serial"; 233 // device_type = "serial";
242 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 234 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
243 // cell-index = <3>; 235 // cell-index = <3>;
244 // reg = <2600 100>; 236 // reg = <2600 100>;
245 // interrupts = <2 b 0>; 237 // interrupts = <2 b 0>;
@@ -249,7 +241,7 @@
249 // PSC5 in uart mode example 241 // PSC5 in uart mode example
250 //serial@2800 { // PSC5 242 //serial@2800 { // PSC5
251 // device_type = "serial"; 243 // device_type = "serial";
252 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 244 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
253 // cell-index = <4>; 245 // cell-index = <4>;
254 // reg = <2800 100>; 246 // reg = <2800 100>;
255 // interrupts = <2 c 0>; 247 // interrupts = <2 c 0>;
@@ -258,8 +250,7 @@
258 250
259 // PSC6 in spi mode example 251 // PSC6 in spi mode example
260 //spi@2c00 { // PSC6 252 //spi@2c00 { // PSC6
261 // device_type = "spi"; 253 // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
262 // compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
263 // cell-index = <5>; 254 // cell-index = <5>;
264 // reg = <2c00 100>; 255 // reg = <2c00 100>;
265 // interrupts = <2 4 0>; 256 // interrupts = <2 4 0>;
@@ -268,9 +259,9 @@
268 259
269 ethernet@3000 { 260 ethernet@3000 {
270 device_type = "network"; 261 device_type = "network";
271 compatible = "mpc5200b-fec","mpc5200-fec"; 262 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
272 reg = <3000 400>; 263 reg = <3000 400>;
273 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 264 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <2 5 0>; 265 interrupts = <2 5 0>;
275 interrupt-parent = <&mpc5200_pic>; 266 interrupt-parent = <&mpc5200_pic>;
276 phy-handle = <&phy0>; 267 phy-handle = <&phy0>;
@@ -279,8 +270,7 @@
279 mdio@3000 { 270 mdio@3000 {
280 #address-cells = <1>; 271 #address-cells = <1>;
281 #size-cells = <0>; 272 #size-cells = <0>;
282 device_type = "mdio"; 273 compatible = "fsl,mpc5200b-mdio";
283 compatible = "mpc5200b-fec-phy";
284 reg = <3000 400>; // fec range, since we need to setup fec interrupts 274 reg = <3000 400>; // fec range, since we need to setup fec interrupts
285 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 275 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
286 interrupt-parent = <&mpc5200_pic>; 276 interrupt-parent = <&mpc5200_pic>;
@@ -293,7 +283,7 @@
293 283
294 ata@3a00 { 284 ata@3a00 {
295 device_type = "ata"; 285 device_type = "ata";
296 compatible = "mpc5200b-ata","mpc5200-ata"; 286 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
297 reg = <3a00 100>; 287 reg = <3a00 100>;
298 interrupts = <2 7 0>; 288 interrupts = <2 7 0>;
299 interrupt-parent = <&mpc5200_pic>; 289 interrupt-parent = <&mpc5200_pic>;
@@ -302,7 +292,7 @@
302 i2c@3d00 { 292 i2c@3d00 {
303 #address-cells = <1>; 293 #address-cells = <1>;
304 #size-cells = <0>; 294 #size-cells = <0>;
305 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 295 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
306 cell-index = <0>; 296 cell-index = <0>;
307 reg = <3d00 40>; 297 reg = <3d00 40>;
308 interrupts = <2 f 0>; 298 interrupts = <2 f 0>;
@@ -313,7 +303,7 @@
313 i2c@3d40 { 303 i2c@3d40 {
314 #address-cells = <1>; 304 #address-cells = <1>;
315 #size-cells = <0>; 305 #size-cells = <0>;
316 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 306 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
317 cell-index = <1>; 307 cell-index = <1>;
318 reg = <3d40 40>; 308 reg = <3d40 40>;
319 interrupts = <2 10 0>; 309 interrupts = <2 10 0>;
@@ -321,8 +311,7 @@
321 fsl5200-clocking; 311 fsl5200-clocking;
322 }; 312 };
323 sram@8000 { 313 sram@8000 {
324 device_type = "sram"; 314 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
325 compatible = "mpc5200b-sram","mpc5200-sram","sram";
326 reg = <8000 4000>; 315 reg = <8000 4000>;
327 }; 316 };
328 }; 317 };
@@ -332,7 +321,7 @@
332 #size-cells = <2>; 321 #size-cells = <2>;
333 #address-cells = <3>; 322 #address-cells = <3>;
334 device_type = "pci"; 323 device_type = "pci";
335 compatible = "mpc5200b-pci","mpc5200-pci"; 324 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
336 reg = <f0000d00 100>; 325 reg = <f0000d00 100>;
337 interrupt-map-mask = <f800 0 0 7>; 326 interrupt-map-mask = <f800 0 0 7>;
338 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 327 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index d8c316ae0a47..76951ab038ee 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -10,12 +10,6 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "promess,motionpro"; 14 model = "promess,motionpro";
21 compatible = "promess,motionpro"; 15 compatible = "promess,motionpro";
@@ -45,29 +39,28 @@
45 }; 39 };
46 40
47 soc5200@f0000000 { 41 soc5200@f0000000 {
48 model = "fsl,mpc5200b"; 42 #address-cells = <1>;
49 compatible = "fsl,mpc5200b"; 43 #size-cells = <1>;
50 revision = ""; // from bootloader 44 compatible = "fsl,mpc5200b-immr";
51 device_type = "soc";
52 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
53 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
54 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
55 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
56 49
57 cdm@200 { 50 cdm@200 {
58 compatible = "mpc5200b-cdm","mpc5200-cdm"; 51 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
59 reg = <200 38>; 52 reg = <200 38>;
60 }; 53 };
61 54
62 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
63 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
64 interrupt-controller; 57 interrupt-controller;
65 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
66 compatible = "mpc5200b-pic","mpc5200-pic"; 59 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
67 reg = <500 80>; 60 reg = <500 80>;
68 }; 61 };
69 62
70 gpt@600 { // General Purpose Timer 63 timer@600 { // General Purpose Timer
71 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 64 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
72 reg = <600 10>; 65 reg = <600 10>;
73 interrupts = <1 9 0>; 66 interrupts = <1 9 0>;
@@ -75,35 +68,35 @@
75 fsl,has-wdt; 68 fsl,has-wdt;
76 }; 69 };
77 70
78 gpt@610 { // General Purpose Timer 71 timer@610 { // General Purpose Timer
79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 72 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
80 reg = <610 10>; 73 reg = <610 10>;
81 interrupts = <1 a 0>; 74 interrupts = <1 a 0>;
82 interrupt-parent = <&mpc5200_pic>; 75 interrupt-parent = <&mpc5200_pic>;
83 }; 76 };
84 77
85 gpt@620 { // General Purpose Timer 78 timer@620 { // General Purpose Timer
86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
87 reg = <620 10>; 80 reg = <620 10>;
88 interrupts = <1 b 0>; 81 interrupts = <1 b 0>;
89 interrupt-parent = <&mpc5200_pic>; 82 interrupt-parent = <&mpc5200_pic>;
90 }; 83 };
91 84
92 gpt@630 { // General Purpose Timer 85 timer@630 { // General Purpose Timer
93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 reg = <630 10>; 87 reg = <630 10>;
95 interrupts = <1 c 0>; 88 interrupts = <1 c 0>;
96 interrupt-parent = <&mpc5200_pic>; 89 interrupt-parent = <&mpc5200_pic>;
97 }; 90 };
98 91
99 gpt@640 { // General Purpose Timer 92 timer@640 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 reg = <640 10>; 94 reg = <640 10>;
102 interrupts = <1 d 0>; 95 interrupts = <1 d 0>;
103 interrupt-parent = <&mpc5200_pic>; 96 interrupt-parent = <&mpc5200_pic>;
104 }; 97 };
105 98
106 gpt@650 { // General Purpose Timer 99 timer@650 { // General Purpose Timer
107 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
108 reg = <650 10>; 101 reg = <650 10>;
109 interrupts = <1 e 0>; 102 interrupts = <1 e 0>;
@@ -128,28 +121,28 @@
128 }; 121 };
129 122
130 rtc@800 { // Real time clock 123 rtc@800 { // Real time clock
131 compatible = "mpc5200b-rtc","mpc5200-rtc"; 124 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
132 reg = <800 100>; 125 reg = <800 100>;
133 interrupts = <1 5 0 1 6 0>; 126 interrupts = <1 5 0 1 6 0>;
134 interrupt-parent = <&mpc5200_pic>; 127 interrupt-parent = <&mpc5200_pic>;
135 }; 128 };
136 129
137 mscan@980 { 130 mscan@980 {
138 compatible = "mpc5200b-mscan","mpc5200-mscan"; 131 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
139 interrupts = <2 12 0>; 132 interrupts = <2 12 0>;
140 interrupt-parent = <&mpc5200_pic>; 133 interrupt-parent = <&mpc5200_pic>;
141 reg = <980 80>; 134 reg = <980 80>;
142 }; 135 };
143 136
144 gpio@b00 { 137 gpio@b00 {
145 compatible = "mpc5200b-gpio","mpc5200-gpio"; 138 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
146 reg = <b00 40>; 139 reg = <b00 40>;
147 interrupts = <1 7 0>; 140 interrupts = <1 7 0>;
148 interrupt-parent = <&mpc5200_pic>; 141 interrupt-parent = <&mpc5200_pic>;
149 }; 142 };
150 143
151 gpio-wkup@c00 { 144 gpio@c00 {
152 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 145 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
153 reg = <c00 40>; 146 reg = <c00 40>;
154 interrupts = <1 8 0 0 3 0>; 147 interrupts = <1 8 0 0 3 0>;
155 interrupt-parent = <&mpc5200_pic>; 148 interrupt-parent = <&mpc5200_pic>;
@@ -157,21 +150,21 @@
157 150
158 151
159 spi@f00 { 152 spi@f00 {
160 compatible = "mpc5200b-spi","mpc5200-spi"; 153 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
161 reg = <f00 20>; 154 reg = <f00 20>;
162 interrupts = <2 d 0 2 e 0>; 155 interrupts = <2 d 0 2 e 0>;
163 interrupt-parent = <&mpc5200_pic>; 156 interrupt-parent = <&mpc5200_pic>;
164 }; 157 };
165 158
166 usb@1000 { 159 usb@1000 {
167 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be"; 160 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
168 reg = <1000 ff>; 161 reg = <1000 ff>;
169 interrupts = <2 6 0>; 162 interrupts = <2 6 0>;
170 interrupt-parent = <&mpc5200_pic>; 163 interrupt-parent = <&mpc5200_pic>;
171 }; 164 };
172 165
173 dma-controller@1200 { 166 dma-controller@1200 {
174 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 167 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
175 reg = <1200 80>; 168 reg = <1200 80>;
176 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 169 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
177 3 4 0 3 5 0 3 6 0 3 7 0 170 3 4 0 3 5 0 3 6 0 3 7 0
@@ -181,13 +174,13 @@
181 }; 174 };
182 175
183 xlb@1f00 { 176 xlb@1f00 {
184 compatible = "mpc5200b-xlb","mpc5200-xlb"; 177 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
185 reg = <1f00 100>; 178 reg = <1f00 100>;
186 }; 179 };
187 180
188 serial@2000 { // PSC1 181 serial@2000 { // PSC1
189 device_type = "serial"; 182 device_type = "serial";
190 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 183 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
191 port-number = <0>; // Logical port assignment 184 port-number = <0>; // Logical port assignment
192 reg = <2000 100>; 185 reg = <2000 100>;
193 interrupts = <2 1 0>; 186 interrupts = <2 1 0>;
@@ -196,7 +189,7 @@
196 189
197 // PSC2 in spi master mode 190 // PSC2 in spi master mode
198 spi@2200 { // PSC2 191 spi@2200 { // PSC2
199 compatible = "mpc5200b-psc-spi","mpc5200-psc-spi"; 192 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
200 cell-index = <1>; 193 cell-index = <1>;
201 reg = <2200 100>; 194 reg = <2200 100>;
202 interrupts = <2 2 0>; 195 interrupts = <2 2 0>;
@@ -206,7 +199,7 @@
206 // PSC5 in uart mode 199 // PSC5 in uart mode
207 serial@2800 { // PSC5 200 serial@2800 { // PSC5
208 device_type = "serial"; 201 device_type = "serial";
209 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 202 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
210 port-number = <4>; // Logical port assignment 203 port-number = <4>; // Logical port assignment
211 reg = <2800 100>; 204 reg = <2800 100>;
212 interrupts = <2 c 0>; 205 interrupts = <2 c 0>;
@@ -215,22 +208,22 @@
215 208
216 ethernet@3000 { 209 ethernet@3000 {
217 device_type = "network"; 210 device_type = "network";
218 compatible = "mpc5200b-fec","mpc5200-fec"; 211 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
219 reg = <3000 800>; 212 reg = <3000 800>;
220 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 213 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupts = <2 5 0>; 214 interrupts = <2 5 0>;
222 interrupt-parent = <&mpc5200_pic>; 215 interrupt-parent = <&mpc5200_pic>;
223 }; 216 };
224 217
225 ata@3a00 { 218 ata@3a00 {
226 compatible = "mpc5200b-ata","mpc5200-ata"; 219 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
227 reg = <3a00 100>; 220 reg = <3a00 100>;
228 interrupts = <2 7 0>; 221 interrupts = <2 7 0>;
229 interrupt-parent = <&mpc5200_pic>; 222 interrupt-parent = <&mpc5200_pic>;
230 }; 223 };
231 224
232 i2c@3d40 { 225 i2c@3d40 {
233 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 226 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
234 reg = <3d40 40>; 227 reg = <3d40 40>;
235 interrupts = <2 10 0>; 228 interrupts = <2 10 0>;
236 interrupt-parent = <&mpc5200_pic>; 229 interrupt-parent = <&mpc5200_pic>;
@@ -238,13 +231,12 @@
238 }; 231 };
239 232
240 sram@8000 { 233 sram@8000 {
241 compatible = "mpc5200b-sram","mpc5200-sram"; 234 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
242 reg = <8000 4000>; 235 reg = <8000 4000>;
243 }; 236 };
244 }; 237 };
245 238
246 lpb { 239 lpb {
247 model = "fsl,lpb";
248 compatible = "fsl,lpb"; 240 compatible = "fsl,lpb";
249 #address-cells = <2>; 241 #address-cells = <2>;
250 #size-cells = <1>; 242 #size-cells = <1>;
@@ -286,7 +278,7 @@
286 #size-cells = <2>; 278 #size-cells = <2>;
287 #address-cells = <3>; 279 #address-cells = <3>;
288 device_type = "pci"; 280 device_type = "pci";
289 compatible = "mpc5200b-pci","mpc5200-pci"; 281 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
290 reg = <f0000d00 100>; 282 reg = <f0000d00 100>;
291 interrupt-map-mask = <f800 0 0 7>; 283 interrupt-map-mask = <f800 0 0 7>;
292 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 284 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 5017cec3d386..c86464f007da 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -10,12 +10,6 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "tqc,tqm5200"; 14 model = "tqc,tqm5200";
21 compatible = "tqc,tqm5200"; 15 compatible = "tqc,tqm5200";
@@ -45,29 +39,28 @@
45 }; 39 };
46 40
47 soc5200@f0000000 { 41 soc5200@f0000000 {
48 model = "fsl,mpc5200"; 42 #address-cells = <1>;
49 compatible = "fsl,mpc5200"; 43 #size-cells = <1>;
50 revision = ""; // from bootloader 44 compatible = "fsl,mpc5200-immr";
51 device_type = "soc";
52 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
53 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
54 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
55 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
56 49
57 cdm@200 { 50 cdm@200 {
58 compatible = "mpc5200-cdm"; 51 compatible = "fsl,mpc5200-cdm";
59 reg = <200 38>; 52 reg = <200 38>;
60 }; 53 };
61 54
62 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
63 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
64 interrupt-controller; 57 interrupt-controller;
65 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
66 compatible = "mpc5200-pic"; 59 compatible = "fsl,mpc5200-pic";
67 reg = <500 80>; 60 reg = <500 80>;
68 }; 61 };
69 62
70 gpt@600 { // General Purpose Timer 63 timer@600 { // General Purpose Timer
71 compatible = "fsl,mpc5200-gpt"; 64 compatible = "fsl,mpc5200-gpt";
72 reg = <600 10>; 65 reg = <600 10>;
73 interrupts = <1 9 0>; 66 interrupts = <1 9 0>;
@@ -76,21 +69,21 @@
76 }; 69 };
77 70
78 gpio@b00 { 71 gpio@b00 {
79 compatible = "mpc5200-gpio"; 72 compatible = "fsl,mpc5200-gpio";
80 reg = <b00 40>; 73 reg = <b00 40>;
81 interrupts = <1 7 0>; 74 interrupts = <1 7 0>;
82 interrupt-parent = <&mpc5200_pic>; 75 interrupt-parent = <&mpc5200_pic>;
83 }; 76 };
84 77
85 usb@1000 { 78 usb@1000 {
86 compatible = "mpc5200-ohci","ohci-be"; 79 compatible = "fsl,mpc5200-ohci","ohci-be";
87 reg = <1000 ff>; 80 reg = <1000 ff>;
88 interrupts = <2 6 0>; 81 interrupts = <2 6 0>;
89 interrupt-parent = <&mpc5200_pic>; 82 interrupt-parent = <&mpc5200_pic>;
90 }; 83 };
91 84
92 dma-controller@1200 { 85 dma-controller@1200 {
93 compatible = "mpc5200-bestcomm"; 86 compatible = "fsl,mpc5200-bestcomm";
94 reg = <1200 80>; 87 reg = <1200 80>;
95 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 88 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
96 3 4 0 3 5 0 3 6 0 3 7 0 89 3 4 0 3 5 0 3 6 0 3 7 0
@@ -100,13 +93,13 @@
100 }; 93 };
101 94
102 xlb@1f00 { 95 xlb@1f00 {
103 compatible = "mpc5200-xlb"; 96 compatible = "fsl,mpc5200-xlb";
104 reg = <1f00 100>; 97 reg = <1f00 100>;
105 }; 98 };
106 99
107 serial@2000 { // PSC1 100 serial@2000 { // PSC1
108 device_type = "serial"; 101 device_type = "serial";
109 compatible = "mpc5200-psc-uart"; 102 compatible = "fsl,mpc5200-psc-uart";
110 port-number = <0>; // Logical port assignment 103 port-number = <0>; // Logical port assignment
111 reg = <2000 100>; 104 reg = <2000 100>;
112 interrupts = <2 1 0>; 105 interrupts = <2 1 0>;
@@ -115,7 +108,7 @@
115 108
116 serial@2200 { // PSC2 109 serial@2200 { // PSC2
117 device_type = "serial"; 110 device_type = "serial";
118 compatible = "mpc5200-psc-uart"; 111 compatible = "fsl,mpc5200-psc-uart";
119 port-number = <1>; // Logical port assignment 112 port-number = <1>; // Logical port assignment
120 reg = <2200 100>; 113 reg = <2200 100>;
121 interrupts = <2 2 0>; 114 interrupts = <2 2 0>;
@@ -124,7 +117,7 @@
124 117
125 serial@2400 { // PSC3 118 serial@2400 { // PSC3
126 device_type = "serial"; 119 device_type = "serial";
127 compatible = "mpc5200-psc-uart"; 120 compatible = "fsl,mpc5200-psc-uart";
128 port-number = <2>; // Logical port assignment 121 port-number = <2>; // Logical port assignment
129 reg = <2400 100>; 122 reg = <2400 100>;
130 interrupts = <2 3 0>; 123 interrupts = <2 3 0>;
@@ -133,22 +126,22 @@
133 126
134 ethernet@3000 { 127 ethernet@3000 {
135 device_type = "network"; 128 device_type = "network";
136 compatible = "mpc5200-fec"; 129 compatible = "fsl,mpc5200-fec";
137 reg = <3000 800>; 130 reg = <3000 800>;
138 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 131 local-mac-address = [ 00 00 00 00 00 00 ];
139 interrupts = <2 5 0>; 132 interrupts = <2 5 0>;
140 interrupt-parent = <&mpc5200_pic>; 133 interrupt-parent = <&mpc5200_pic>;
141 }; 134 };
142 135
143 ata@3a00 { 136 ata@3a00 {
144 compatible = "mpc5200-ata"; 137 compatible = "fsl,mpc5200-ata";
145 reg = <3a00 100>; 138 reg = <3a00 100>;
146 interrupts = <2 7 0>; 139 interrupts = <2 7 0>;
147 interrupt-parent = <&mpc5200_pic>; 140 interrupt-parent = <&mpc5200_pic>;
148 }; 141 };
149 142
150 i2c@3d40 { 143 i2c@3d40 {
151 compatible = "mpc5200-i2c","fsl-i2c"; 144 compatible = "fsl,mpc5200-i2c","fsl-i2c";
152 reg = <3d40 40>; 145 reg = <3d40 40>;
153 interrupts = <2 10 0>; 146 interrupts = <2 10 0>;
154 interrupt-parent = <&mpc5200_pic>; 147 interrupt-parent = <&mpc5200_pic>;
@@ -156,7 +149,7 @@
156 }; 149 };
157 150
158 sram@8000 { 151 sram@8000 {
159 compatible = "mpc5200-sram"; 152 compatible = "fsl,mpc5200-sram";
160 reg = <8000 4000>; 153 reg = <8000 4000>;
161 }; 154 };
162 }; 155 };
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index b6c68ef46809..9960421eb6b9 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -126,7 +126,7 @@ int serial_console_init(void)
126 dt_is_compatible(devp, "fsl,cpm2-scc-uart") || 126 dt_is_compatible(devp, "fsl,cpm2-scc-uart") ||
127 dt_is_compatible(devp, "fsl,cpm2-smc-uart")) 127 dt_is_compatible(devp, "fsl,cpm2-smc-uart"))
128 rc = cpm_console_init(devp, &serial_cd); 128 rc = cpm_console_init(devp, &serial_cd);
129 else if (dt_is_compatible(devp, "mpc5200-psc-uart")) 129 else if (dt_is_compatible(devp, "fsl,mpc5200-psc-uart"))
130 rc = mpc5200_psc_console_init(devp, &serial_cd); 130 rc = mpc5200_psc_console_init(devp, &serial_cd);
131 else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") || 131 else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") ||
132 dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a")) 132 dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a"))
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-07 06:19:45 -0500