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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-24 23:26:25 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-24 23:26:25 -0400
commit0de085bb474f64e4fdb2f1ff3268590792648c7b (patch)
tree67c88c8215b85e01430531dba7d7c8ad73173b67 /arch/powerpc/boot
parent3836df6b520a2f93033bf53200b12a2cb5137395 (diff)
parente58712111fe6eb7573fd6dd12d80de3bec13f277 (diff)
Merge branch 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc
* 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc: (25 commits) [POWERPC] 85xx: Added needed MPC85xx PCI device IDs [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs [POWERPC] 85xxCDS: MPC8548 DTS cleanup. [POWERPC] 85xxCDS: Misc 8548 PCI Corrections. [POWERPC] 85xxCDS: Delay 8259 cascade hookup. [POWERPC] 85xxCDS: Make sure restart resets the PCI bus. [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line. [POWERPC] FSL: Add support for PCI-X controllers [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB [POWERPC] Provide ability to setup P2P bridge registers from struct resource [POWERPC] Add basic PCI/PCI Express support for 8544DS board [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime [POWERPC] Removed setup_indirect_pci_nomap [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDS [POWERPC] 85xx: Added 8568 PCIe support [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected [POWERPC] Add basic PCI node for mpc8568mds board [POWERPC] Use Freescale pci/pcie common code for 85xx boards [POWERPC] Update PCI nodes in the 83xx/85xx boards device tree [POWERPC] Add 8548 CDS PCI express controller node and PCI-X device node ...
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts211
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts250
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts54
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts8
15 files changed, 463 insertions, 90 deletions
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index a1533cc07d09..c5adbe40364e 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -178,7 +178,7 @@
178 #size-cells = <2>; 178 #size-cells = <2>;
179 #address-cells = <3>; 179 #address-cells = <3>;
180 reg = <8500 100>; 180 reg = <8500 100>;
181 compatible = "83xx"; 181 compatible = "fsl,mpc8349-pci";
182 device_type = "pci"; 182 device_type = "pci";
183 }; 183 };
184 184
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 4fc0c4d34aa8..f158ed781ba8 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -154,7 +154,7 @@
154 #size-cells = <2>; 154 #size-cells = <2>;
155 #address-cells = <3>; 155 #address-cells = <3>;
156 reg = <8500 100>; 156 reg = <8500 100>;
157 compatible = "83xx"; 157 compatible = "fsl,mpc8349-pci";
158 device_type = "pci"; 158 device_type = "pci";
159 }; 159 };
160 160
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 447c03ffabbc..7c4beff3e200 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -123,7 +123,7 @@
123 #size-cells = <2>; 123 #size-cells = <2>;
124 #address-cells = <3>; 124 #address-cells = <3>;
125 reg = <8500 100>; 125 reg = <8500 100>;
126 compatible = "83xx"; 126 compatible = "fsl,mpc8349-pci";
127 device_type = "pci"; 127 device_type = "pci";
128 }; 128 };
129 129
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index ae9bca575453..502f47c01797 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -197,7 +197,7 @@
197 #size-cells = <2>; 197 #size-cells = <2>;
198 #address-cells = <3>; 198 #address-cells = <3>;
199 reg = <8500 100>; 199 reg = <8500 100>;
200 compatible = "83xx"; 200 compatible = "fsl,mpc8349-pci";
201 device_type = "pci"; 201 device_type = "pci";
202 }; 202 };
203 203
@@ -222,7 +222,7 @@
222 #size-cells = <2>; 222 #size-cells = <2>;
223 #address-cells = <3>; 223 #address-cells = <3>;
224 reg = <8600 100>; 224 reg = <8600 100>;
225 compatible = "83xx"; 225 compatible = "fsl,mpc8349-pci";
226 device_type = "pci"; 226 device_type = "pci";
227 }; 227 };
228 228
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f636528a3c72..0b8387141d88 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -154,7 +154,7 @@
154 #size-cells = <2>; 154 #size-cells = <2>;
155 #address-cells = <3>; 155 #address-cells = <3>;
156 reg = <8600 100>; 156 reg = <8600 100>;
157 compatible = "83xx"; 157 compatible = "fsl,mpc8349-pci";
158 device_type = "pci"; 158 device_type = "pci";
159 }; 159 };
160 160
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 310e877826b4..481099756e44 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -241,7 +241,7 @@
241 #size-cells = <2>; 241 #size-cells = <2>;
242 #address-cells = <3>; 242 #address-cells = <3>;
243 reg = <8500 100>; 243 reg = <8500 100>;
244 compatible = "83xx"; 244 compatible = "fsl,mpc8349-pci";
245 device_type = "pci"; 245 device_type = "pci";
246 }; 246 };
247 247
@@ -301,7 +301,7 @@
301 #size-cells = <2>; 301 #size-cells = <2>;
302 #address-cells = <3>; 302 #address-cells = <3>;
303 reg = <8600 100>; 303 reg = <8600 100>;
304 compatible = "83xx"; 304 compatible = "fsl,mpc8349-pci";
305 device_type = "pci"; 305 device_type = "pci";
306 }; 306 };
307 307
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 1e914f31dd92..e3f7c1282068 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -169,7 +169,7 @@
169 #size-cells = <2>; 169 #size-cells = <2>;
170 #address-cells = <3>; 170 #address-cells = <3>;
171 reg = <8500 100>; 171 reg = <8500 100>;
172 compatible = "83xx"; 172 compatible = "fsl,mpc8349-pci";
173 device_type = "pci"; 173 device_type = "pci";
174 }; 174 };
175 175
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 364a969f5c2f..fc8dff9f6201 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -258,7 +258,7 @@
258 #size-cells = <2>; 258 #size-cells = <2>;
259 #address-cells = <3>; 259 #address-cells = <3>;
260 reg = <8000 1000>; 260 reg = <8000 1000>;
261 compatible = "85xx"; 261 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
262 device_type = "pci"; 262 device_type = "pci";
263 }; 263 };
264 264
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 070206fffe88..fb0b647f8c2a 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -193,7 +193,7 @@
193 #size-cells = <2>; 193 #size-cells = <2>;
194 #address-cells = <3>; 194 #address-cells = <3>;
195 reg = <8000 1000>; 195 reg = <8000 1000>;
196 compatible = "85xx"; 196 compatible = "fsl,mpc8540-pci";
197 device_type = "pci"; 197 device_type = "pci";
198 198
199 i8259@19000 { 199 i8259@19000 {
@@ -230,7 +230,7 @@
230 #size-cells = <2>; 230 #size-cells = <2>;
231 #address-cells = <3>; 231 #address-cells = <3>;
232 reg = <9000 1000>; 232 reg = <9000 1000>;
233 compatible = "85xx"; 233 compatible = "fsl,mpc8540-pci";
234 device_type = "pci"; 234 device_type = "pci";
235 }; 235 };
236 236
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 828592592460..4a900c6df762 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -137,6 +137,217 @@
137 interrupt-parent = <&mpic>; 137 interrupt-parent = <&mpic>;
138 }; 138 };
139 139
140 pci@8000 {
141 compatible = "fsl,mpc8540-pci";
142 device_type = "pci";
143 interrupt-map-mask = <f800 0 0 7>;
144 interrupt-map = <
145
146 /* IDSEL 0x11 J17 Slot 1 */
147 8800 0 0 1 &mpic 2 1
148 8800 0 0 2 &mpic 3 1
149 8800 0 0 3 &mpic 4 1
150 8800 0 0 4 &mpic 1 1
151
152 /* IDSEL 0x12 J16 Slot 2 */
153
154 9000 0 0 1 &mpic 3 1
155 9000 0 0 2 &mpic 4 1
156 9000 0 0 3 &mpic 2 1
157 9000 0 0 4 &mpic 1 1>;
158
159 interrupt-parent = <&mpic>;
160 interrupts = <18 2>;
161 bus-range = <0 ff>;
162 ranges = <02000000 0 80000000 80000000 0 10000000
163 01000000 0 00000000 e2000000 0 00800000>;
164 clock-frequency = <3f940aa>;
165 #interrupt-cells = <1>;
166 #size-cells = <2>;
167 #address-cells = <3>;
168 reg = <8000 1000>;
169 };
170
171 pcie@9000 {
172 compatible = "fsl,mpc8548-pcie";
173 device_type = "pci";
174 #interrupt-cells = <1>;
175 #size-cells = <2>;
176 #address-cells = <3>;
177 reg = <9000 1000>;
178 bus-range = <0 ff>;
179 ranges = <02000000 0 90000000 90000000 0 10000000
180 01000000 0 00000000 e3000000 0 00800000>;
181 clock-frequency = <1fca055>;
182 interrupt-parent = <&mpic>;
183 interrupts = <1a 2>;
184 interrupt-map-mask = <f800 0 0 7>;
185 interrupt-map = <
186 /* IDSEL 0x0 */
187 0000 0 0 1 &mpic 4 1
188 0000 0 0 2 &mpic 5 1
189 0000 0 0 3 &mpic 6 1
190 0000 0 0 4 &mpic 7 1
191 >;
192 };
193
194 pcie@a000 {
195 compatible = "fsl,mpc8548-pcie";
196 device_type = "pci";
197 #interrupt-cells = <1>;
198 #size-cells = <2>;
199 #address-cells = <3>;
200 reg = <a000 1000>;
201 bus-range = <0 ff>;
202 ranges = <02000000 0 a0000000 a0000000 0 10000000
203 01000000 0 00000000 e2800000 0 00800000>;
204 clock-frequency = <1fca055>;
205 interrupt-parent = <&mpic>;
206 interrupts = <19 2>;
207 interrupt-map-mask = <f800 0 0 7>;
208 interrupt-map = <
209 /* IDSEL 0x0 */
210 0000 0 0 1 &mpic 0 1
211 0000 0 0 2 &mpic 1 1
212 0000 0 0 3 &mpic 2 1
213 0000 0 0 4 &mpic 3 1
214 >;
215 };
216
217 pcie@b000 {
218 compatible = "fsl,mpc8548-pcie";
219 device_type = "pci";
220 #interrupt-cells = <1>;
221 #size-cells = <2>;
222 #address-cells = <3>;
223 reg = <b000 1000>;
224 bus-range = <0 ff>;
225 ranges = <02000000 0 b0000000 b0000000 0 10000000
226 01000000 0 00000000 e3800000 0 00800000>;
227 clock-frequency = <1fca055>;
228 interrupt-parent = <&mpic>;
229 interrupts = <1b 2>;
230 interrupt-map-mask = <f800 0 0 7>;
231 interrupt-map = <
232
233 // IDSEL 0x1a
234 d000 0 0 1 &i8259 6 2
235 d000 0 0 2 &i8259 3 2
236 d000 0 0 3 &i8259 4 2
237 d000 0 0 4 &i8259 5 2
238
239 // IDSEL 0x1b
240 d800 0 0 1 &i8259 5 2
241 d800 0 0 2 &i8259 0 0
242 d800 0 0 3 &i8259 0 0
243 d800 0 0 4 &i8259 0 0
244
245 // IDSEL 0x1c USB
246 e000 0 0 1 &i8259 9 2
247 e000 0 0 2 &i8259 a 2
248 e000 0 0 3 &i8259 c 2
249 e000 0 0 4 &i8259 7 2
250
251 // IDSEL 0x1d Audio
252 e800 0 0 1 &i8259 9 2
253 e800 0 0 2 &i8259 a 2
254 e800 0 0 3 &i8259 b 2
255 e800 0 0 4 &i8259 0 0
256
257 // IDSEL 0x1e Legacy
258 f000 0 0 1 &i8259 c 2
259 f000 0 0 2 &i8259 0 0
260 f000 0 0 3 &i8259 0 0
261 f000 0 0 4 &i8259 0 0
262
263 // IDSEL 0x1f IDE/SATA
264 f800 0 0 1 &i8259 6 2
265 f800 0 0 2 &i8259 0 0
266 f800 0 0 3 &i8259 0 0
267 f800 0 0 4 &i8259 0 0
268 >;
269 uli1575@0 {
270 reg = <0 0 0 0 0>;
271 #size-cells = <2>;
272 #address-cells = <3>;
273 ranges = <02000000 0 b0000000
274 02000000 0 b0000000
275 0 10000000
276 01000000 0 00000000
277 01000000 0 00000000
278 0 00080000>;
279
280 pci_bridge@0 {
281 reg = <0 0 0 0 0>;
282 #size-cells = <2>;
283 #address-cells = <3>;
284 ranges = <02000000 0 b0000000
285 02000000 0 b0000000
286 0 20000000
287 01000000 0 00000000
288 01000000 0 00000000
289 0 00100000>;
290
291 isa@1e {
292 device_type = "isa";
293 #interrupt-cells = <2>;
294 #size-cells = <1>;
295 #address-cells = <2>;
296 reg = <f000 0 0 0 0>;
297 ranges = <1 0 01000000 0 0
298 00001000>;
299 interrupt-parent = <&i8259>;
300
301 i8259: interrupt-controller@20 {
302 reg = <1 20 2
303 1 a0 2
304 1 4d0 2>;
305 clock-frequency = <0>;
306 interrupt-controller;
307 device_type = "interrupt-controller";
308 #address-cells = <0>;
309 #interrupt-cells = <2>;
310 built-in;
311 compatible = "chrp,iic";
312 interrupts = <9 2>;
313 interrupt-parent =
314 <&mpic>;
315 };
316
317 i8042@60 {
318 #size-cells = <0>;
319 #address-cells = <1>;
320 reg = <1 60 1 1 64 1>;
321 interrupts = <1 3 c 3>;
322 interrupt-parent =
323 <&i8259>;
324
325 keyboard@0 {
326 reg = <0>;
327 compatible = "pnpPNP,303";
328 };
329
330 mouse@1 {
331 reg = <1>;
332 compatible = "pnpPNP,f03";
333 };
334 };
335
336 rtc@70 {
337 compatible =
338 "pnpPNP,b00";
339 reg = <1 70 2>;
340 };
341
342 gpio@400 {
343 reg = <1 400 80>;
344 };
345 };
346 };
347 };
348
349 };
350
140 mpic: pic@40000 { 351 mpic: pic@40000 {
141 clock-frequency = <0>; 352 clock-frequency = <0>;
142 interrupt-controller; 353 interrupt-controller;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 9d0b84b66cd4..d215d21fff42 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -1,5 +1,5 @@
1/* 1/*
2 * MPC8555 CDS Device Tree Source 2 * MPC8548 CDS Device Tree Source
3 * 3 *
4 * Copyright 2006 Freescale Semiconductor Inc. 4 * Copyright 2006 Freescale Semiconductor Inc.
5 * 5 *
@@ -44,8 +44,14 @@
44 #size-cells = <1>; 44 #size-cells = <1>;
45 #interrupt-cells = <2>; 45 #interrupt-cells = <2>;
46 device_type = "soc"; 46 device_type = "soc";
47 ranges = <0 e0000000 00100000>; 47 ranges = <00001000 e0001000 000ff000
48 reg = <e0000000 00100000>; // CCSRBAR 1M 48 80000000 80000000 10000000
49 e2000000 e2000000 00800000
50 90000000 90000000 10000000
51 e2800000 e2800000 00800000
52 a0000000 a0000000 20000000
53 e3000000 e3000000 01000000>;
54 reg = <e0000000 00001000>; // CCSRBAR
49 bus-frequency = <0>; 55 bus-frequency = <0>;
50 56
51 memory-controller@2000 { 57 memory-controller@2000 {
@@ -162,8 +168,8 @@
162 serial@4500 { 168 serial@4500 {
163 device_type = "serial"; 169 device_type = "serial";
164 compatible = "ns16550"; 170 compatible = "ns16550";
165 reg = <4500 100>; // reg base, size 171 reg = <4500 100>; // reg base, size
166 clock-frequency = <0>; // should we fill in in uboot? 172 clock-frequency = <0>; // should we fill in in uboot?
167 interrupts = <2a 2>; 173 interrupts = <2a 2>;
168 interrupt-parent = <&mpic>; 174 interrupt-parent = <&mpic>;
169 }; 175 };
@@ -172,7 +178,7 @@
172 device_type = "serial"; 178 device_type = "serial";
173 compatible = "ns16550"; 179 compatible = "ns16550";
174 reg = <4600 100>; // reg base, size 180 reg = <4600 100>; // reg base, size
175 clock-frequency = <0>; // should we fill in in uboot? 181 clock-frequency = <0>; // should we fill in in uboot?
176 interrupts = <2a 2>; 182 interrupts = <2a 2>;
177 interrupt-parent = <&mpic>; 183 interrupt-parent = <&mpic>;
178 }; 184 };
@@ -183,77 +189,154 @@
183 fsl,has-rstcr; 189 fsl,has-rstcr;
184 }; 190 };
185 191
186 pci1: pci@8000 { 192 pci@8000 {
187 interrupt-map-mask = <1f800 0 0 7>; 193 interrupt-map-mask = <f800 0 0 7>;
188 interrupt-map = < 194 interrupt-map = <
195 /* IDSEL 0x4 (PCIX Slot 2) */
196 02000 0 0 1 &mpic 0 1
197 02000 0 0 2 &mpic 1 1
198 02000 0 0 3 &mpic 2 1
199 02000 0 0 4 &mpic 3 1
200
201 /* IDSEL 0x5 (PCIX Slot 3) */
202 02800 0 0 1 &mpic 1 1
203 02800 0 0 2 &mpic 2 1
204 02800 0 0 3 &mpic 3 1
205 02800 0 0 4 &mpic 0 1
206
207 /* IDSEL 0x6 (PCIX Slot 4) */
208 03000 0 0 1 &mpic 2 1
209 03000 0 0 2 &mpic 3 1
210 03000 0 0 3 &mpic 0 1
211 03000 0 0 4 &mpic 1 1
212
213 /* IDSEL 0x8 (PCIX Slot 5) */
214 04000 0 0 1 &mpic 0 1
215 04000 0 0 2 &mpic 1 1
216 04000 0 0 3 &mpic 2 1
217 04000 0 0 4 &mpic 3 1
218
219 /* IDSEL 0xC (Tsi310 bridge) */
220 06000 0 0 1 &mpic 0 1
221 06000 0 0 2 &mpic 1 1
222 06000 0 0 3 &mpic 2 1
223 06000 0 0 4 &mpic 3 1
224
225 /* IDSEL 0x14 (Slot 2) */
226 0a000 0 0 1 &mpic 0 1
227 0a000 0 0 2 &mpic 1 1
228 0a000 0 0 3 &mpic 2 1
229 0a000 0 0 4 &mpic 3 1
230
231 /* IDSEL 0x15 (Slot 3) */
232 0a800 0 0 1 &mpic 1 1
233 0a800 0 0 2 &mpic 2 1
234 0a800 0 0 3 &mpic 3 1
235 0a800 0 0 4 &mpic 0 1
236
237 /* IDSEL 0x16 (Slot 4) */
238 0b000 0 0 1 &mpic 2 1
239 0b000 0 0 2 &mpic 3 1
240 0b000 0 0 3 &mpic 0 1
241 0b000 0 0 4 &mpic 1 1
242
243 /* IDSEL 0x18 (Slot 5) */
244 0c000 0 0 1 &mpic 0 1
245 0c000 0 0 2 &mpic 1 1
246 0c000 0 0 3 &mpic 2 1
247 0c000 0 0 4 &mpic 3 1
248
249 /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
250 0E000 0 0 1 &mpic 0 1
251 0E000 0 0 2 &mpic 1 1
252 0E000 0 0 3 &mpic 2 1
253 0E000 0 0 4 &mpic 3 1>;
189 254
190 /* IDSEL 0x10 */
191 08000 0 0 1 &mpic 0 1
192 08000 0 0 2 &mpic 1 1
193 08000 0 0 3 &mpic 2 1
194 08000 0 0 4 &mpic 3 1
195
196 /* IDSEL 0x11 */
197 08800 0 0 1 &mpic 0 1
198 08800 0 0 2 &mpic 1 1
199 08800 0 0 3 &mpic 2 1
200 08800 0 0 4 &mpic 3 1
201
202 /* IDSEL 0x12 (Slot 1) */
203 09000 0 0 1 &mpic 0 1
204 09000 0 0 2 &mpic 1 1
205 09000 0 0 3 &mpic 2 1
206 09000 0 0 4 &mpic 3 1
207
208 /* IDSEL 0x13 (Slot 2) */
209 09800 0 0 1 &mpic 1 1
210 09800 0 0 2 &mpic 2 1
211 09800 0 0 3 &mpic 3 1
212 09800 0 0 4 &mpic 0 1
213
214 /* IDSEL 0x14 (Slot 3) */
215 0a000 0 0 1 &mpic 2 1
216 0a000 0 0 2 &mpic 3 1
217 0a000 0 0 3 &mpic 0 1
218 0a000 0 0 4 &mpic 1 1
219
220 /* IDSEL 0x15 (Slot 4) */
221 0a800 0 0 1 &mpic 3 1
222 0a800 0 0 2 &mpic 0 1
223 0a800 0 0 3 &mpic 1 1
224 0a800 0 0 4 &mpic 2 1
225
226 /* Bus 1 (Tundra Bridge) */
227 /* IDSEL 0x12 (ISA bridge) */
228 19000 0 0 1 &mpic 0 1
229 19000 0 0 2 &mpic 1 1
230 19000 0 0 3 &mpic 2 1
231 19000 0 0 4 &mpic 3 1>;
232 interrupt-parent = <&mpic>; 255 interrupt-parent = <&mpic>;
233 interrupts = <18 2>; 256 interrupts = <18 2>;
234 bus-range = <0 0>; 257 bus-range = <0 0>;
235 ranges = <02000000 0 80000000 80000000 0 20000000 258 ranges = <02000000 0 80000000 80000000 0 10000000
236 01000000 0 00000000 e2000000 0 00100000>; 259 01000000 0 00000000 e2000000 0 00800000>;
237 clock-frequency = <3f940aa>; 260 clock-frequency = <3f940aa>;
238 #interrupt-cells = <1>; 261 #interrupt-cells = <1>;
239 #size-cells = <2>; 262 #size-cells = <2>;
240 #address-cells = <3>; 263 #address-cells = <3>;
241 reg = <8000 1000>; 264 reg = <8000 1000>;
242 compatible = "85xx"; 265 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
243 device_type = "pci"; 266 device_type = "pci";
244 267
245 i8259@19000 { 268 pci_bridge@1c {
246 clock-frequency = <0>; 269 interrupt-map-mask = <f800 0 0 7>;
247 interrupt-controller; 270 interrupt-map = <
248 device_type = "interrupt-controller"; 271
249 reg = <19000 0 0 0 1>; 272 /* IDSEL 0x00 (PrPMC Site) */
250 #address-cells = <0>; 273 0000 0 0 1 &mpic 0 1
251 #interrupt-cells = <2>; 274 0000 0 0 2 &mpic 1 1
252 built-in; 275 0000 0 0 3 &mpic 2 1
253 compatible = "chrp,iic"; 276 0000 0 0 4 &mpic 3 1
254 big-endian; 277
255 interrupts = <1>; 278 /* IDSEL 0x04 (VIA chip) */
256 interrupt-parent = <&pci1>; 279 2000 0 0 1 &mpic 0 1
280 2000 0 0 2 &mpic 1 1
281 2000 0 0 3 &mpic 2 1
282 2000 0 0 4 &mpic 3 1
283
284 /* IDSEL 0x05 (8139) */
285 2800 0 0 1 &mpic 1 1
286
287 /* IDSEL 0x06 (Slot 6) */
288 3000 0 0 1 &mpic 2 1
289 3000 0 0 2 &mpic 3 1
290 3000 0 0 3 &mpic 0 1
291 3000 0 0 4 &mpic 1 1
292
293 /* IDESL 0x07 (Slot 7) */
294 3800 0 0 1 &mpic 3 1
295 3800 0 0 2 &mpic 0 1
296 3800 0 0 3 &mpic 1 1
297 3800 0 0 4 &mpic 2 1>;
298
299 reg = <e000 0 0 0 0>;
300 #interrupt-cells = <1>;
301 #size-cells = <2>;
302 #address-cells = <3>;
303 ranges = <02000000 0 80000000
304 02000000 0 80000000
305 0 20000000
306 01000000 0 00000000
307 01000000 0 00000000
308 0 00080000>;
309 clock-frequency = <1fca055>;
310
311 isa@4 {
312 device_type = "isa";
313 #interrupt-cells = <2>;
314 #size-cells = <1>;
315 #address-cells = <2>;
316 reg = <2000 0 0 0 0>;
317 ranges = <1 0 01000000 0 0 00001000>;
318 interrupt-parent = <&i8259>;
319
320 i8259: interrupt-controller@20 {
321 clock-frequency = <0>;
322 interrupt-controller;
323 device_type = "interrupt-controller";
324 reg = <1 20 2
325 1 a0 2
326 1 4d0 2>;
327 #address-cells = <0>;
328 #interrupt-cells = <2>;
329 built-in;
330 compatible = "chrp,iic";
331 interrupts = <0 1>;
332 interrupt-parent = <&mpic>;
333 };
334
335 rtc@70 {
336 compatible = "pnpPNP,b00";
337 reg = <1 70 2>;
338 };
339 };
257 }; 340 };
258 }; 341 };
259 342
@@ -263,20 +346,45 @@
263 346
264 /* IDSEL 0x15 */ 347 /* IDSEL 0x15 */
265 a800 0 0 1 &mpic b 1 348 a800 0 0 1 &mpic b 1
266 a800 0 0 2 &mpic b 1 349 a800 0 0 2 &mpic 1 1
267 a800 0 0 3 &mpic b 1 350 a800 0 0 3 &mpic 2 1
268 a800 0 0 4 &mpic b 1>; 351 a800 0 0 4 &mpic 3 1>;
352
269 interrupt-parent = <&mpic>; 353 interrupt-parent = <&mpic>;
270 interrupts = <19 2>; 354 interrupts = <19 2>;
271 bus-range = <0 0>; 355 bus-range = <0 0>;
272 ranges = <02000000 0 a0000000 a0000000 0 20000000 356 ranges = <02000000 0 90000000 90000000 0 10000000
273 01000000 0 00000000 e3000000 0 00100000>; 357 01000000 0 00000000 e2800000 0 00800000>;
274 clock-frequency = <3f940aa>; 358 clock-frequency = <3f940aa>;
275 #interrupt-cells = <1>; 359 #interrupt-cells = <1>;
276 #size-cells = <2>; 360 #size-cells = <2>;
277 #address-cells = <3>; 361 #address-cells = <3>;
278 reg = <9000 1000>; 362 reg = <9000 1000>;
279 compatible = "85xx"; 363 compatible = "fsl,mpc8540-pci";
364 device_type = "pci";
365 };
366 /* PCI Express */
367 pcie@a000 {
368 interrupt-map-mask = <f800 0 0 7>;
369 interrupt-map = <
370
371 /* IDSEL 0x0 (PEX) */
372 00000 0 0 1 &mpic 0 1
373 00000 0 0 2 &mpic 1 1
374 00000 0 0 3 &mpic 2 1
375 00000 0 0 4 &mpic 3 1>;
376
377 interrupt-parent = <&mpic>;
378 interrupts = <1a 2>;
379 bus-range = <0 ff>;
380 ranges = <02000000 0 a0000000 a0000000 0 20000000
381 01000000 0 00000000 e3000000 0 08000000>;
382 clock-frequency = <1fca055>;
383 #interrupt-cells = <1>;
384 #size-cells = <2>;
385 #address-cells = <3>;
386 reg = <a000 1000>;
387 compatible = "fsl,mpc8548-pcie";
280 device_type = "pci"; 388 device_type = "pci";
281 }; 389 };
282 390
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 17e45d9a382a..c3c888252121 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -193,7 +193,7 @@
193 #size-cells = <2>; 193 #size-cells = <2>;
194 #address-cells = <3>; 194 #address-cells = <3>;
195 reg = <8000 1000>; 195 reg = <8000 1000>;
196 compatible = "85xx"; 196 compatible = "fsl,mpc8540-pci";
197 device_type = "pci"; 197 device_type = "pci";
198 198
199 i8259@19000 { 199 i8259@19000 {
@@ -230,7 +230,7 @@
230 #size-cells = <2>; 230 #size-cells = <2>;
231 #address-cells = <3>; 231 #address-cells = <3>;
232 reg = <9000 1000>; 232 reg = <9000 1000>;
233 compatible = "85xx"; 233 compatible = "fsl,mpc8540-pci";
234 device_type = "pci"; 234 device_type = "pci";
235 }; 235 };
236 236
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 21ccaaa27993..16dbe848cecf 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -136,7 +136,7 @@
136 #interrupt-cells = <1>; 136 #interrupt-cells = <1>;
137 #size-cells = <2>; 137 #size-cells = <2>;
138 #address-cells = <3>; 138 #address-cells = <3>;
139 compatible = "85xx"; 139 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
140 device_type = "pci"; 140 device_type = "pci";
141 reg = <8000 1000>; 141 reg = <8000 1000>;
142 clock-frequency = <3f940aa>; 142 clock-frequency = <3f940aa>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 6bb18f2807a8..99fa5a0ea425 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -170,6 +170,60 @@
170 interrupt-parent = <&mpic>; 170 interrupt-parent = <&mpic>;
171 }; 171 };
172 172
173 pci@8000 {
174 interrupt-map-mask = <f800 0 0 7>;
175 interrupt-map = <
176 /* IDSEL 0x12 AD18 */
177 9000 0 0 1 &mpic 5 1
178 9000 0 0 2 &mpic 6 1
179 9000 0 0 3 &mpic 7 1
180 9000 0 0 4 &mpic 4 1
181
182 /* IDSEL 0x13 AD19 */
183 9800 0 0 1 &mpic 6 1
184 9800 0 0 2 &mpic 7 1
185 9800 0 0 3 &mpic 4 1
186 9800 0 0 4 &mpic 5 1>;
187
188 interrupt-parent = <&mpic>;
189 interrupts = <18 2>;
190 bus-range = <0 ff>;
191 ranges = <02000000 0 80000000 80000000 0 20000000
192 01000000 0 00000000 e2000000 0 00800000>;
193 clock-frequency = <3f940aa>;
194 #interrupt-cells = <1>;
195 #size-cells = <2>;
196 #address-cells = <3>;
197 reg = <8000 1000>;
198 compatible = "fsl,mpc8540-pci";
199 device_type = "pci";
200 };
201
202 /* PCI Express */
203 pcie@a000 {
204 interrupt-map-mask = <f800 0 0 7>;
205 interrupt-map = <
206
207 /* IDSEL 0x0 (PEX) */
208 00000 0 0 1 &mpic 0 1
209 00000 0 0 2 &mpic 1 1
210 00000 0 0 3 &mpic 2 1
211 00000 0 0 4 &mpic 3 1>;
212
213 interrupt-parent = <&mpic>;
214 interrupts = <1a 2>;
215 bus-range = <0 ff>;
216 ranges = <02000000 0 a0000000 a0000000 0 20000000
217 01000000 0 00000000 e3000000 0 08000000>;
218 clock-frequency = <1fca055>;
219 #interrupt-cells = <1>;
220 #size-cells = <2>;
221 #address-cells = <3>;
222 reg = <a000 1000>;
223 compatible = "fsl,mpc8548-pcie";
224 device_type = "pci";
225 };
226
173 serial@4600 { 227 serial@4600 {
174 device_type = "serial"; 228 device_type = "serial";
175 compatible = "ns16550"; 229 compatible = "ns16550";
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 6a78a2b37c08..5d82709cfcbb 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -211,8 +211,8 @@
211 interrupt-parent = <&mpic>; 211 interrupt-parent = <&mpic>;
212 }; 212 };
213 213
214 pci@8000 { 214 pcie@8000 {
215 compatible = "86xx"; 215 compatible = "fsl,mpc8641-pcie";
216 device_type = "pci"; 216 device_type = "pci";
217 #interrupt-cells = <1>; 217 #interrupt-cells = <1>;
218 #size-cells = <2>; 218 #size-cells = <2>;
@@ -399,8 +399,8 @@
399 399
400 }; 400 };
401 401
402 pci@9000 { 402 pcie@9000 {
403 compatible = "86xx"; 403 compatible = "fsl,mpc8641-pcie";
404 device_type = "pci"; 404 device_type = "pci";
405 #interrupt-cells = <1>; 405 #interrupt-cells = <1>;
406 #size-cells = <2>; 406 #size-cells = <2>;
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-10 15:18:29 -0500