powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100

Add support for the Motorola/Emerson MVME5100 Single Board Computer.

The MVME5100 is a 6U form factor VME64 computer with:

	- A single MPC7410 or MPC750 CPU
	- A HAWK Processor Host Bridge (CPU to PCI) and
	  MultiProcessor Interrupt Controller (MPIC)
	- Up to 500Mb of onboard memory
	- A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip
	- Two 16550 compatible UARTS
	- Two Intel E100 Fast Ethernets
	- Two PCI Mezzanine Card (PMC) Slots
	- PPCBug Firmware

The HAWK PHB/MPIC is compatible with the MPC10x devices.

There is no onboard disk support. This is usually provided by installing a PMC
in first PMC slot.

This patch revives the board support, it was present in early 2.6
series kernels. The board support in those days was by Matt Porter of
MontaVista Software.

CSC Australia has around 31 of these boards in service. The kernel in use
for the boards is based on 2.6.31. The boards are operated without disks
from a file server.

This patch is based on linux-3.13-rc2 and has been boot tested.

Only boards with 512 Mb of memory are known to work.

Signed-off-by: Stephen Chivers <schivers@csc.com>
Tested-by: Alessio Igor Bogani <alessio.bogani@elettra.eu>
Signed-off-by: Scott Wood <scottwood@freescale.com>

4 files changed, 218 insertions, 1 deletions

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index ca7f08cc4afd..cd9ea99f9fdc 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -95,7 +95,7 @@ src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
 src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
                                         cuboot-c2k.c gamecube-head.S \
                                         gamecube.c wii-head.S wii.c holly.c \
-                                        prpmc2800.c
+                                        prpmc2800.c fixed-head.S mvme5100.c
 src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
 src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
 src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -286,6 +286,7 @@ image-$(CONFIG_MPC7448HPC2)		+= cuImage.mpc7448hpc2
 image-$(CONFIG_PPC_C2K)                 += cuImage.c2k
 image-$(CONFIG_GAMECUBE)                += dtbImage.gamecube
 image-$(CONFIG_WII)                     += dtbImage.wii
+image-$(CONFIG_MVME5100)                += dtbImage.mvme5100
 
 # Board port in arch/powerpc/platform/amigaone/Kconfig
 image-$(CONFIG_AMIGAONE)                += cuImage.amigaone
diff --git a/arch/powerpc/boot/dts/mvme5100.dts b/arch/powerpc/boot/dts/mvme5100.dts
new file mode 100644
index 000000000000..1ecb341a232a
--- /dev/null
+++ b/arch/powerpc/boot/dts/mvme5100.dts
@@ -0,0 +1,185 @@
+/*
+ * Device Tree Source for Motorola/Emerson MVME5100.
+ *
+ * Copyright 2013 CSC Australia Pty. Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+        model = "MVME5100";
+        compatible = "MVME5100";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        aliases {
+                serial0 = &serial0;
+                pci0 = &pci0;
+        };
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                PowerPC,7410 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        /* Following required by dtc but not used */
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        timebase-frequency = <25000000>;
+                        clock-frequency = <500000000>;
+                        bus-frequency = <100000000>;
+                };
+        };
+
+        memory {
+                device_type = "memory";
+                reg = <0x0 0x20000000>;
+        };
+
+        hawk@fef80000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "hawk-bridge", "simple-bus";
+                ranges = <0x0 0xfef80000 0x10000>;
+                reg = <0xfef80000 0x10000>;
+
+                serial0: serial@8000 {
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x8000 0x80>;
+                        reg-shift = <4>;
+                        clock-frequency = <1843200>;
+                        current-speed = <9600>;
+                        interrupts = <1 1>; // IRQ1 Level Active Low.
+                        interrupt-parent = <&mpic>;
+                };
+
+                serial1: serial@8200 {
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x8200 0x80>;
+                        reg-shift = <4>;
+                        clock-frequency = <1843200>;
+                        current-speed = <9600>;
+                        interrupts = <1 1>; // IRQ1 Level Active Low.
+                        interrupt-parent = <&mpic>;
+                };
+
+                mpic: interrupt-controller@f3f80000 {
+                        #interrupt-cells = <2>;
+                        #address-cells = <0>;
+                        device_type = "open-pic";
+                        compatible = "chrp,open-pic";
+                        interrupt-controller;
+                        reg = <0xf3f80000 0x40000>;
+                };
+        };
+
+        pci0: pci@feff0000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "hawk-pci";
+                reg = <0xfec00000 0x400000>;
+                8259-interrupt-acknowledge = <0xfeff0030>;
+                ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0x800000
+                          0x2000000 0x0 0x80000000 0x80000000 0x0 0x74000000>;
+                bus-range = <0 255>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+
+                        /*
+                         * This definition (IDSEL 11) duplicates the
+                         * interrupts definition in the i8259
+                         * interrupt controller below.
+                         *
+                         * Do not change the interrupt sense/polarity from
+                         * 0x2 to anything else, doing so will cause endless
+                         * "spurious" i8259 interrupts to be fielded.
+                         */
+                        // IDSEL 11 - iPMC712 PCI/ISA Bridge
+                        0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
+                        0x5800 0x0 0x0 0x2 &mpic 0x0 0x2
+                        0x5800 0x0 0x0 0x3 &mpic 0x0 0x2
+                        0x5800 0x0 0x0 0x4 &mpic 0x0 0x2
+
+                        /* IDSEL 12 - Not Used */
+
+                        /* IDSEL 13 - Universe VME Bridge */
+                        0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
+                        0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
+                        0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
+                        0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
+
+                        /* IDSEL 14 - ENET 1 */
+                        0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
+
+                        /* IDSEL 15 - Not Used */
+
+                        /* IDSEL 16 - PMC Slot 1 */
+                        0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
+                        0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
+                        0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
+                        0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
+
+                        /* IDSEL 17 - PMC Slot 2 */
+                        0x8800 0x0 0x0 0x1 &mpic 0xc 0x1
+                        0x8800 0x0 0x0 0x2 &mpic 0x9 0x1
+                        0x8800 0x0 0x0 0x3 &mpic 0xa 0x1
+                        0x8800 0x0 0x0 0x4 &mpic 0xb 0x1
+
+                        /* IDSEL 18 - Not Used */
+
+                        /* IDSEL 19 - ENET 2 */
+                        0x9800 0x0 0x0 0x1 &mpic 0xd 0x1
+
+                        /* IDSEL 20 - PMCSPAN (PCI-X) */
+                        0xa000 0x0 0x0 0x1 &mpic 0x9 0x1
+                        0xa000 0x0 0x0 0x2 &mpic 0xa 0x1
+                        0xa000 0x0 0x0 0x3 &mpic 0xb 0x1
+                        0xa000 0x0 0x0 0x4 &mpic 0xc 0x1
+
+                >;
+
+                isa {
+                        #address-cells = <2>;
+                        #size-cells = <1>;
+                        #interrupt-cells = <2>;
+                        device_type = "isa";
+                        compatible = "isa";
+                        ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
+                        interrupt-parent = <&i8259>;
+
+                        i8259: interrupt-controller@20 {
+                                #interrupt-cells = <2>;
+                                #address-cells = <0>;
+                                interrupts = <0 2>;
+                                device_type = "interrupt-controller";
+                                compatible = "chrp,iic";
+                                interrupt-controller;
+                                reg = <1 0x00000020 0x00000002
+                                       1 0x000000a0 0x00000002
+                                       1 0x000004d0 0x00000002>;
+                                interrupt-parent = <&mpic>;
+                        };
+
+                };
+
+        };
+
+        chosen {
+                linux,stdout-path = &serial0;
+        };
+
+};
diff --git a/arch/powerpc/boot/mvme5100.c b/arch/powerpc/boot/mvme5100.c
new file mode 100644
index 000000000000..cb865f83c60b
--- /dev/null
+++ b/arch/powerpc/boot/mvme5100.c
@@ -0,0 +1,27 @@
+/*
+ * Motorola/Emerson MVME5100 with PPCBug firmware.
+ *
+ * Author: Stephen Chivers <schivers@csc.com>
+ *
+ * Copyright 2013 CSC Australia Pty. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ */
+#include "types.h"
+#include "ops.h"
+#include "io.h"
+
+BSS_STACK(4096);
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
+{
+        u32                     heapsize;
+
+        heapsize = 0x8000000 - (u32)_end; /* 128M */
+        simple_alloc_init(_end, heapsize, 32, 64);
+        fdt_init(_dtb_start);
+        serial_console_init();
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 2e1af74a64be..d27a25518b01 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -265,6 +265,10 @@ epapr)
     link_address='0x20000000'
     pie=-pie
     ;;
+mvme5100)
+    platformo="$object/fixed-head.o $object/mvme5100.o"
+    binary=y
+    ;;
 esac
 
 vmz="$tmpdir/`basename \"$kernel\"`.$ext"