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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-02-10 21:37:44 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-02-10 21:37:44 -0500
commitedbc29d76ddbc9bd56e1cbc772188f70c616ffe1 (patch)
tree71b994ba493c46e10189c090fd17fe2da80281ec /arch/powerpc/boot
parent1db8508cf483dc1ecf66141f90a7c03659d69512 (diff)
parenta0e8618c71b9b685977c1407dee928d86c5bdc2c (diff)
Merge commit 'kumar/next' into next
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts364
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts64
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts102
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts38
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts9
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts9
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts5
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts9
14 files changed, 846 insertions, 15 deletions
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
new file mode 100644
index 000000000000..09eeb438216b
--- /dev/null
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -0,0 +1,364 @@
1/*
2 * GE Fanuc SBC310 Device Tree Source
3 *
4 * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * Based on: SBS CM6 Device Tree Source
12 * Copyright 2007 SBS Technologies GmbH & Co. KG
13 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
14 * Copyright 2006 Freescale Semiconductor Inc.
15 */
16
17/*
18 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
19 */
20
21/dts-v1/;
22
23/ {
24 model = "GEF_SBC310";
25 compatible = "gef,sbc310";
26 #address-cells = <1>;
27 #size-cells = <1>;
28
29 aliases {
30 ethernet0 = &enet0;
31 ethernet1 = &enet1;
32 serial0 = &serial0;
33 serial1 = &serial1;
34 pci0 = &pci0;
35 };
36
37 cpus {
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 PowerPC,8641@0 {
42 device_type = "cpu";
43 reg = <0>;
44 d-cache-line-size = <32>; // 32 bytes
45 i-cache-line-size = <32>; // 32 bytes
46 d-cache-size = <32768>; // L1, 32K
47 i-cache-size = <32768>; // L1, 32K
48 timebase-frequency = <0>; // From uboot
49 bus-frequency = <0>; // From uboot
50 clock-frequency = <0>; // From uboot
51 };
52 PowerPC,8641@1 {
53 device_type = "cpu";
54 reg = <1>;
55 d-cache-line-size = <32>; // 32 bytes
56 i-cache-line-size = <32>; // 32 bytes
57 d-cache-size = <32768>; // L1, 32K
58 i-cache-size = <32768>; // L1, 32K
59 timebase-frequency = <0>; // From uboot
60 bus-frequency = <0>; // From uboot
61 clock-frequency = <0>; // From uboot
62 };
63 };
64
65 memory {
66 device_type = "memory";
67 reg = <0x0 0x40000000>; // set by uboot
68 };
69
70 localbus@fef05000 {
71 #address-cells = <2>;
72 #size-cells = <1>;
73 compatible = "fsl,mpc8641-localbus", "simple-bus";
74 reg = <0xfef05000 0x1000>;
75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>;
77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe0000000 0x08000000 // Paged Flash 0
80 2 0 0xe8000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00010000>; // FPGA
83
84 /* flash@0,0 is a mirror of part of the memory in flash@1,0
85 flash@0,0 {
86 compatible = "cfi-flash";
87 reg = <0 0 0x01000000>;
88 bank-width = <2>;
89 device-width = <2>;
90 #address-cells = <1>;
91 #size-cells = <1>;
92 partition@0 {
93 label = "firmware";
94 reg = <0x00000000 0x01000000>;
95 read-only;
96 };
97 };
98 */
99
100 flash@1,0 {
101 compatible = "cfi-flash";
102 reg = <1 0 0x8000000>;
103 bank-width = <2>;
104 device-width = <2>;
105 #address-cells = <1>;
106 #size-cells = <1>;
107 partition@0 {
108 label = "user";
109 reg = <0x00000000 0x07800000>;
110 };
111 partition@7800000 {
112 label = "firmware";
113 reg = <0x07800000 0x00800000>;
114 read-only;
115 };
116 };
117
118 fpga@4,0 {
119 compatible = "gef,fpga-regs";
120 reg = <0x4 0x0 0x40>;
121 };
122
123 wdt@4,2000 {
124 #interrupt-cells = <2>;
125 device_type = "watchdog";
126 compatible = "gef,fpga-wdt";
127 reg = <0x4 0x2000 0x8>;
128 interrupts = <0x1a 0x4>;
129 interrupt-parent = <&gef_pic>;
130 };
131/*
132 wdt@4,2010 {
133 #interrupt-cells = <2>;
134 device_type = "watchdog";
135 compatible = "gef,fpga-wdt";
136 reg = <0x4 0x2010 0x8>;
137 interrupts = <0x1b 0x4>;
138 interrupt-parent = <&gef_pic>;
139 };
140*/
141 gef_pic: pic@4,4000 {
142 #interrupt-cells = <1>;
143 interrupt-controller;
144 compatible = "gef,fpga-pic";
145 reg = <0x4 0x4000 0x20>;
146 interrupts = <0x8
147 0x9>;
148 interrupt-parent = <&mpic>;
149
150 };
151 gef_gpio: gpio@4,8000 {
152 #gpio-cells = <2>;
153 compatible = "gef,sbc310-gpio";
154 reg = <0x4 0x8000 0x24>;
155 gpio-controller;
156 };
157 };
158
159 soc@fef00000 {
160 #address-cells = <1>;
161 #size-cells = <1>;
162 #interrupt-cells = <2>;
163 device_type = "soc";
164 compatible = "simple-bus";
165 ranges = <0x0 0xfef00000 0x00100000>;
166 reg = <0xfef00000 0x100000>; // CCSRBAR 1M
167 bus-frequency = <33333333>;
168
169 i2c1: i2c@3000 {
170 #address-cells = <1>;
171 #size-cells = <0>;
172 compatible = "fsl-i2c";
173 reg = <0x3000 0x100>;
174 interrupts = <0x2b 0x2>;
175 interrupt-parent = <&mpic>;
176 dfsrr;
177
178 rtc@51 {
179 compatible = "epson,rx8581";
180 reg = <0x00000051>;
181 };
182 };
183
184 i2c2: i2c@3100 {
185 #address-cells = <1>;
186 #size-cells = <0>;
187 compatible = "fsl-i2c";
188 reg = <0x3100 0x100>;
189 interrupts = <0x2b 0x2>;
190 interrupt-parent = <&mpic>;
191 dfsrr;
192
193 hwmon@48 {
194 compatible = "national,lm92";
195 reg = <0x48>;
196 };
197
198 hwmon@4c {
199 compatible = "adi,adt7461";
200 reg = <0x4c>;
201 };
202
203 eti@6b {
204 compatible = "dallas,ds1682";
205 reg = <0x6b>;
206 };
207 };
208
209 dma@21300 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
213 reg = <0x21300 0x4>;
214 ranges = <0x0 0x21100 0x200>;
215 cell-index = <0>;
216 dma-channel@0 {
217 compatible = "fsl,mpc8641-dma-channel",
218 "fsl,eloplus-dma-channel";
219 reg = <0x0 0x80>;
220 cell-index = <0>;
221 interrupt-parent = <&mpic>;
222 interrupts = <20 2>;
223 };
224 dma-channel@80 {
225 compatible = "fsl,mpc8641-dma-channel",
226 "fsl,eloplus-dma-channel";
227 reg = <0x80 0x80>;
228 cell-index = <1>;
229 interrupt-parent = <&mpic>;
230 interrupts = <21 2>;
231 };
232 dma-channel@100 {
233 compatible = "fsl,mpc8641-dma-channel",
234 "fsl,eloplus-dma-channel";
235 reg = <0x100 0x80>;
236 cell-index = <2>;
237 interrupt-parent = <&mpic>;
238 interrupts = <22 2>;
239 };
240 dma-channel@180 {
241 compatible = "fsl,mpc8641-dma-channel",
242 "fsl,eloplus-dma-channel";
243 reg = <0x180 0x80>;
244 cell-index = <3>;
245 interrupt-parent = <&mpic>;
246 interrupts = <23 2>;
247 };
248 };
249
250 mdio@24520 {
251 #address-cells = <1>;
252 #size-cells = <0>;
253 compatible = "fsl,gianfar-mdio";
254 reg = <0x24520 0x20>;
255
256 phy0: ethernet-phy@0 {
257 interrupt-parent = <&gef_pic>;
258 interrupts = <0x9 0x4>;
259 reg = <1>;
260 };
261 phy2: ethernet-phy@2 {
262 interrupt-parent = <&gef_pic>;
263 interrupts = <0x8 0x4>;
264 reg = <3>;
265 };
266 };
267
268 enet0: ethernet@24000 {
269 device_type = "network";
270 model = "eTSEC";
271 compatible = "gianfar";
272 reg = <0x24000 0x1000>;
273 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
275 interrupt-parent = <&mpic>;
276 phy-handle = <&phy0>;
277 phy-connection-type = "gmii";
278 };
279
280 enet1: ethernet@26000 {
281 device_type = "network";
282 model = "eTSEC";
283 compatible = "gianfar";
284 reg = <0x26000 0x1000>;
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
287 interrupt-parent = <&mpic>;
288 phy-handle = <&phy2>;
289 phy-connection-type = "gmii";
290 };
291
292 serial0: serial@4500 {
293 cell-index = <0>;
294 device_type = "serial";
295 compatible = "ns16550";
296 reg = <0x4500 0x100>;
297 clock-frequency = <0>;
298 interrupts = <0x2a 0x2>;
299 interrupt-parent = <&mpic>;
300 };
301
302 serial1: serial@4600 {
303 cell-index = <1>;
304 device_type = "serial";
305 compatible = "ns16550";
306 reg = <0x4600 0x100>;
307 clock-frequency = <0>;
308 interrupts = <0x1c 0x2>;
309 interrupt-parent = <&mpic>;
310 };
311
312 mpic: pic@40000 {
313 clock-frequency = <0>;
314 interrupt-controller;
315 #address-cells = <0>;
316 #interrupt-cells = <2>;
317 reg = <0x40000 0x40000>;
318 compatible = "chrp,open-pic";
319 device_type = "open-pic";
320 };
321
322 global-utilities@e0000 {
323 compatible = "fsl,mpc8641-guts";
324 reg = <0xe0000 0x1000>;
325 fsl,has-rstcr;
326 };
327 };
328
329 pci0: pcie@fef08000 {
330 compatible = "fsl,mpc8641-pcie";
331 device_type = "pci";
332 #interrupt-cells = <1>;
333 #size-cells = <2>;
334 #address-cells = <3>;
335 reg = <0xfef08000 0x1000>;
336 bus-range = <0x0 0xff>;
337 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
338 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
339 clock-frequency = <33333333>;
340 interrupt-parent = <&mpic>;
341 interrupts = <0x18 0x2>;
342 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
343 interrupt-map = <
344 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
345 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
346 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
347 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
348 >;
349
350 pcie@0 {
351 reg = <0 0 0 0 0>;
352 #size-cells = <2>;
353 #address-cells = <3>;
354 device_type = "pci";
355 ranges = <0x02000000 0x0 0x80000000
356 0x02000000 0x0 0x80000000
357 0x0 0x40000000
358
359 0x01000000 0x0 0x00000000
360 0x01000000 0x0 0x00000000
361 0x0 0x00400000>;
362 };
363 };
364};
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 71784165b77e..88d691cccb38 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -349,4 +351,66 @@
349 compatible = "fsl,mpc8349-pci"; 351 compatible = "fsl,mpc8349-pci";
350 device_type = "pci"; 352 device_type = "pci";
351 }; 353 };
354
355 pci1: pcie@e0009000 {
356 #address-cells = <3>;
357 #size-cells = <2>;
358 #interrupt-cells = <1>;
359 device_type = "pci";
360 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
361 reg = <0xe0009000 0x00001000>;
362 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
363 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
364 bus-range = <0 255>;
365 interrupt-map-mask = <0xf800 0 0 7>;
366 interrupt-map = <0 0 0 1 &ipic 1 8
367 0 0 0 2 &ipic 1 8
368 0 0 0 3 &ipic 1 8
369 0 0 0 4 &ipic 1 8>;
370 clock-frequency = <0>;
371
372 pcie@0 {
373 #address-cells = <3>;
374 #size-cells = <2>;
375 device_type = "pci";
376 reg = <0 0 0 0 0>;
377 ranges = <0x02000000 0 0xa0000000
378 0x02000000 0 0xa0000000
379 0 0x10000000
380 0x01000000 0 0x00000000
381 0x01000000 0 0x00000000
382 0 0x00800000>;
383 };
384 };
385
386 pci2: pcie@e000a000 {
387 #address-cells = <3>;
388 #size-cells = <2>;
389 #interrupt-cells = <1>;
390 device_type = "pci";
391 compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie";
392 reg = <0xe000a000 0x00001000>;
393 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000
394 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
395 bus-range = <0 255>;
396 interrupt-map-mask = <0xf800 0 0 7>;
397 interrupt-map = <0 0 0 1 &ipic 2 8
398 0 0 0 2 &ipic 2 8
399 0 0 0 3 &ipic 2 8
400 0 0 0 4 &ipic 2 8>;
401 clock-frequency = <0>;
402
403 pcie@0 {
404 #address-cells = <3>;
405 #size-cells = <2>;
406 device_type = "pci";
407 reg = <0 0 0 0 0>;
408 ranges = <0x02000000 0 0xc0000000
409 0x02000000 0 0xc0000000
410 0 0x10000000
411 0x01000000 0 0x00000000
412 0x01000000 0 0x00000000
413 0 0x00800000>;
414 };
415 };
352}; 416};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 1d14d7052e6d..3e3ec8fdef49 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -311,12 +313,13 @@
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 313 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 314 };
313 315
314 sdhc@2e000 { 316 sdhci@2e000 {
315 model = "eSDHC"; 317 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>; 318 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>; 319 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>; 320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
320 }; 323 };
321 324
322 sata@18000 { 325 sata@18000 {
@@ -409,4 +412,66 @@
409 compatible = "fsl,mpc8349-pci"; 412 compatible = "fsl,mpc8349-pci";
410 device_type = "pci"; 413 device_type = "pci";
411 }; 414 };
415
416 pci1: pcie@e0009000 {
417 #address-cells = <3>;
418 #size-cells = <2>;
419 #interrupt-cells = <1>;
420 device_type = "pci";
421 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
422 reg = <0xe0009000 0x00001000>;
423 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
424 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
425 bus-range = <0 255>;
426 interrupt-map-mask = <0xf800 0 0 7>;
427 interrupt-map = <0 0 0 1 &ipic 1 8
428 0 0 0 2 &ipic 1 8
429 0 0 0 3 &ipic 1 8
430 0 0 0 4 &ipic 1 8>;
431 clock-frequency = <0>;
432
433 pcie@0 {
434 #address-cells = <3>;
435 #size-cells = <2>;
436 device_type = "pci";
437 reg = <0 0 0 0 0>;
438 ranges = <0x02000000 0 0xa8000000
439 0x02000000 0 0xa8000000
440 0 0x10000000
441 0x01000000 0 0x00000000
442 0x01000000 0 0x00000000
443 0 0x00800000>;
444 };
445 };
446
447 pci2: pcie@e000a000 {
448 #address-cells = <3>;
449 #size-cells = <2>;
450 #interrupt-cells = <1>;
451 device_type = "pci";
452 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
453 reg = <0xe000a000 0x00001000>;
454 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
455 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
456 bus-range = <0 255>;
457 interrupt-map-mask = <0xf800 0 0 7>;
458 interrupt-map = <0 0 0 1 &ipic 2 8
459 0 0 0 2 &ipic 2 8
460 0 0 0 3 &ipic 2 8
461 0 0 0 4 &ipic 2 8>;
462 clock-frequency = <0>;
463
464 pcie@0 {
465 #address-cells = <3>;
466 #size-cells = <2>;
467 device_type = "pci";
468 reg = <0 0 0 0 0>;
469 ranges = <0x02000000 0 0xc8000000
470 0x02000000 0 0xc8000000
471 0 0x10000000
472 0x01000000 0 0x00000000
473 0x01000000 0 0x00000000
474 0 0x00800000>;
475 };
476 };
412}; 477};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 9413af3b9925..fb1d884348ec 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,6 +109,24 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
112 gpio1: gpio-controller@c00 {
113 #gpio-cells = <2>;
114 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
115 reg = <0xc00 0x100>;
116 interrupts = <74 0x8>;
117 interrupt-parent = <&ipic>;
118 gpio-controller;
119 };
120
121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
110 i2c@3000 { 130 i2c@3000 {
111 #address-cells = <1>; 131 #address-cells = <1>;
112 #size-cells = <0>; 132 #size-cells = <0>;
@@ -116,6 +136,17 @@
116 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
118 dfsrr; 138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149
119 rtc@68 { 150 rtc@68 {
120 compatible = "dallas,ds1339"; 151 compatible = "dallas,ds1339";
121 reg = <0x68>; 152 reg = <0x68>;
@@ -289,6 +320,15 @@
289 fsl,descriptor-types-mask = <0x3ab0ebf>; 320 fsl,descriptor-types-mask = <0x3ab0ebf>;
290 }; 321 };
291 322
323 sdhci@2e000 {
324 compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc";
325 reg = <0x2e000 0x1000>;
326 interrupts = <42 0x8>;
327 interrupt-parent = <&ipic>;
328 /* Filled in by U-Boot */
329 clock-frequency = <0>;
330 };
331
292 sata@18000 { 332 sata@18000 {
293 compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; 333 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
294 reg = <0x18000 0x1000>; 334 reg = <0x18000 0x1000>;
@@ -350,4 +390,66 @@
350 compatible = "fsl,mpc8349-pci"; 390 compatible = "fsl,mpc8349-pci";
351 device_type = "pci"; 391 device_type = "pci";
352 }; 392 };
393
394 pci1: pcie@e0009000 {
395 #address-cells = <3>;
396 #size-cells = <2>;
397 #interrupt-cells = <1>;
398 device_type = "pci";
399 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
400 reg = <0xe0009000 0x00001000>;
401 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
402 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
403 bus-range = <0 255>;
404 interrupt-map-mask = <0xf800 0 0 7>;
405 interrupt-map = <0 0 0 1 &ipic 1 8
406 0 0 0 2 &ipic 1 8
407 0 0 0 3 &ipic 1 8
408 0 0 0 4 &ipic 1 8>;
409 clock-frequency = <0>;
410
411 pcie@0 {
412 #address-cells = <3>;
413 #size-cells = <2>;
414 device_type = "pci";
415 reg = <0 0 0 0 0>;
416 ranges = <0x02000000 0 0xa8000000
417 0x02000000 0 0xa8000000
418 0 0x10000000
419 0x01000000 0 0x00000000
420 0x01000000 0 0x00000000
421 0 0x00800000>;
422 };
423 };
424
425 pci2: pcie@e000a000 {
426 #address-cells = <3>;
427 #size-cells = <2>;
428 #interrupt-cells = <1>;
429 device_type = "pci";
430 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
431 reg = <0xe000a000 0x00001000>;
432 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
433 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
434 bus-range = <0 255>;
435 interrupt-map-mask = <0xf800 0 0 7>;
436 interrupt-map = <0 0 0 1 &ipic 2 8
437 0 0 0 2 &ipic 2 8
438 0 0 0 3 &ipic 2 8
439 0 0 0 4 &ipic 2 8>;
440 clock-frequency = <0>;
441
442 pcie@0 {
443 #address-cells = <3>;
444 #size-cells = <2>;
445 device_type = "pci";
446 reg = <0 0 0 0 0>;
447 ranges = <0x02000000 0 0xc8000000
448 0x02000000 0 0xc8000000
449 0 0x10000000
450 0x01000000 0 0x00000000
451 0x01000000 0 0x00000000
452 0 0x00800000>;
453 };
454 };
353}; 455};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index b85fc02682d2..c3b212cf9025 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -23,6 +23,8 @@
23 serial0 = &serial0; 23 serial0 = &serial0;
24 serial1 = &serial1; 24 serial1 = &serial1;
25 pci0 = &pci0; 25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
26 }; 28 };
27 29
28 cpus { 30 cpus {
@@ -311,12 +313,13 @@
311 fsl,descriptor-types-mask = <0x3ab0ebf>; 313 fsl,descriptor-types-mask = <0x3ab0ebf>;
312 }; 314 };
313 315
314 sdhc@2e000 { 316 sdhci@2e000 {
315 model = "eSDHC"; 317 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
316 compatible = "fsl,esdhc";
317 reg = <0x2e000 0x1000>; 318 reg = <0x2e000 0x1000>;
318 interrupts = <42 0x8>; 319 interrupts = <42 0x8>;
319 interrupt-parent = <&ipic>; 320 interrupt-parent = <&ipic>;
321 /* Filled in by U-Boot */
322 clock-frequency = <0>;
320 }; 323 };
321 324
322 /* IPIC 325 /* IPIC
@@ -395,4 +398,66 @@
395 compatible = "fsl,mpc8349-pci"; 398 compatible = "fsl,mpc8349-pci";
396 device_type = "pci"; 399 device_type = "pci";
397 }; 400 };
401
402 pci1: pcie@e0009000 {
403 #address-cells = <3>;
404 #size-cells = <2>;
405 #interrupt-cells = <1>;
406 device_type = "pci";
407 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
408 reg = <0xe0009000 0x00001000>;
409 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
410 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
411 bus-range = <0 255>;
412 interrupt-map-mask = <0xf800 0 0 7>;
413 interrupt-map = <0 0 0 1 &ipic 1 8
414 0 0 0 2 &ipic 1 8
415 0 0 0 3 &ipic 1 8
416 0 0 0 4 &ipic 1 8>;
417 clock-frequency = <0>;
418
419 pcie@0 {
420 #address-cells = <3>;
421 #size-cells = <2>;
422 device_type = "pci";
423 reg = <0 0 0 0 0>;
424 ranges = <0x02000000 0 0xa8000000
425 0x02000000 0 0xa8000000
426 0 0x10000000
427 0x01000000 0 0x00000000
428 0x01000000 0 0x00000000
429 0 0x00800000>;
430 };
431 };
432
433 pci2: pcie@e000a000 {
434 #address-cells = <3>;
435 #size-cells = <2>;
436 #interrupt-cells = <1>;
437 device_type = "pci";
438 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
439 reg = <0xe000a000 0x00001000>;
440 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
441 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
442 bus-range = <0 255>;
443 interrupt-map-mask = <0xf800 0 0 7>;
444 interrupt-map = <0 0 0 1 &ipic 2 8
445 0 0 0 2 &ipic 2 8
446 0 0 0 3 &ipic 2 8
447 0 0 0 4 &ipic 2 8>;
448 clock-frequency = <0>;
449
450 pcie@0 {
451 #address-cells = <3>;
452 #size-cells = <2>;
453 device_type = "pci";
454 reg = <0 0 0 0 0>;
455 ranges = <0x02000000 0 0xc8000000
456 0x02000000 0 0xc8000000
457 0 0x10000000
458 0x01000000 0 0x00000000
459 0x01000000 0 0x00000000
460 0 0x00800000>;
461 };
462 };
398}; 463};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 23c10ce22c2c..37c8555cc8d4 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -22,6 +22,8 @@
22 serial0 = &serial0; 22 serial0 = &serial0;
23 serial1 = &serial1; 23 serial1 = &serial1;
24 pci0 = &pci0; 24 pci0 = &pci0;
25 pci1 = &pci1;
26 pci2 = &pci2;
25 }; 27 };
26 28
27 cpus { 29 cpus {
@@ -107,6 +109,24 @@
107 reg = <0x200 0x100>; 109 reg = <0x200 0x100>;
108 }; 110 };
109 111
112 gpio1: gpio-controller@c00 {
113 #gpio-cells = <2>;
114 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
115 reg = <0xc00 0x100>;
116 interrupts = <74 0x8>;
117 interrupt-parent = <&ipic>;
118 gpio-controller;
119 };
120
121 gpio2: gpio-controller@d00 {
122 #gpio-cells = <2>;
123 compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio";
124 reg = <0xd00 0x100>;
125 interrupts = <75 0x8>;
126 interrupt-parent = <&ipic>;
127 gpio-controller;
128 };
129
110 i2c@3000 { 130 i2c@3000 {
111 #address-cells = <1>; 131 #address-cells = <1>;
112 #size-cells = <0>; 132 #size-cells = <0>;
@@ -116,6 +136,17 @@
116 interrupts = <14 0x8>; 136 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 137 interrupt-parent = <&ipic>;
118 dfsrr; 138 dfsrr;
139
140 dtt@48 {
141 compatible = "national,lm75";
142 reg = <0x48>;
143 };
144
145 at24@50 {
146 compatible = "at24,24c256";
147 reg = <0x50>;
148 };
149
119 rtc@68 { 150 rtc@68 {
120 compatible = "dallas,ds1339"; 151 compatible = "dallas,ds1339";
121 reg = <0x68>; 152 reg = <0x68>;
@@ -287,6 +318,15 @@
287 fsl,descriptor-types-mask = <0x3ab0ebf>; 318 fsl,descriptor-types-mask = <0x3ab0ebf>;
288 }; 319 };
289 320
321 sdhci@2e000 {
322 compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
323 reg = <0x2e000 0x1000>;
324 interrupts = <42 0x8>;
325 interrupt-parent = <&ipic>;
326 /* Filled in by U-Boot */
327 clock-frequency = <0>;
328 };
329
290 /* IPIC 330 /* IPIC
291 * interrupts cell = <intr #, sense> 331 * interrupts cell = <intr #, sense>
292 * sense values match linux IORESOURCE_IRQ_* defines: 332 * sense values match linux IORESOURCE_IRQ_* defines:
@@ -334,4 +374,66 @@
334 compatible = "fsl,mpc8349-pci"; 374 compatible = "fsl,mpc8349-pci";
335 device_type = "pci"; 375 device_type = "pci";
336 }; 376 };
377
378 pci1: pcie@e0009000 {
379 #address-cells = <3>;
380 #size-cells = <2>;
381 #interrupt-cells = <1>;
382 device_type = "pci";
383 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
384 reg = <0xe0009000 0x00001000>;
385 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
386 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
387 bus-range = <0 255>;
388 interrupt-map-mask = <0xf800 0 0 7>;
389 interrupt-map = <0 0 0 1 &ipic 1 8
390 0 0 0 2 &ipic 1 8
391 0 0 0 3 &ipic 1 8
392 0 0 0 4 &ipic 1 8>;
393 clock-frequency = <0>;
394
395 pcie@0 {
396 #address-cells = <3>;
397 #size-cells = <2>;
398 device_type = "pci";
399 reg = <0 0 0 0 0>;
400 ranges = <0x02000000 0 0xa8000000
401 0x02000000 0 0xa8000000
402 0 0x10000000
403 0x01000000 0 0x00000000
404 0x01000000 0 0x00000000
405 0 0x00800000>;
406 };
407 };
408
409 pci2: pcie@e000a000 {
410 #address-cells = <3>;
411 #size-cells = <2>;
412 #interrupt-cells = <1>;
413 device_type = "pci";
414 compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie";
415 reg = <0xe000a000 0x00001000>;
416 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
417 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
418 bus-range = <0 255>;
419 interrupt-map-mask = <0xf800 0 0 7>;
420 interrupt-map = <0 0 0 1 &ipic 2 8
421 0 0 0 2 &ipic 2 8
422 0 0 0 3 &ipic 2 8
423 0 0 0 4 &ipic 2 8>;
424 clock-frequency = <0>;
425
426 pcie@0 {
427 #address-cells = <3>;
428 #size-cells = <2>;
429 device_type = "pci";
430 reg = <0 0 0 0 0>;
431 ranges = <0x02000000 0 0xc8000000
432 0x02000000 0 0xc8000000
433 0 0x10000000
434 0x01000000 0 0x00000000
435 0x01000000 0 0x00000000
436 0 0x00800000>;
437 };
438 };
337}; 439};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index acf06c438dbf..1b61cda1eb47 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -310,12 +310,13 @@
310 fsl,descriptor-types-mask = <0x3ab0ebf>; 310 fsl,descriptor-types-mask = <0x3ab0ebf>;
311 }; 311 };
312 312
313 sdhc@2e000 { 313 sdhci@2e000 {
314 model = "eSDHC"; 314 compatible = "fsl,mpc8379-esdhc";
315 compatible = "fsl,esdhc";
316 reg = <0x2e000 0x1000>; 315 reg = <0x2e000 0x1000>;
317 interrupts = <42 0x8>; 316 interrupts = <42 0x8>;
318 interrupt-parent = <&ipic>; 317 interrupt-parent = <&ipic>;
318 /* Filled in by U-Boot */
319 clock-frequency = <0>;
319 }; 320 };
320 321
321 sata@18000 { 322 sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 72cdc3c4c7e3..e2f98e6a51a2 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -107,6 +107,24 @@
107 reg = <0x200 0x100>; 107 reg = <0x200 0x100>;
108 }; 108 };
109 109
110 gpio1: gpio-controller@c00 {
111 #gpio-cells = <2>;
112 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
113 reg = <0xc00 0x100>;
114 interrupts = <74 0x8>;
115 interrupt-parent = <&ipic>;
116 gpio-controller;
117 };
118
119 gpio2: gpio-controller@d00 {
120 #gpio-cells = <2>;
121 compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio";
122 reg = <0xd00 0x100>;
123 interrupts = <75 0x8>;
124 interrupt-parent = <&ipic>;
125 gpio-controller;
126 };
127
110 i2c@3000 { 128 i2c@3000 {
111 #address-cells = <1>; 129 #address-cells = <1>;
112 #size-cells = <0>; 130 #size-cells = <0>;
@@ -116,6 +134,17 @@
116 interrupts = <14 0x8>; 134 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>; 135 interrupt-parent = <&ipic>;
118 dfsrr; 136 dfsrr;
137
138 dtt@48 {
139 compatible = "national,lm75";
140 reg = <0x48>;
141 };
142
143 at24@50 {
144 compatible = "at24,24c256";
145 reg = <0x50>;
146 };
147
119 rtc@68 { 148 rtc@68 {
120 compatible = "dallas,ds1339"; 149 compatible = "dallas,ds1339";
121 reg = <0x68>; 150 reg = <0x68>;
@@ -288,6 +317,15 @@
288 fsl,descriptor-types-mask = <0x3ab0ebf>; 317 fsl,descriptor-types-mask = <0x3ab0ebf>;
289 }; 318 };
290 319
320 sdhci@2e000 {
321 compatible = "fsl,mpc8379-esdhc";
322 reg = <0x2e000 0x1000>;
323 interrupts = <42 0x8>;
324 interrupt-parent = <&ipic>;
325 /* Filled in by U-Boot */
326 clock-frequency = <0>;
327 };
328
291 sata@18000 { 329 sata@18000 {
292 compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; 330 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
293 reg = <0x18000 0x1000>; 331 reg = <0x18000 0x1000>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index a693f01c21aa..39e55ab82b89 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -84,6 +84,11 @@
84 interrupt-parent = <&mpic>; 84 interrupt-parent = <&mpic>;
85 dfsrr; 85 dfsrr;
86 86
87 dtt@50 {
88 compatible = "national,lm75";
89 reg = <0x50>;
90 };
91
87 rtc@68 { 92 rtc@68 {
88 compatible = "dallas,ds1337"; 93 compatible = "dallas,ds1337";
89 reg = <0x68>; 94 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e3f5f0dde20..58ae8bc58817 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 15086eb65c50..bff380a25aa6 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -365,14 +370,14 @@
365 can0@2,0 { 370 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 371 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 372 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 373 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 374 interrupt-parent = <&mpic>;
370 }; 375 };
371 376
372 can1@2,100 { 377 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 378 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 379 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 380 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 381 interrupt-parent = <&mpic>;
377 }; 382 };
378 383
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index b7b65f5e79b6..112ac90f2ea7 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -365,14 +370,14 @@
365 can0@2,0 { 370 can0@2,0 {
366 compatible = "intel,82527"; // Bosch CC770 371 compatible = "intel,82527"; // Bosch CC770
367 reg = <2 0x0 0x100>; 372 reg = <2 0x0 0x100>;
368 interrupts = <4 0>; 373 interrupts = <4 1>;
369 interrupt-parent = <&mpic>; 374 interrupt-parent = <&mpic>;
370 }; 375 };
371 376
372 can1@2,100 { 377 can1@2,100 {
373 compatible = "intel,82527"; // Bosch CC770 378 compatible = "intel,82527"; // Bosch CC770
374 reg = <2 0x100 0x100>; 379 reg = <2 0x100 0x100>;
375 interrupts = <4 0>; 380 interrupts = <4 1>;
376 interrupt-parent = <&mpic>; 381 interrupt-parent = <&mpic>;
377 }; 382 };
378 383
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index cf92b4e7945e..4b7da890c03b 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -83,6 +83,11 @@
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 dfsrr; 84 dfsrr;
85 85
86 dtt@50 {
87 compatible = "national,lm75";
88 reg = <0x50>;
89 };
90
86 rtc@68 { 91 rtc@68 {
87 compatible = "dallas,ds1337"; 92 compatible = "dallas,ds1337";
88 reg = <0x68>; 93 reg = <0x68>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index 9e1ab2d2f669..3fa552f31edb 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -85,6 +85,11 @@
85 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
86 dfsrr; 86 dfsrr;
87 87
88 dtt@50 {
89 compatible = "national,lm75";
90 reg = <0x50>;
91 };
92
88 rtc@68 { 93 rtc@68 {
89 compatible = "dallas,ds1337"; 94 compatible = "dallas,ds1337";
90 reg = <0x68>; 95 reg = <0x68>;
@@ -335,14 +340,14 @@
335 can0@2,0 { 340 can0@2,0 {
336 compatible = "intel,82527"; // Bosch CC770 341 compatible = "intel,82527"; // Bosch CC770
337 reg = <2 0x0 0x100>; 342 reg = <2 0x0 0x100>;
338 interrupts = <4 0>; 343 interrupts = <4 1>;
339 interrupt-parent = <&mpic>; 344 interrupt-parent = <&mpic>;
340 }; 345 };
341 346
342 can1@2,100 { 347 can1@2,100 {
343 compatible = "intel,82527"; // Bosch CC770 348 compatible = "intel,82527"; // Bosch CC770
344 reg = <2 0x100 0x100>; 349 reg = <2 0x100 0x100>;
345 interrupts = <4 0>; 350 interrupts = <4 1>;
346 interrupt-parent = <&mpic>; 351 interrupt-parent = <&mpic>;
347 }; 352 };
348 }; 353 };