diff options
author | Grzegorz Bernacki <gjb@semihalf.com> | 2009-02-27 00:55:29 -0500 |
---|---|---|
committer | Grant Likely <grant.likely@secretlab.ca> | 2009-02-27 00:55:29 -0500 |
commit | 86f5a4a7d7e2fd0b8eb38833e568ab1061c7a18c (patch) | |
tree | dd139841b1fe99c29f1d0cf7c69e61b018e800cd /arch/powerpc/boot | |
parent | 652b2db16f55a0f2afd695a8b241e82b52b13c63 (diff) |
powerpc/5200: On the digsy-mtc, configure PSC4 and PSC5 as UARTs
On digsy MTC PSC4 and PSC5 should be configured as UART, not PSC3 and PSC4.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/dts/digsy_mtc.dts | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts index 0e85ebf7e4c8..4c36186ef946 100644 --- a/arch/powerpc/boot/dts/digsy_mtc.dts +++ b/arch/powerpc/boot/dts/digsy_mtc.dts | |||
@@ -155,18 +155,18 @@ | |||
155 | reg = <0x1f00 0x100>; | 155 | reg = <0x1f00 0x100>; |
156 | }; | 156 | }; |
157 | 157 | ||
158 | serial@2400 { // PSC3 | ||
159 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
160 | reg = <0x2400 0x100>; | ||
161 | interrupts = <2 3 0>; | ||
162 | }; | ||
163 | |||
164 | serial@2600 { // PSC4 | 158 | serial@2600 { // PSC4 |
165 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | 159 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; |
166 | reg = <0x2600 0x100>; | 160 | reg = <0x2600 0x100>; |
167 | interrupts = <2 11 0>; | 161 | interrupts = <2 11 0>; |
168 | }; | 162 | }; |
169 | 163 | ||
164 | serial@2800 { // PSC5 | ||
165 | compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; | ||
166 | reg = <0x2800 0x100>; | ||
167 | interrupts = <2 12 0>; | ||
168 | }; | ||
169 | |||
170 | ethernet@3000 { | 170 | ethernet@3000 { |
171 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; | 171 | compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; |
172 | reg = <0x3000 0x400>; | 172 | reg = <0x3000 0x400>; |