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authorXu Jiucheng <B37781@freescale.com>2012-01-17 03:01:29 -0500
committerKumar Gala <galak@kernel.crashing.org>2012-03-16 10:44:59 -0400
commit490bdb77b64376ead1ba0f4b011f5abea360bbc5 (patch)
tree0aa01c72f684a147b3c3965766d0647b0c4d676d /arch/powerpc/boot
parent10241842fbe900276634fee8d37ec48a7d8a762f (diff)
powerpc/85xx: Added dts for P1021RDB-PC board
P1021RDB-PC Overview ----------------- 1Gbyte DDR3 (on board DDR) 16Mbyte NOR flash 32Mbyte eSLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory Real-time clock on I2C bus SD/MMC connector to interface with the SD memory card PCIex - x1 PCIe slot or x1 PCIe to dual SATA controller - x1 mini-PCIe slot USB 2.0 - ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot eTSEC1: Connected to RGMII PHY VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/fsl/p1021si-post.dtsi4
-rw-r--r--arch/powerpc/boot/dts/p1021rdb.dts96
-rw-r--r--arch/powerpc/boot/dts/p1021rdb.dtsi236
-rw-r--r--arch/powerpc/boot/dts/p1021rdb_36b.dts96
4 files changed, 432 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index 38ba54d1e32e..b7929c99f8e6 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -144,6 +144,10 @@
144/include/ "pq3-usb2-dr-0.dtsi" 144/include/ "pq3-usb2-dr-0.dtsi"
145 145
146/include/ "pq3-esdhc-0.dtsi" 146/include/ "pq3-esdhc-0.dtsi"
147 sdhc@2e000 {
148 sdhci,auto-cmd12;
149 };
150
147/include/ "pq3-sec3.3-0.dtsi" 151/include/ "pq3-sec3.3-0.dtsi"
148 152
149/include/ "pq3-mpic.dtsi" 153/include/ "pq3-mpic.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p1021rdb.dts
new file mode 100644
index 000000000000..90b6b4caa273
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dts
@@ -0,0 +1,96 @@
1/*
2 * P1021 RDB Device Tree Source
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1021RDB";
38 compatible = "fsl,P1021RDB-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@ffe05000 {
45 reg = <0 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
49 0x1 0x0 0x0 0xff800000 0x00040000
50 0x2 0x0 0x0 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@ffe00000 {
54 ranges = <0x0 0x0 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@ffe09000 {
58 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
59 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
60 reg = <0 0xffe09000 0 0x1000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x0 0xa0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@ffe0a000 {
73 reg = <0 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0x80000000
78 0x2000000 0x0 0x80000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86
87 qe: qe@ffe80000 {
88 ranges = <0x0 0x0 0xffe80000 0x40000>;
89 reg = <0 0xffe80000 0 0x480>;
90 brg-frequency = <0>;
91 bus-frequency = <0>;
92 };
93};
94
95/include/ "p1021rdb.dtsi"
96/include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/p1021rdb.dtsi
new file mode 100644
index 000000000000..b973461ab751
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb.dtsi
@@ -0,0 +1,236 @@
1/*
2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&lbc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x1000000>;
41 bank-width = <2>;
42 device-width = <1>;
43
44 partition@0 {
45 /* This location must not be altered */
46 /* 256KB for Vitesse 7385 Switch firmware */
47 reg = <0x0 0x00040000>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
50 };
51
52 partition@40000 {
53 /* 256KB for DTB Image */
54 reg = <0x00040000 0x00040000>;
55 label = "NOR DTB Image";
56 };
57
58 partition@80000 {
59 /* 3.5 MB for Linux Kernel Image */
60 reg = <0x00080000 0x00380000>;
61 label = "NOR Linux Kernel Image";
62 };
63
64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>;
67 label = "NOR JFFS2 Root File System";
68 };
69
70 partition@f00000 {
71 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
74 reg = <0x00f00000 0x00100000>;
75 label = "NOR U-Boot Image";
76 };
77 };
78
79 nand@1,0 {
80 #address-cells = <1>;
81 #size-cells = <1>;
82 compatible = "fsl,p1021-fcm-nand",
83 "fsl,elbc-fcm-nand";
84 reg = <0x1 0x0 0x40000>;
85
86 partition@0 {
87 /* This location must not be altered */
88 /* 1MB for u-boot Bootloader Image */
89 reg = <0x0 0x00100000>;
90 label = "NAND U-Boot Image";
91 read-only;
92 };
93
94 partition@100000 {
95 /* 1MB for DTB Image */
96 reg = <0x00100000 0x00100000>;
97 label = "NAND DTB Image";
98 };
99
100 partition@200000 {
101 /* 4MB for Linux Kernel Image */
102 reg = <0x00200000 0x00400000>;
103 label = "NAND Linux Kernel Image";
104 };
105
106 partition@600000 {
107 /* 4MB for Compressed Root file System Image */
108 reg = <0x00600000 0x00400000>;
109 label = "NAND Compressed RFS Image";
110 };
111
112 partition@a00000 {
113 /* 7MB for JFFS2 based Root file System */
114 reg = <0x00a00000 0x00700000>;
115 label = "NAND JFFS2 Root File System";
116 };
117
118 partition@1100000 {
119 /* 15MB for User Writable Area */
120 reg = <0x01100000 0x00f00000>;
121 label = "NAND Writable User area";
122 };
123 };
124
125 L2switch@2,0 {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 compatible = "vitesse-7385";
129 reg = <0x2 0x0 0x20000>;
130 };
131};
132
133&soc {
134 i2c@3000 {
135 rtc@68 {
136 compatible = "pericom,pt7c4338";
137 reg = <0x68>;
138 };
139 };
140
141 spi@7000 {
142 flash@0 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "spansion,s25sl12801";
146 reg = <0>;
147 spi-max-frequency = <40000000>; /* input clock */
148
149 partition@u-boot {
150 /* 512KB for u-boot Bootloader Image */
151 reg = <0x0 0x00080000>;
152 label = "SPI Flash U-Boot Image";
153 read-only;
154 };
155
156 partition@dtb {
157 /* 512KB for DTB Image */
158 reg = <0x00080000 0x00080000>;
159 label = "SPI Flash DTB Image";
160 };
161
162 partition@kernel {
163 /* 4MB for Linux Kernel Image */
164 reg = <0x00100000 0x00400000>;
165 label = "SPI Flash Linux Kernel Image";
166 };
167
168 partition@fs {
169 /* 4MB for Compressed RFS Image */
170 reg = <0x00500000 0x00400000>;
171 label = "SPI Flash Compressed RFSImage";
172 };
173
174 partition@jffs-fs {
175 /* 7MB for JFFS2 based RFS */
176 reg = <0x00900000 0x00700000>;
177 label = "SPI Flash JFFS2 RFS";
178 };
179 };
180 };
181
182 usb@22000 {
183 phy_type = "ulpi";
184 };
185
186 mdio@24000 {
187 phy0: ethernet-phy@0 {
188 interrupt-parent = <&mpic>;
189 interrupts = <3 1 0 0>;
190 reg = <0x0>;
191 };
192
193 phy1: ethernet-phy@1 {
194 interrupt-parent = <&mpic>;
195 interrupts = <2 1 0 0>;
196 reg = <0x1>;
197 };
198
199 tbi0: tbi-phy@11 {
200 reg = <0x11>;
201 device_type = "tbi-phy";
202 };
203 };
204
205 mdio@25000 {
206 tbi1: tbi-phy@11 {
207 reg = <0x11>;
208 device_type = "tbi-phy";
209 };
210 };
211
212 mdio@26000 {
213 tbi2: tbi-phy@11 {
214 reg = <0x11>;
215 device_type = "tbi-phy";
216 };
217 };
218
219 enet0: ethernet@b0000 {
220 fixed-link = <1 1 1000 0 0>;
221 phy-connection-type = "rgmii-id";
222
223 };
224
225 enet1: ethernet@b1000 {
226 phy-handle = <&phy0>;
227 tbi-handle = <&tbi1>;
228 phy-connection-type = "sgmii";
229 };
230
231 enet2: ethernet@b2000 {
232 phy-handle = <&phy1>;
233 tbi-handle = <&tbi2>;
234 phy-connection-type = "rgmii-id";
235 };
236};
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/dts/p1021rdb_36b.dts
new file mode 100644
index 000000000000..ea6d8b5fa10b
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1021rdb_36b.dts
@@ -0,0 +1,96 @@
1/*
2 * P1021 RDB Device Tree Source (36-bit address map)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/p1021si-pre.dtsi"
36/ {
37 model = "fsl,P1021RDB";
38 compatible = "fsl,P1021RDB-PC";
39
40 memory {
41 device_type = "memory";
42 };
43
44 lbc: localbus@fffe05000 {
45 reg = <0xf 0xffe05000 0 0x1000>;
46
47 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
48 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
49 0x1 0x0 0xf 0xff800000 0x00040000
50 0x2 0x0 0xf 0xffb00000 0x00020000>;
51 };
52
53 soc: soc@fffe00000 {
54 ranges = <0x0 0xf 0xffe00000 0x100000>;
55 };
56
57 pci0: pcie@fffe09000 {
58 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
59 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
60 reg = <0xf 0xffe09000 0 0x1000>;
61 pcie@0 {
62 ranges = <0x2000000 0x0 0xa0000000
63 0x2000000 0x0 0xa0000000
64 0x0 0x20000000
65
66 0x1000000 0x0 0x0
67 0x1000000 0x0 0x0
68 0x0 0x100000>;
69 };
70 };
71
72 pci1: pcie@fffe0a000 {
73 reg = <0xf 0xffe0a000 0 0x1000>;
74 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
75 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
76 pcie@0 {
77 ranges = <0x2000000 0x0 0xc0000000
78 0x2000000 0x0 0xc0000000
79 0x0 0x20000000
80
81 0x1000000 0x0 0x0
82 0x1000000 0x0 0x0
83 0x0 0x100000>;
84 };
85 };
86
87 qe: qe@fffe80000 {
88 ranges = <0x0 0xf 0xffe80000 0x40000>;
89 reg = <0xf 0xffe80000 0 0x480>;
90 brg-frequency = <0>;
91 bus-frequency = <0>;
92 };
93};
94
95/include/ "p1021rdb.dtsi"
96/include/ "fsl/p1021si-post.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-24 17:02:35 -0500