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authorTimur Tabi <timur@freescale.com>2008-09-09 15:43:39 -0400
committerPaul Mackerras <paulus@samba.org>2008-09-16 17:40:05 -0400
commit612f9d338a6060f814ef35b7108b43407a5df423 (patch)
tree5a7288f3f7bb5768fcc34c55649bf37000db6bb9 /arch/powerpc/boot/dts
parentbc45eb8950b8c14487385cfd2bda1613ca8d9703 (diff)
powerpc: Fix interrupt values for DMA2 in MPC8610 HPCD device tree
For Freescale 8xxx devices that use an MPIC, the interrupt numbers in the device tree must be 16 greater than the values documented in the reference manual. In these chips, the MPIC is wired to use the first 16 numbers for external interrupts, but the documentation numbers internal interrupts from 0. In the MPC8610 HPCD device tree, the interrupt properties for the DMA channels for DMA2 were not the adjusted values. This fixes that. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 3b3a1062cb25..584a4f184eb2 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -281,7 +281,7 @@
281 cell-index = <0>; 281 cell-index = <0>;
282 reg = <0x0 0x80>; 282 reg = <0x0 0x80>;
283 interrupt-parent = <&mpic>; 283 interrupt-parent = <&mpic>;
284 interrupts = <60 2>; 284 interrupts = <76 2>;
285 }; 285 };
286 dma-channel@1 { 286 dma-channel@1 {
287 compatible = "fsl,mpc8610-dma-channel", 287 compatible = "fsl,mpc8610-dma-channel",
@@ -289,7 +289,7 @@
289 cell-index = <1>; 289 cell-index = <1>;
290 reg = <0x80 0x80>; 290 reg = <0x80 0x80>;
291 interrupt-parent = <&mpic>; 291 interrupt-parent = <&mpic>;
292 interrupts = <61 2>; 292 interrupts = <77 2>;
293 }; 293 };
294 dma-channel@2 { 294 dma-channel@2 {
295 compatible = "fsl,mpc8610-dma-channel", 295 compatible = "fsl,mpc8610-dma-channel",
@@ -297,7 +297,7 @@
297 cell-index = <2>; 297 cell-index = <2>;
298 reg = <0x100 0x80>; 298 reg = <0x100 0x80>;
299 interrupt-parent = <&mpic>; 299 interrupt-parent = <&mpic>;
300 interrupts = <62 2>; 300 interrupts = <78 2>;
301 }; 301 };
302 dma-channel@3 { 302 dma-channel@3 {
303 compatible = "fsl,mpc8610-dma-channel", 303 compatible = "fsl,mpc8610-dma-channel",
@@ -305,7 +305,7 @@
305 cell-index = <3>; 305 cell-index = <3>;
306 reg = <0x180 0x80>; 306 reg = <0x180 0x80>;
307 interrupt-parent = <&mpic>; 307 interrupt-parent = <&mpic>;
308 interrupts = <63 2>; 308 interrupts = <79 2>;
309 }; 309 };
310 }; 310 };
311 311