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authorPaul Mackerras <paulus@samba.org>2008-01-23 23:29:14 -0500
committerPaul Mackerras <paulus@samba.org>2008-01-23 23:29:14 -0500
commitdcb571be2019ae677bc5ed64437dbc87ae1eb67f (patch)
tree1b93f9ea3568be4dcc49ffb2adc0d3ab0a02b47f /arch/powerpc/boot/dts
parent9156ad48338e0306e508ead5c0d9986050744475 (diff)
parent96f39c1718091d63dc1c5012d566737ea0d2a20c (diff)
Merge branch 'for-2.6.25' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.25
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/adder875-redboot.dts184
-rw-r--r--arch/powerpc/boot/dts/adder875-uboot.dts183
-rw-r--r--arch/powerpc/boot/dts/ep8248e.dts207
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts49
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts51
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts30
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts1
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts1
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts279
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts265
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts293
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts7
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts113
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts48
-rw-r--r--arch/powerpc/boot/dts/storcenter.dts138
17 files changed, 1829 insertions, 28 deletions
diff --git a/arch/powerpc/boot/dts/adder875-redboot.dts b/arch/powerpc/boot/dts/adder875-redboot.dts
new file mode 100644
index 000000000000..930bfb3894eb
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875-redboot.dts
@@ -0,0 +1,184 @@
1/*
2 * Device Tree Source for MPC885 ADS running RedBoot
3 *
4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "Analogue & Micro Adder MPC875";
16 compatible = "analogue-and-micro,adder875";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 console = &console;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,875@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <16>;
34 i-cache-line-size = <16>;
35 d-cache-size = <8192>;
36 i-cache-size = <8192>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
40 interrupts = <15 2>; // decrementer interrupt
41 interrupt-parent = <&PIC>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0 0x01000000>;
48 };
49
50 localbus@fa200100 {
51 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
52 "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
55 reg = <0xfa200100 0x40>;
56
57 ranges = <
58 0 0 0xfe000000 0x00800000
59 2 0 0xfa100000 0x00008000
60 >;
61
62 flash@0,0 {
63 compatible = "cfi-flash";
64 reg = <0 0 0x800000>;
65 bank-width = <2>;
66 device-width = <2>;
67 };
68 };
69
70 soc@fa200000 {
71 compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges = <0 0xfa200000 0x00004000>;
75
76 // Temporary until code stops depending on it.
77 device_type = "soc";
78
79 // Temporary until get_immrbase() is fixed.
80 reg = <0xfa200000 0x4000>;
81
82 mdio@e00 {
83 compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
84 reg = <0xe00 0x188>;
85 #address-cells = <1>;
86 #size-cells = <0>;
87
88 PHY0: ethernet-phy@0 {
89 reg = <0>;
90 device_type = "ethernet-phy";
91 };
92
93 PHY1: ethernet-phy@1 {
94 reg = <1>;
95 device_type = "ethernet-phy";
96 };
97 };
98
99 eth0: ethernet@e00 {
100 device_type = "network";
101 compatible = "fsl,mpc875-fec-enet",
102 "fsl,pq1-fec-enet";
103 reg = <0xe00 0x188>;
104 local-mac-address = [ 00 00 00 00 00 00 ];
105 interrupts = <3 1>;
106 interrupt-parent = <&PIC>;
107 phy-handle = <&PHY0>;
108 linux,network-index = <0>;
109 };
110
111 eth1: ethernet@1e00 {
112 device_type = "network";
113 compatible = "fsl,mpc875-fec-enet",
114 "fsl,pq1-fec-enet";
115 reg = <0x1e00 0x188>;
116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <7 1>;
118 interrupt-parent = <&PIC>;
119 phy-handle = <&PHY1>;
120 linux,network-index = <1>;
121 };
122
123 PIC: interrupt-controller@0 {
124 interrupt-controller;
125 #interrupt-cells = <2>;
126 reg = <0 0x24>;
127 compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
128 };
129
130 cpm@9c0 {
131 #address-cells = <1>;
132 #size-cells = <1>;
133 compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
134 interrupts = <0>; // cpm error interrupt
135 interrupt-parent = <&CPM_PIC>;
136 reg = <0x9c0 0x40>;
137 ranges;
138
139 muram {
140 #address-cells = <1>;
141 #size-cells = <1>;
142 ranges = <0 0x2000 0x2000>;
143
144 data@0 {
145 compatible = "fsl,cpm-muram-data";
146 reg = <0 0x1c00>;
147 };
148 };
149
150 brg@9f0 {
151 compatible = "fsl,mpc875-brg",
152 "fsl,cpm1-brg",
153 "fsl,cpm-brg";
154 reg = <0x9f0 0x10>;
155 };
156
157 CPM_PIC: interrupt-controller@930 {
158 interrupt-controller;
159 #interrupt-cells = <1>;
160 interrupts = <5 2 0 2>;
161 interrupt-parent = <&PIC>;
162 reg = <0x930 0x20>;
163 compatible = "fsl,mpc875-cpm-pic",
164 "fsl,cpm1-pic";
165 };
166
167 console: serial@a80 {
168 device_type = "serial";
169 compatible = "fsl,mpc875-smc-uart",
170 "fsl,cpm1-smc-uart";
171 reg = <0xa80 0x10 0x3e80 0x40>;
172 interrupts = <4>;
173 interrupt-parent = <&CPM_PIC>;
174 fsl,cpm-brg = <1>;
175 fsl,cpm-command = <0x0090>;
176 current-speed = <115200>;
177 };
178 };
179 };
180
181 chosen {
182 linux,stdout-path = &console;
183 };
184};
diff --git a/arch/powerpc/boot/dts/adder875-uboot.dts b/arch/powerpc/boot/dts/adder875-uboot.dts
new file mode 100644
index 000000000000..0197242dacfb
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875-uboot.dts
@@ -0,0 +1,183 @@
1/*
2 * Device Tree Source for MPC885 ADS running U-Boot
3 *
4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "Analogue & Micro Adder MPC875";
16 compatible = "analogue-and-micro,adder875";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 console = &console;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,875@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <16>;
34 i-cache-line-size = <16>;
35 d-cache-size = <8192>;
36 i-cache-size = <8192>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
40 interrupts = <15 2>; // decrementer interrupt
41 interrupt-parent = <&PIC>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0 0x01000000>;
48 };
49
50 localbus@ff000100 {
51 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
52 "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
55 reg = <0xff000100 0x40>;
56
57 ranges = <
58 0 0 0xfe000000 0x01000000
59 >;
60
61 flash@0,0 {
62 compatible = "cfi-flash";
63 reg = <0 0 0x800000>;
64 bank-width = <2>;
65 device-width = <2>;
66 };
67 };
68
69 soc@ff000000 {
70 compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges = <0 0xff000000 0x00004000>;
74
75 // Temporary until code stops depending on it.
76 device_type = "soc";
77
78 // Temporary until get_immrbase() is fixed.
79 reg = <0xff000000 0x4000>;
80
81 mdio@e00 {
82 compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
83 reg = <0xe00 0x188>;
84 #address-cells = <1>;
85 #size-cells = <0>;
86
87 PHY0: ethernet-phy@0 {
88 reg = <0>;
89 device_type = "ethernet-phy";
90 };
91
92 PHY1: ethernet-phy@1 {
93 reg = <1>;
94 device_type = "ethernet-phy";
95 };
96 };
97
98 eth0: ethernet@e00 {
99 device_type = "network";
100 compatible = "fsl,mpc875-fec-enet",
101 "fsl,pq1-fec-enet";
102 reg = <0xe00 0x188>;
103 local-mac-address = [ 00 00 00 00 00 00 ];
104 interrupts = <3 1>;
105 interrupt-parent = <&PIC>;
106 phy-handle = <&PHY0>;
107 linux,network-index = <0>;
108 };
109
110 eth1: ethernet@1e00 {
111 device_type = "network";
112 compatible = "fsl,mpc875-fec-enet",
113 "fsl,pq1-fec-enet";
114 reg = <0x1e00 0x188>;
115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <7 1>;
117 interrupt-parent = <&PIC>;
118 phy-handle = <&PHY1>;
119 linux,network-index = <1>;
120 };
121
122 PIC: interrupt-controller@0 {
123 interrupt-controller;
124 #interrupt-cells = <2>;
125 reg = <0 0x24>;
126 compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
127 };
128
129 cpm@9c0 {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
133 interrupts = <0>; // cpm error interrupt
134 interrupt-parent = <&CPM_PIC>;
135 reg = <0x9c0 0x40>;
136 ranges;
137
138 muram {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 ranges = <0 0x2000 0x2000>;
142
143 data@0 {
144 compatible = "fsl,cpm-muram-data";
145 reg = <0 0x1c00>;
146 };
147 };
148
149 brg@9f0 {
150 compatible = "fsl,mpc875-brg",
151 "fsl,cpm1-brg",
152 "fsl,cpm-brg";
153 reg = <0x9f0 0x10>;
154 };
155
156 CPM_PIC: interrupt-controller@930 {
157 interrupt-controller;
158 #interrupt-cells = <1>;
159 interrupts = <5 2 0 2>;
160 interrupt-parent = <&PIC>;
161 reg = <0x930 0x20>;
162 compatible = "fsl,mpc875-cpm-pic",
163 "fsl,cpm1-pic";
164 };
165
166 console: serial@a80 {
167 device_type = "serial";
168 compatible = "fsl,mpc875-smc-uart",
169 "fsl,cpm1-smc-uart";
170 reg = <0xa80 0x10 0x3e80 0x40>;
171 interrupts = <4>;
172 interrupt-parent = <&CPM_PIC>;
173 fsl,cpm-brg = <1>;
174 fsl,cpm-command = <0x0090>;
175 current-speed = <115200>;
176 };
177 };
178 };
179
180 chosen {
181 linux,stdout-path = &console;
182 };
183};
diff --git a/arch/powerpc/boot/dts/ep8248e.dts b/arch/powerpc/boot/dts/ep8248e.dts
new file mode 100644
index 000000000000..5d2fb76a72c1
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep8248e.dts
@@ -0,0 +1,207 @@
1/*
2 * Device Tree for the Embedded Planet EP8248E board running PlanetCore.
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13/ {
14 model = "EP8248E";
15 compatible = "fsl,ep8248e";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 planetcore-SMC1 = &smc1;
21 planetcore-SCC1 = &scc1;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 serial0 = &smc1;
25 serial1 = &scc1;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8248@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <16384>;
38 i-cache-size = <16384>;
39 timebase-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
43
44 localbus@f0010100 {
45 compatible = "fsl,mpc8248-localbus",
46 "fsl,pq2-localbus",
47 "simple-bus";
48 #address-cells = <2>;
49 #size-cells = <1>;
50 reg = <0xf0010100 0x40>;
51
52 ranges = <0 0 0xfc000000 0x04000000
53 1 0 0xfa000000 0x00008000>;
54
55 flash@0,3800000 {
56 compatible = "cfi-flash";
57 reg = <0 0x3800000 0x800000>;
58 bank-width = <4>;
59 device-width = <2>;
60 };
61
62 bcsr@1,0 {
63 #address-cells = <2>;
64 #size-cells = <1>;
65 reg = <1 0 0x10>;
66 compatible = "fsl,ep8248e-bcsr";
67 ranges;
68
69 mdio {
70 device_type = "mdio";
71 compatible = "fsl,ep8248e-mdio-bitbang";
72 #address-cells = <1>;
73 #size-cells = <0>;
74 reg = <1 8 1>;
75
76 PHY0: ethernet-phy@0 {
77 interrupt-parent = <&PIC>;
78 reg = <0>;
79 device_type = "ethernet-phy";
80 };
81
82 PHY1: ethernet-phy@1 {
83 interrupt-parent = <&PIC>;
84 reg = <1>;
85 device_type = "ethernet-phy";
86 };
87 };
88 };
89 };
90
91 memory {
92 device_type = "memory";
93 reg = <0 0>;
94 };
95
96 soc@f0000000 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus";
100 ranges = <0x00000000 0xf0000000 0x00053000>;
101
102 // Temporary until code stops depending on it.
103 device_type = "soc";
104
105 // Temporary -- will go away once kernel uses ranges for get_immrbase().
106 reg = <0xf0000000 0x00053000>;
107
108 cpm@119c0 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 #interrupt-cells = <2>;
112 compatible = "fsl,mpc8248-cpm", "fsl,cpm2",
113 "simple-bus";
114 reg = <0x119c0 0x30>;
115 ranges;
116
117 muram {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 ranges = <0 0 0x10000>;
121
122 data@0 {
123 compatible = "fsl,cpm-muram-data";
124 reg = <0 0x1100 0x1140
125 0xec0 0x9800 0x800>;
126 };
127 };
128
129 brg@119f0 {
130 compatible = "fsl,mpc8248-brg",
131 "fsl,cpm2-brg",
132 "fsl,cpm-brg";
133 reg = <0x119f0 0x10 0x115f0 0x10>;
134 };
135
136 /* Monitor port/SMC1 */
137 smc1: serial@11a80 {
138 device_type = "serial";
139 compatible = "fsl,mpc8248-smc-uart",
140 "fsl,cpm2-smc-uart";
141 reg = <0x11a80 0x20 0x1100 0x40>;
142 interrupts = <4 8>;
143 interrupt-parent = <&PIC>;
144 fsl,cpm-brg = <7>;
145 fsl,cpm-command = <0x1d000000>;
146 linux,planetcore-label = "SMC1";
147 };
148
149 /* "Serial" port/SCC1 */
150 scc1: serial@11a00 {
151 device_type = "serial";
152 compatible = "fsl,mpc8248-scc-uart",
153 "fsl,cpm2-scc-uart";
154 reg = <0x11a00 0x20 0x8000 0x100>;
155 interrupts = <40 8>;
156 interrupt-parent = <&PIC>;
157 fsl,cpm-brg = <1>;
158 fsl,cpm-command = <0x00800000>;
159 linux,planetcore-label = "SCC1";
160 };
161
162 eth0: ethernet@11300 {
163 device_type = "network";
164 compatible = "fsl,mpc8248-fcc-enet",
165 "fsl,cpm2-fcc-enet";
166 reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
167 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <32 8>;
169 interrupt-parent = <&PIC>;
170 phy-handle = <&PHY0>;
171 linux,network-index = <0>;
172 fsl,cpm-command = <0x12000300>;
173 };
174
175 eth1: ethernet@11320 {
176 device_type = "network";
177 compatible = "fsl,mpc8248-fcc-enet",
178 "fsl,cpm2-fcc-enet";
179 reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>;
180 local-mac-address = [ 00 00 00 00 00 00 ];
181 interrupts = <33 8>;
182 interrupt-parent = <&PIC>;
183 phy-handle = <&PHY1>;
184 linux,network-index = <1>;
185 fsl,cpm-command = <0x16200300>;
186 };
187
188 usb@11b60 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,mpc8248-usb",
192 "fsl,cpm2-usb";
193 reg = <0x11b60 0x18 0x8b00 0x100>;
194 interrupt-parent = <&PIC>;
195 interrupts = <11 8>;
196 fsl,cpm-command = <0x2e600000>;
197 };
198 };
199
200 PIC: interrupt-controller@10c00 {
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 reg = <0x10c00 0x80>;
204 compatible = "fsl,mpc8248-pic", "fsl,pq2-pic";
205 };
206 };
207};
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index c5b6665a8209..9bcf2c92541f 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -45,10 +45,58 @@
45 reg = <00000000 08000000>; // 128MB at 0 45 reg = <00000000 08000000>; // 128MB at 0
46 }; 46 };
47 47
48 localbus@e0005000 {
49 #address-cells = <2>;
50 #size-cells = <1>;
51 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
52 reg = <e0005000 1000>;
53 interrupts = <d#77 8>;
54 interrupt-parent = <&ipic>;
55
56 // CS0 and CS1 are swapped when
57 // booting from nand, but the
58 // addresses are the same.
59 ranges = <0 0 fe000000 00800000
60 1 0 e2800000 00008000
61 2 0 f0000000 00020000
62 3 0 fa000000 00008000>;
63
64 flash@0,0 {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 compatible = "cfi-flash";
68 reg = <0 0 800000>;
69 bank-width = <2>;
70 device-width = <1>;
71 };
72
73 nand@1,0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "fsl,mpc8313-fcm-nand",
77 "fsl,elbc-fcm-nand";
78 reg = <1 0 2000>;
79
80 u-boot@0 {
81 reg = <0 100000>;
82 read-only;
83 };
84
85 kernel@100000 {
86 reg = <100000 300000>;
87 };
88
89 fs@400000 {
90 reg = <400000 1c00000>;
91 };
92 };
93 };
94
48 soc8313@e0000000 { 95 soc8313@e0000000 {
49 #address-cells = <1>; 96 #address-cells = <1>;
50 #size-cells = <1>; 97 #size-cells = <1>;
51 device_type = "soc"; 98 device_type = "soc";
99 compatible = "simple-bus";
52 ranges = <0 e0000000 00100000>; 100 ranges = <0 e0000000 00100000>;
53 reg = <e0000000 00000200>; 101 reg = <e0000000 00000200>;
54 bus-frequency = <0>; 102 bus-frequency = <0>;
@@ -92,7 +140,6 @@
92 140
93 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 141 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94 usb@23000 { 142 usb@23000 {
95 device_type = "usb";
96 compatible = "fsl-usb2-dr"; 143 compatible = "fsl-usb2-dr";
97 reg = <23000 1000>; 144 reg = <23000 1000>;
98 #address-cells = <1>; 145 #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 26ac467b10ea..690252456d3d 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -7,6 +7,18 @@
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version. 9 * option) any later version.
10
11 * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do
12 * this:
13 *
14 * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board.
15 * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board
16 * next to the serial ports.
17 * 3) Solder a wire from U61-22 to P19K-22.
18 *
19 * Note that there's a typo in the schematic. The board labels the last column
20 * of pins "P19K", but in the schematic, that column is called "P19J". So if
21 * you're going by the schematic, the pin is called "P19J-K22".
10 */ 22 */
11 23
12/ { 24/ {
@@ -169,6 +181,23 @@
169 1 1e 1 0 1 0 /* TX_EN */ 181 1 1e 1 0 1 0 /* TX_EN */
170 1 1f 2 0 1 0>;/* CRS */ 182 1 1f 2 0 1 0>;/* CRS */
171 }; 183 };
184 pio5: ucc_pin@05 {
185 pio-map = <
186 /*
187 * open has
188 * port pin dir drain sel irq
189 */
190 2 0 1 0 2 0 /* TxD5 */
191 2 8 2 0 2 0 /* RxD5 */
192
193 2 1d 2 0 0 0 /* CTS5 */
194 2 1f 1 0 2 0 /* RTS5 */
195
196 2 18 2 0 0 0 /* CD */
197
198 >;
199 };
200
172 }; 201 };
173 }; 202 };
174 203
@@ -176,6 +205,7 @@
176 #address-cells = <1>; 205 #address-cells = <1>;
177 #size-cells = <1>; 206 #size-cells = <1>;
178 device_type = "qe"; 207 device_type = "qe";
208 compatible = "fsl,qe";
179 model = "QE"; 209 model = "QE";
180 ranges = <0 e0100000 00100000>; 210 ranges = <0 e0100000 00100000>;
181 reg = <e0100000 480>; 211 reg = <e0100000 480>;
@@ -210,7 +240,6 @@
210 }; 240 };
211 241
212 usb@6c0 { 242 usb@6c0 {
213 device_type = "usb";
214 compatible = "qe_udc"; 243 compatible = "qe_udc";
215 reg = <6c0 40 8B00 100>; 244 reg = <6c0 40 8B00 100>;
216 interrupts = <b>; 245 interrupts = <b>;
@@ -250,6 +279,26 @@
250 pio-handle = < &pio4 >; 279 pio-handle = < &pio4 >;
251 }; 280 };
252 281
282 ucc@2400 {
283 device_type = "serial";
284 compatible = "ucc_uart";
285 model = "UCC";
286 device-id = <5>; /* The UCC number, 1-7*/
287 port-number = <0>; /* Which ttyQEx device */
288 soft-uart; /* We need Soft-UART */
289 reg = <2400 200>;
290 interrupts = <28>; /* From Table 18-12 */
291 interrupt-parent = < &qeic >;
292 /*
293 * For Soft-UART, we need to set TX to 1X, which
294 * means specifying separate clock sources.
295 */
296 rx-clock-name = "brg5";
297 tx-clock-name = "brg6";
298 pio-handle = < &pio5 >;
299 };
300
301
253 mdio@2320 { 302 mdio@2320 {
254 #address-cells = <1>; 303 #address-cells = <1>;
255 #size-cells = <0>; 304 #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index e354f2634246..04b8da4deb60 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -91,7 +91,6 @@
91 }; 91 };
92 92
93 usb@22000 { 93 usb@22000 {
94 device_type = "usb";
95 compatible = "fsl-usb2-mph"; 94 compatible = "fsl-usb2-mph";
96 reg = <22000 1000>; 95 reg = <22000 1000>;
97 #address-cells = <1>; 96 #address-cells = <1>;
@@ -103,7 +102,6 @@
103 }; 102 };
104 103
105 usb@23000 { 104 usb@23000 {
106 device_type = "usb";
107 compatible = "fsl-usb2-dr"; 105 compatible = "fsl-usb2-dr";
108 reg = <23000 1000>; 106 reg = <23000 1000>;
109 #address-cells = <1>; 107 #address-cells = <1>;
@@ -127,14 +125,6 @@
127 reg = <1c>; 125 reg = <1c>;
128 device_type = "ethernet-phy"; 126 device_type = "ethernet-phy";
129 }; 127 };
130
131 /* Vitesse 7385 */
132 phy1f: ethernet-phy@1f {
133 interrupt-parent = < &ipic >;
134 interrupts = <12 8>;
135 reg = <1f>;
136 device_type = "ethernet-phy";
137 };
138 }; 128 };
139 129
140 enet0: ethernet@24000 { 130 enet0: ethernet@24000 {
@@ -159,7 +149,8 @@
159 local-mac-address = [ 00 00 00 00 00 00 ]; 149 local-mac-address = [ 00 00 00 00 00 00 ];
160 interrupts = <23 8 24 8 25 8>; 150 interrupts = <23 8 24 8 25 8>;
161 interrupt-parent = < &ipic >; 151 interrupt-parent = < &ipic >;
162 phy-handle = < &phy1f >; 152 /* Vitesse 7385 isn't on the MDIO bus */
153 fixed-link = <1 1 d#1000 0 0>;
163 linux,network-index = <1>; 154 linux,network-index = <1>;
164 }; 155 };
165 156
@@ -253,6 +244,21 @@
253 device_type = "pci"; 244 device_type = "pci";
254 }; 245 };
255 246
247 localbus@e0005000 {
248 #address-cells = <2>;
249 #size-cells = <1>;
250 compatible = "fsl,mpc8349e-localbus",
251 "fsl,pq2pro-localbus";
252 reg = <e0005000 d8>;
253 ranges = <3 0 f0000000 210>;
256 254
257 255 pata@3,0 {
256 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
257 reg = <3 0 10 3 20c 4>;
258 reg-shift = <1>;
259 pio-mode = <6>;
260 interrupts = <17 8>;
261 interrupt-parent = <&ipic>;
262 };
263 };
258}; 264};
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index ebdf0b750086..a06ff92cf0b1 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -89,7 +89,6 @@
89 }; 89 };
90 90
91 usb@23000 { 91 usb@23000 {
92 device_type = "usb";
93 compatible = "fsl-usb2-dr"; 92 compatible = "fsl-usb2-dr";
94 reg = <23000 1000>; 93 reg = <23000 1000>;
95 #address-cells = <1>; 94 #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 0ba13ebcea68..4120e92fcecf 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -104,7 +104,6 @@
104 /* phy type (ULPI or SERIAL) are only types supportted for MPH */ 104 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
105 /* port = 0 or 1 */ 105 /* port = 0 or 1 */
106 usb@22000 { 106 usb@22000 {
107 device_type = "usb";
108 compatible = "fsl-usb2-mph"; 107 compatible = "fsl-usb2-mph";
109 reg = <22000 1000>; 108 reg = <22000 1000>;
110 #address-cells = <1>; 109 #address-cells = <1>;
@@ -116,7 +115,6 @@
116 }; 115 };
117 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 116 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
118 usb@23000 { 117 usb@23000 {
119 device_type = "usb";
120 compatible = "fsl-usb2-dr"; 118 compatible = "fsl-usb2-dr";
121 reg = <23000 1000>; 119 reg = <23000 1000>;
122 #address-cells = <1>; 120 #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index fd841b2fddd0..2181d2cdbff2 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -241,7 +241,6 @@
241 }; 241 };
242 242
243 usb@6c0 { 243 usb@6c0 {
244 device_type = "usb";
245 compatible = "qe_udc"; 244 compatible = "qe_udc";
246 reg = <6c0 40 8B00 100>; 245 reg = <6c0 40 8B00 100>;
247 interrupts = <b>; 246 interrupts = <b>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
new file mode 100644
index 000000000000..98b46065f45a
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -0,0 +1,279 @@
1/*
2 * MPC8377E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8377emds";
16 compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8377@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <0x20>;
36 i-cache-line-size = <0x20>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <0xe 0x8>;
70 interrupt-parent = < &ipic >;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <0xf 0x8>;
81 interrupt-parent = < &ipic >;
82 dfsrr;
83 };
84
85 spi@7000 {
86 compatible = "fsl_spi";
87 reg = <0x7000 0x1000>;
88 interrupts = <0x10 0x8>;
89 interrupt-parent = < &ipic >;
90 mode = "cpu";
91 };
92
93 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94 usb@23000 {
95 compatible = "fsl-usb2-dr";
96 reg = <0x23000 0x1000>;
97 #address-cells = <1>;
98 #size-cells = <0>;
99 interrupt-parent = < &ipic >;
100 interrupts = <0x26 0x8>;
101 phy_type = "utmi_wide";
102 };
103
104 mdio@24520 {
105 #address-cells = <1>;
106 #size-cells = <0>;
107 compatible = "fsl,gianfar-mdio";
108 reg = <0x24520 0x20>;
109 phy2: ethernet-phy@2 {
110 interrupt-parent = < &ipic >;
111 interrupts = <0x11 0x8>;
112 reg = <2>;
113 device_type = "ethernet-phy";
114 };
115 phy3: ethernet-phy@3 {
116 interrupt-parent = < &ipic >;
117 interrupts = <0x12 0x8>;
118 reg = <3>;
119 device_type = "ethernet-phy";
120 };
121 };
122
123 enet0: ethernet@24000 {
124 cell-index = <0>;
125 device_type = "network";
126 model = "eTSEC";
127 compatible = "gianfar";
128 reg = <0x24000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
131 phy-connection-type = "mii";
132 interrupt-parent = < &ipic >;
133 phy-handle = < &phy2 >;
134 };
135
136 enet1: ethernet@25000 {
137 cell-index = <1>;
138 device_type = "network";
139 model = "eTSEC";
140 compatible = "gianfar";
141 reg = <0x25000 0x1000>;
142 local-mac-address = [ 00 00 00 00 00 00 ];
143 interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
144 phy-connection-type = "mii";
145 interrupt-parent = < &ipic >;
146 phy-handle = < &phy3 >;
147 };
148
149 serial0: serial@4500 {
150 cell-index = <0>;
151 device_type = "serial";
152 compatible = "ns16550";
153 reg = <0x4500 0x100>;
154 clock-frequency = <0>;
155 interrupts = <0x9 0x8>;
156 interrupt-parent = < &ipic >;
157 };
158
159 serial1: serial@4600 {
160 cell-index = <1>;
161 device_type = "serial";
162 compatible = "ns16550";
163 reg = <0x4600 0x100>;
164 clock-frequency = <0>;
165 interrupts = <0xa 0x8>;
166 interrupt-parent = < &ipic >;
167 };
168
169 crypto@30000 {
170 model = "SEC3";
171 compatible = "talitos";
172 reg = <0x30000 0x10000>;
173 interrupts = <0xb 0x8>;
174 interrupt-parent = < &ipic >;
175 /* Rev. 3.0 geometry */
176 num-channels = <4>;
177 channel-fifo-len = <0x18>;
178 exec-units-mask = <0x000001fe>;
179 descriptor-types-mask = <0x03ab0ebf>;
180 };
181
182 sdhc@2e000 {
183 model = "eSDHC";
184 compatible = "fsl,esdhc";
185 reg = <0x2e000 0x1000>;
186 interrupts = <0x2a 0x8>;
187 interrupt-parent = < &ipic >;
188 };
189
190 sata@18000 {
191 compatible = "fsl,mpc8379-sata";
192 reg = <0x18000 0x1000>;
193 interrupts = <0x2c 0x8>;
194 interrupt-parent = < &ipic >;
195 };
196
197 sata@19000 {
198 compatible = "fsl,mpc8379-sata";
199 reg = <0x19000 0x1000>;
200 interrupts = <0x2d 0x8>;
201 interrupt-parent = < &ipic >;
202 };
203
204 /* IPIC
205 * interrupts cell = <intr #, sense>
206 * sense values match linux IORESOURCE_IRQ_* defines:
207 * sense == 8: Level, low assertion
208 * sense == 2: Edge, high-to-low change
209 */
210 ipic: pic@700 {
211 compatible = "fsl,ipic";
212 interrupt-controller;
213 #address-cells = <0>;
214 #interrupt-cells = <2>;
215 reg = <0x700 0x100>;
216 };
217 };
218
219 pci0: pci@e0008500 {
220 cell-index = <0>;
221 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
222 interrupt-map = <
223
224 /* IDSEL 0x11 */
225 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
226 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
227 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
228 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
229
230 /* IDSEL 0x12 */
231 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
232 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
233 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
234 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
235
236 /* IDSEL 0x13 */
237 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
238 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
239 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
240 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
241
242 /* IDSEL 0x15 */
243 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
244 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
245 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
246 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
247
248 /* IDSEL 0x16 */
249 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
250 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
251 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
252 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
253
254 /* IDSEL 0x17 */
255 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
256 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
257 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
258 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
259
260 /* IDSEL 0x18 */
261 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
262 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
263 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
264 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
265 interrupt-parent = < &ipic >;
266 interrupts = <0x42 0x8>;
267 bus-range = <0 0>;
268 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
269 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
270 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
271 clock-frequency = <0>;
272 #interrupt-cells = <1>;
273 #size-cells = <2>;
274 #address-cells = <3>;
275 reg = <0xe0008500 0x100>;
276 compatible = "fsl,mpc8349-pci";
277 device_type = "pci";
278 };
279};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
new file mode 100644
index 000000000000..c117a6a3a8e6
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -0,0 +1,265 @@
1/*
2 * MPC8378E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8378emds";
16 compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8378@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <0x20>;
36 i-cache-line-size = <0x20>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <0xe 0x8>;
70 interrupt-parent = < &ipic >;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <0xf 0x8>;
81 interrupt-parent = < &ipic >;
82 dfsrr;
83 };
84
85 spi@7000 {
86 compatible = "fsl_spi";
87 reg = <0x7000 0x1000>;
88 interrupts = <0x10 0x8>;
89 interrupt-parent = < &ipic >;
90 mode = "cpu";
91 };
92
93 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94 usb@23000 {
95 compatible = "fsl-usb2-dr";
96 reg = <0x23000 0x1000>;
97 #address-cells = <1>;
98 #size-cells = <0>;
99 interrupt-parent = < &ipic >;
100 interrupts = <0x26 0x8>;
101 phy_type = "utmi_wide";
102 };
103
104 mdio@24520 {
105 #address-cells = <1>;
106 #size-cells = <0>;
107 compatible = "fsl,gianfar-mdio";
108 reg = <0x24520 0x20>;
109 phy2: ethernet-phy@2 {
110 interrupt-parent = < &ipic >;
111 interrupts = <0x11 0x8>;
112 reg = <2>;
113 device_type = "ethernet-phy";
114 };
115 phy3: ethernet-phy@3 {
116 interrupt-parent = < &ipic >;
117 interrupts = <0x12 0x8>;
118 reg = <3>;
119 device_type = "ethernet-phy";
120 };
121 };
122
123 enet0: ethernet@24000 {
124 cell-index = <0>;
125 device_type = "network";
126 model = "eTSEC";
127 compatible = "gianfar";
128 reg = <0x24000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
131 phy-connection-type = "mii";
132 interrupt-parent = < &ipic >;
133 phy-handle = < &phy2 >;
134 };
135
136 enet1: ethernet@25000 {
137 cell-index = <1>;
138 device_type = "network";
139 model = "eTSEC";
140 compatible = "gianfar";
141 reg = <0x25000 0x1000>;
142 local-mac-address = [ 00 00 00 00 00 00 ];
143 interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
144 phy-connection-type = "mii";
145 interrupt-parent = < &ipic >;
146 phy-handle = < &phy3 >;
147 };
148
149 serial0: serial@4500 {
150 cell-index = <0>;
151 device_type = "serial";
152 compatible = "ns16550";
153 reg = <0x4500 0x100>;
154 clock-frequency = <0>;
155 interrupts = <0x9 0x8>;
156 interrupt-parent = < &ipic >;
157 };
158
159 serial1: serial@4600 {
160 cell-index = <1>;
161 device_type = "serial";
162 compatible = "ns16550";
163 reg = <0x4600 0x100>;
164 clock-frequency = <0>;
165 interrupts = <0xa 0x8>;
166 interrupt-parent = < &ipic >;
167 };
168
169 crypto@30000 {
170 model = "SEC3";
171 compatible = "talitos";
172 reg = <0x30000 0x10000>;
173 interrupts = <0xb 0x8>;
174 interrupt-parent = < &ipic >;
175 /* Rev. 3.0 geometry */
176 num-channels = <4>;
177 channel-fifo-len = <0x18>;
178 exec-units-mask = <0x000001fe>;
179 descriptor-types-mask = <0x03ab0ebf>;
180 };
181
182 sdhc@2e000 {
183 model = "eSDHC";
184 compatible = "fsl,esdhc";
185 reg = <0x2e000 0x1000>;
186 interrupts = <0x2a 0x8>;
187 interrupt-parent = < &ipic >;
188 };
189
190 /* IPIC
191 * interrupts cell = <intr #, sense>
192 * sense values match linux IORESOURCE_IRQ_* defines:
193 * sense == 8: Level, low assertion
194 * sense == 2: Edge, high-to-low change
195 */
196 ipic: pic@700 {
197 compatible = "fsl,ipic";
198 interrupt-controller;
199 #address-cells = <0>;
200 #interrupt-cells = <2>;
201 reg = <0x700 0x100>;
202 };
203 };
204
205 pci0: pci@e0008500 {
206 cell-index = <0>;
207 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
208 interrupt-map = <
209
210 /* IDSEL 0x11 */
211 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
212 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
213 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
214 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
215
216 /* IDSEL 0x12 */
217 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
218 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
219 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
220 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
221
222 /* IDSEL 0x13 */
223 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
224 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
225 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
226 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
227
228 /* IDSEL 0x15 */
229 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
230 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
231 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
232 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
233
234 /* IDSEL 0x16 */
235 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
236 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
237 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
238 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
239
240 /* IDSEL 0x17 */
241 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
242 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
243 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
244 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
245
246 /* IDSEL 0x18 */
247 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
248 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
249 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
250 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
251 interrupt-parent = < &ipic >;
252 interrupts = <0x42 0x8>;
253 bus-range = <0 0>;
254 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
255 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
256 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
257 clock-frequency = <0>;
258 #interrupt-cells = <1>;
259 #size-cells = <2>;
260 #address-cells = <3>;
261 reg = <0xe0008500 0x100>;
262 compatible = "fsl,mpc8349-pci";
263 device_type = "pci";
264 };
265};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
new file mode 100644
index 000000000000..fc3ba79fb684
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -0,0 +1,293 @@
1/*
2 * MPC8379E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8379emds";
16 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8379@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <0x20>;
36 i-cache-line-size = <0x20>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <0xe 0x8>;
70 interrupt-parent = < &ipic >;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <0xf 0x8>;
81 interrupt-parent = < &ipic >;
82 dfsrr;
83 };
84
85 spi@7000 {
86 compatible = "fsl_spi";
87 reg = <0x7000 0x1000>;
88 interrupts = <0x10 0x8>;
89 interrupt-parent = < &ipic >;
90 mode = "cpu";
91 };
92
93 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
94 usb@23000 {
95 compatible = "fsl-usb2-dr";
96 reg = <0x23000 0x1000>;
97 #address-cells = <1>;
98 #size-cells = <0>;
99 interrupt-parent = < &ipic >;
100 interrupts = <0x26 0x8>;
101 phy_type = "utmi_wide";
102 };
103
104 mdio@24520 {
105 #address-cells = <1>;
106 #size-cells = <0>;
107 compatible = "fsl,gianfar-mdio";
108 reg = <0x24520 0x20>;
109 phy2: ethernet-phy@2 {
110 interrupt-parent = < &ipic >;
111 interrupts = <0x11 0x8>;
112 reg = <2>;
113 device_type = "ethernet-phy";
114 };
115 phy3: ethernet-phy@3 {
116 interrupt-parent = < &ipic >;
117 interrupts = <0x12 0x8>;
118 reg = <3>;
119 device_type = "ethernet-phy";
120 };
121 };
122
123 enet0: ethernet@24000 {
124 cell-index = <0>;
125 device_type = "network";
126 model = "eTSEC";
127 compatible = "gianfar";
128 reg = <0x24000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
131 phy-connection-type = "mii";
132 interrupt-parent = < &ipic >;
133 phy-handle = < &phy2 >;
134 };
135
136 enet1: ethernet@25000 {
137 cell-index = <1>;
138 device_type = "network";
139 model = "eTSEC";
140 compatible = "gianfar";
141 reg = <0x25000 0x1000>;
142 local-mac-address = [ 00 00 00 00 00 00 ];
143 interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
144 phy-connection-type = "mii";
145 interrupt-parent = < &ipic >;
146 phy-handle = < &phy3 >;
147 };
148
149 serial0: serial@4500 {
150 cell-index = <0>;
151 device_type = "serial";
152 compatible = "ns16550";
153 reg = <0x4500 0x100>;
154 clock-frequency = <0>;
155 interrupts = <0x9 0x8>;
156 interrupt-parent = < &ipic >;
157 };
158
159 serial1: serial@4600 {
160 cell-index = <1>;
161 device_type = "serial";
162 compatible = "ns16550";
163 reg = <0x4600 0x100>;
164 clock-frequency = <0>;
165 interrupts = <0xa 0x8>;
166 interrupt-parent = < &ipic >;
167 };
168
169 crypto@30000 {
170 model = "SEC3";
171 compatible = "talitos";
172 reg = <0x30000 0x10000>;
173 interrupts = <0xb 0x8>;
174 interrupt-parent = < &ipic >;
175 /* Rev. 3.0 geometry */
176 num-channels = <4>;
177 channel-fifo-len = <0x18>;
178 exec-units-mask = <0x000001fe>;
179 descriptor-types-mask = <0x03ab0ebf>;
180 };
181
182 sdhc@2e000 {
183 model = "eSDHC";
184 compatible = "fsl,esdhc";
185 reg = <0x2e000 0x1000>;
186 interrupts = <0x2a 0x8>;
187 interrupt-parent = < &ipic >;
188 };
189
190 sata@18000 {
191 compatible = "fsl,mpc8379-sata";
192 reg = <0x18000 0x1000>;
193 interrupts = <0x2c 0x8>;
194 interrupt-parent = < &ipic >;
195 };
196
197 sata@19000 {
198 compatible = "fsl,mpc8379-sata";
199 reg = <0x19000 0x1000>;
200 interrupts = <0x2d 0x8>;
201 interrupt-parent = < &ipic >;
202 };
203
204 sata@1a000 {
205 compatible = "fsl,mpc8379-sata";
206 reg = <0x1a000 0x1000>;
207 interrupts = <0x2e 0x8>;
208 interrupt-parent = < &ipic >;
209 };
210
211 sata@1b000 {
212 compatible = "fsl,mpc8379-sata";
213 reg = <0x1b000 0x1000>;
214 interrupts = <0x2f 0x8>;
215 interrupt-parent = < &ipic >;
216 };
217
218 /* IPIC
219 * interrupts cell = <intr #, sense>
220 * sense values match linux IORESOURCE_IRQ_* defines:
221 * sense == 8: Level, low assertion
222 * sense == 2: Edge, high-to-low change
223 */
224 ipic: pic@700 {
225 compatible = "fsl,ipic";
226 interrupt-controller;
227 #address-cells = <0>;
228 #interrupt-cells = <2>;
229 reg = <0x700 0x100>;
230 };
231 };
232
233 pci0: pci@e0008500 {
234 cell-index = <0>;
235 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
236 interrupt-map = <
237
238 /* IDSEL 0x11 */
239 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
240 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
241 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
242 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
243
244 /* IDSEL 0x12 */
245 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
246 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
247 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
248 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
249
250 /* IDSEL 0x13 */
251 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
252 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
253 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
254 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
255
256 /* IDSEL 0x15 */
257 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
258 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
259 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
260 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
261
262 /* IDSEL 0x16 */
263 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
264 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
265 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
266 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
267
268 /* IDSEL 0x17 */
269 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
270 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
271 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
272 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
273
274 /* IDSEL 0x18 */
275 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
276 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
277 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
278 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
279 interrupt-parent = < &ipic >;
280 interrupts = <0x42 0x8>;
281 bus-range = <0 0>;
282 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
283 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
284 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
285 clock-frequency = <0>;
286 #interrupt-cells = <1>;
287 #size-cells = <2>;
288 #address-cells = <3>;
289 reg = <0xe0008500 0x100>;
290 compatible = "fsl,mpc8349-pci";
291 device_type = "pci";
292 };
293};
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 54b3bdf7fc97..688af9d06382 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -304,9 +304,9 @@
304 interrupt-map = < 304 interrupt-map = <
305 // IDSEL 0x1c USB 305 // IDSEL 0x1c USB
306 e000 0 0 1 &i8259 c 2 306 e000 0 0 1 &i8259 c 2
307 e100 0 0 1 &i8259 9 2 307 e100 0 0 2 &i8259 9 2
308 e200 0 0 1 &i8259 a 2 308 e200 0 0 3 &i8259 a 2
309 e300 0 0 1 &i8259 b 2 309 e300 0 0 4 &i8259 b 2
310 310
311 // IDSEL 0x1d Audio 311 // IDSEL 0x1d Audio
312 e800 0 0 1 &i8259 6 2 312 e800 0 0 1 &i8259 6 2
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 233e0d5a8b9d..813c259abbe5 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -334,9 +334,9 @@
334 334
335 // IDSEL 0x1c USB 335 // IDSEL 0x1c USB
336 e000 0 0 1 &i8259 c 2 336 e000 0 0 1 &i8259 c 2
337 e100 0 0 1 &i8259 9 2 337 e100 0 0 2 &i8259 9 2
338 e200 0 0 1 &i8259 a 2 338 e200 0 0 3 &i8259 a 2
339 e300 0 0 1 &i8259 b 2 339 e300 0 0 4 &i8259 b 2
340 340
341 // IDSEL 0x1d Audio 341 // IDSEL 0x1d Audio
342 e800 0 0 1 &i8259 6 2 342 e800 0 0 1 &i8259 6 2
@@ -481,6 +481,7 @@
481 clock-frequency = <1fca055>; 481 clock-frequency = <1fca055>;
482 interrupt-parent = <&mpic>; 482 interrupt-parent = <&mpic>;
483 interrupts = <1b 2>; 483 interrupts = <1b 2>;
484 interrupt-map-mask = <f800 0 0 7>;
484 interrupt-map = < 485 interrupt-map = <
485 /* IDSEL 0x0 */ 486 /* IDSEL 0x0 */
486 0000 0 0 1 &mpic 0 1 487 0000 0 0 1 &mpic 0 1
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 01040a752c82..d98715cbda28 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8610 HPCD Device Tree Source 2 * MPC8610 HPCD Device Tree Source
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor Inc. 4 * Copyright 2007-2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License Version 2 as published 7 * under the terms of the GNU General Public License Version 2 as published
@@ -49,6 +49,7 @@
49 #size-cells = <1>; 49 #size-cells = <1>;
50 #interrupt-cells = <2>; 50 #interrupt-cells = <2>;
51 device_type = "soc"; 51 device_type = "soc";
52 compatible = "fsl,mpc8610-immr", "simple-bus";
52 ranges = <0 e0000000 00100000>; 53 ranges = <0 e0000000 00100000>;
53 reg = <e0000000 1000>; 54 reg = <e0000000 1000>;
54 bus-frequency = <0>; 55 bus-frequency = <0>;
@@ -62,6 +63,13 @@
62 interrupts = <2b 2>; 63 interrupts = <2b 2>;
63 interrupt-parent = <&mpic>; 64 interrupt-parent = <&mpic>;
64 dfsrr; 65 dfsrr;
66
67 cs4270:codec@4f {
68 compatible = "cirrus,cs4270";
69 reg = <4f>;
70 /* MCLK source is a stand-alone oscillator */
71 clock-frequency = <bb8000>;
72 };
65 }; 73 };
66 74
67 i2c@3100 { 75 i2c@3100 {
@@ -111,6 +119,109 @@
111 reg = <e0000 1000>; 119 reg = <e0000 1000>;
112 fsl,has-rstcr; 120 fsl,has-rstcr;
113 }; 121 };
122
123 i2s@16000 {
124 compatible = "fsl,mpc8610-ssi";
125 cell-index = <0>;
126 reg = <16000 100>;
127 interrupt-parent = <&mpic>;
128 interrupts = <3e 2>;
129 fsl,mode = "i2s-slave";
130 codec-handle = <&cs4270>;
131 };
132
133 ssi@16100 {
134 compatible = "fsl,mpc8610-ssi";
135 cell-index = <1>;
136 reg = <16100 100>;
137 interrupt-parent = <&mpic>;
138 interrupts = <3f 2>;
139 };
140
141 dma@21300 {
142 #address-cells = <1>;
143 #size-cells = <1>;
144 compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
145 cell-index = <0>;
146 reg = <21300 4>; /* DMA general status register */
147 ranges = <0 21100 200>;
148
149 dma-channel@0 {
150 compatible = "fsl,mpc8610-dma-channel",
151 "fsl,eloplus-dma-channel";
152 cell-index = <0>;
153 reg = <0 80>;
154 interrupt-parent = <&mpic>;
155 interrupts = <14 2>;
156 };
157 dma-channel@1 {
158 compatible = "fsl,mpc8610-dma-channel",
159 "fsl,eloplus-dma-channel";
160 cell-index = <1>;
161 reg = <80 80>;
162 interrupt-parent = <&mpic>;
163 interrupts = <15 2>;
164 };
165 dma-channel@2 {
166 compatible = "fsl,mpc8610-dma-channel",
167 "fsl,eloplus-dma-channel";
168 cell-index = <2>;
169 reg = <100 80>;
170 interrupt-parent = <&mpic>;
171 interrupts = <16 2>;
172 };
173 dma-channel@3 {
174 compatible = "fsl,mpc8610-dma-channel",
175 "fsl,eloplus-dma-channel";
176 cell-index = <3>;
177 reg = <180 80>;
178 interrupt-parent = <&mpic>;
179 interrupts = <17 2>;
180 };
181 };
182
183 dma@c300 {
184 #address-cells = <1>;
185 #size-cells = <1>;
186 compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
187 cell-index = <1>;
188 reg = <c300 4>; /* DMA general status register */
189 ranges = <0 c100 200>;
190
191 dma-channel@0 {
192 compatible = "fsl,mpc8610-dma-channel",
193 "fsl,mpc8540-dma-channel";
194 cell-index = <0>;
195 reg = <0 80>;
196 interrupt-parent = <&mpic>;
197 interrupts = <3c 2>;
198 };
199 dma-channel@1 {
200 compatible = "fsl,mpc8610-dma-channel",
201 "fsl,mpc8540-dma-channel";
202 cell-index = <1>;
203 reg = <80 80>;
204 interrupt-parent = <&mpic>;
205 interrupts = <3d 2>;
206 };
207 dma-channel@2 {
208 compatible = "fsl,mpc8610-dma-channel",
209 "fsl,mpc8540-dma-channel";
210 cell-index = <2>;
211 reg = <100 80>;
212 interrupt-parent = <&mpic>;
213 interrupts = <3e 2>;
214 };
215 dma-channel@3 {
216 compatible = "fsl,mpc8610-dma-channel",
217 "fsl,mpc8540-dma-channel";
218 cell-index = <3>;
219 reg = <180 80>;
220 interrupt-parent = <&mpic>;
221 interrupts = <3f 2>;
222 };
223 };
224
114 }; 225 };
115 226
116 pci0: pci@e0008000 { 227 pci0: pci@e0008000 {
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 86fc2280c16d..556a9cac0793 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -60,10 +60,52 @@
60 reg = <00000000 40000000>; // 1G at 0x0 60 reg = <00000000 40000000>; // 1G at 0x0
61 }; 61 };
62 62
63 localbus@f8005000 {
64 #address-cells = <2>;
65 #size-cells = <1>;
66 compatible = "fsl,mpc8641-localbus", "simple-bus";
67 reg = <f8005000 1000>;
68 interrupts = <13 2>;
69 interrupt-parent = <&mpic>;
70
71 ranges = <0 0 ff800000 00800000
72 1 0 fe000000 01000000
73 2 0 f8200000 00100000
74 3 0 f8100000 00100000>;
75
76 flash@0,0 {
77 compatible = "cfi-flash";
78 reg = <0 0 00800000>;
79 bank-width = <2>;
80 device-width = <2>;
81 #address-cells = <1>;
82 #size-cells = <1>;
83 partition@0 {
84 label = "kernel";
85 reg = <00000000 00300000>;
86 };
87 partition@300000 {
88 label = "firmware b";
89 reg = <00300000 00100000>;
90 read-only;
91 };
92 partition@400000 {
93 label = "fs";
94 reg = <00400000 00300000>;
95 };
96 partition@700000 {
97 label = "firmware a";
98 reg = <00700000 00100000>;
99 read-only;
100 };
101 };
102 };
103
63 soc8641@f8000000 { 104 soc8641@f8000000 {
64 #address-cells = <1>; 105 #address-cells = <1>;
65 #size-cells = <1>; 106 #size-cells = <1>;
66 device_type = "soc"; 107 device_type = "soc";
108 compatible = "simple-bus";
67 ranges = <00000000 f8000000 00100000>; 109 ranges = <00000000 f8000000 00100000>;
68 reg = <f8000000 00001000>; // CCSRBAR 110 reg = <f8000000 00001000>; // CCSRBAR
69 bus-frequency = <0>; 111 bus-frequency = <0>;
@@ -326,9 +368,9 @@
326 368
327 // IDSEL 0x1c USB 369 // IDSEL 0x1c USB
328 e000 0 0 1 &i8259 c 2 370 e000 0 0 1 &i8259 c 2
329 e100 0 0 1 &i8259 9 2 371 e100 0 0 2 &i8259 9 2
330 e200 0 0 1 &i8259 a 2 372 e200 0 0 3 &i8259 a 2
331 e300 0 0 1 &i8259 b 2 373 e300 0 0 4 &i8259 b 2
332 374
333 // IDSEL 0x1d Audio 375 // IDSEL 0x1d Audio
334 e800 0 0 1 &i8259 6 2 376 e800 0 0 1 &i8259 6 2
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
new file mode 100644
index 000000000000..6aa1d695e644
--- /dev/null
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -0,0 +1,138 @@
1/*
2 * Device Tree Source for IOMEGA StorCenter
3 *
4 * Copyright 2007 Oyvind Repvik
5 * Copyright 2007 Jon Loeliger
6 *
7 * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/ {
15 model = "StorCenter";
16 compatible = "storcenter";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 serial0 = &serial0;
22 serial1 = &serial1;
23 pci0 = &pci0;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,8241@0 {
31 device_type = "cpu";
32 reg = <0>;
33 clock-frequency = <d# 200000000>; /* Hz */
34 timebase-frequency = <d# 25000000>; /* Hz */
35 bus-frequency = <0>; /* from bootwrapper */
36 i-cache-line-size = <d# 32>; /* bytes */
37 d-cache-line-size = <d# 32>; /* bytes */
38 i-cache-size = <4000>;
39 d-cache-size = <4000>;
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <00000000 04000000>; /* 64MB @ 0x0 */
46 };
47
48 soc@fc000000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
52 compatible = "fsl,mpc8241", "mpc10x";
53 store-gathering = <0>; /* 0 == off, !0 == on */
54 ranges = <0 fc000000 100000>;
55 reg = <fc000000 100000>; /* EUMB */
56 bus-frequency = <0>; /* fixed by loader */
57
58 i2c@3000 {
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "fsl-i2c";
62 reg = <3000 100>;
63 interrupts = <5 2>;
64 interrupt-parent = <&mpic>;
65
66 rtc@68 {
67 compatible = "dallas,ds1337";
68 reg = <68>;
69 };
70 };
71
72 serial0: serial@4500 {
73 cell-index = <0>;
74 device_type = "serial";
75 compatible = "ns16550";
76 reg = <4500 20>;
77 clock-frequency = <d# 97553800>; /* Hz */
78 current-speed = <d# 115200>;
79 interrupts = <9 2>;
80 interrupt-parent = <&mpic>;
81 };
82
83 serial1: serial@4600 {
84 cell-index = <1>;
85 device_type = "serial";
86 compatible = "ns16550";
87 reg = <4600 20>;
88 clock-frequency = <d# 97553800>; /* Hz */
89 current-speed = <d# 9600>;
90 interrupts = <a 2>;
91 interrupt-parent = <&mpic>;
92 };
93
94 mpic: interrupt-controller@40000 {
95 #interrupt-cells = <2>;
96 device_type = "open-pic";
97 compatible = "chrp,open-pic";
98 interrupt-controller;
99 reg = <40000 40000>;
100 };
101
102 };
103
104 pci0: pci@fe800000 {
105 #address-cells = <3>;
106 #size-cells = <2>;
107 #interrupt-cells = <1>;
108 device_type = "pci";
109 compatible = "mpc10x-pci";
110 reg = <fe800000 1000>;
111 ranges = <01000000 0 0 fe000000 0 00c00000
112 02000000 0 80000000 80000000 0 70000000>;
113 bus-range = <0 ff>;
114 clock-frequency = <d# 97553800>; /* Hz */
115 interrupt-parent = <&mpic>;
116 interrupt-map-mask = <f800 0 0 7>;
117 interrupt-map = <
118 /* IDSEL 13 - IDE */
119 6800 0 0 1 &mpic 0 1
120 6800 0 0 2 &mpic 0 1
121 6800 0 0 3 &mpic 0 1
122 /* IDSEL 14 - USB */
123 7000 0 0 1 &mpic 0 1
124 7000 0 0 2 &mpic 0 1
125 7000 0 0 3 &mpic 0 1
126 7000 0 0 4 &mpic 0 1
127 /* IDSEL 15 - ETH */
128 7800 0 0 1 &mpic 0 1
129 7800 0 0 2 &mpic 0 1
130 7800 0 0 3 &mpic 0 1
131 7800 0 0 4 &mpic 0 1
132 >;
133 };
134
135 chosen {
136 linux,stdout-path = "/soc/serial@4500";
137 };
138};
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 15:38:01 -0500