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authorScott Wood <scottwood@freescale.com>2007-09-14 15:38:16 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-04 12:02:38 -0400
commit20906ecea2004c0667c8b229ac6461d16ea6bde3 (patch)
treea883f211d08cb666739e865fee173df61929ea64 /arch/powerpc/boot/dts
parent96fca1dea8f32e96668d55727d66416fdd67360b (diff)
[POWERPC] 8xx: mpc885ads cleanup
It now uses the new CPM binding and the generic pin/clock functions, and has assorted fixes and cleanup. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/mpc885ads.dts195
1 files changed, 114 insertions, 81 deletions
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index e9aa9d00da24..cbcd16f74c45 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -2,6 +2,7 @@
2 * MPC885 ADS Device Tree Source 2 * MPC885 ADS Device Tree Source
3 * 3 *
4 * Copyright 2006 MontaVista Software, Inc. 4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc.
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -12,7 +13,7 @@
12 13
13/ { 14/ {
14 model = "MPC885ADS"; 15 model = "MPC885ADS";
15 compatible = "mpc8xx"; 16 compatible = "fsl,mpc885ads";
16 #address-cells = <1>; 17 #address-cells = <1>;
17 #size-cells = <1>; 18 #size-cells = <1>;
18 19
@@ -23,156 +24,188 @@
23 PowerPC,885@0 { 24 PowerPC,885@0 {
24 device_type = "cpu"; 25 device_type = "cpu";
25 reg = <0>; 26 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes 27 d-cache-line-size = <d#16>;
27 i-cache-line-size = <20>; // 32 bytes 28 i-cache-line-size = <d#16>;
28 d-cache-size = <2000>; // L1, 8K 29 d-cache-size = <d#8192>;
29 i-cache-size = <2000>; // L1, 8K 30 i-cache-size = <d#8192>;
30 timebase-frequency = <0>; 31 timebase-frequency = <0>;
31 bus-frequency = <0>; 32 bus-frequency = <0>;
32 clock-frequency = <0>; 33 clock-frequency = <0>;
33 interrupts = <f 2>; // decrementer interrupt 34 interrupts = <f 2>; // decrementer interrupt
34 interrupt-parent = <&Mpc8xx_pic>; 35 interrupt-parent = <&PIC>;
35 }; 36 };
36 }; 37 };
37 38
38 memory { 39 memory {
39 device_type = "memory"; 40 device_type = "memory";
40 reg = <00000000 800000>; 41 reg = <0 0>;
41 }; 42 };
42 43
43 soc885@ff000000 { 44 localbus@ff000100 {
45 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
46 #address-cells = <2>;
47 #size-cells = <1>;
48 reg = <ff000100 40>;
49
50 ranges = <
51 0 0 fe000000 00800000
52 1 0 ff080000 00008000
53 5 0 ff0a0000 00008000
54 >;
55
56 flash@0,0 {
57 compatible = "jedec-flash";
58 reg = <0 0 800000>;
59 bank-width = <4>;
60 device-width = <1>;
61 };
62
63 board-control@1,0 {
64 reg = <1 0 20 5 300 4>;
65 compatible = "fsl,mpc885ads-bcsr";
66 };
67 };
68
69 soc@ff000000 {
70 compatible = "fsl,mpc885", "fsl,pq1-soc";
44 #address-cells = <1>; 71 #address-cells = <1>;
45 #size-cells = <1>; 72 #size-cells = <1>;
46 device_type = "soc"; 73 device_type = "soc";
47 ranges = <0 ff000000 00100000>; 74 ranges = <0 ff000000 00004000>;
48 reg = <ff000000 00000200>;
49 bus-frequency = <0>; 75 bus-frequency = <0>;
50 mdio@e80 { 76
51 device_type = "mdio"; 77 // Temporary -- will go away once kernel uses ranges for get_immrbase().
52 compatible = "fs_enet"; 78 reg = <ff000000 4000>;
53 reg = <e80 8>; 79
80 mdio@e00 {
81 compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
82 reg = <e00 188>;
54 #address-cells = <1>; 83 #address-cells = <1>;
55 #size-cells = <0>; 84 #size-cells = <0>;
56 Phy0: ethernet-phy@0 { 85
86 PHY0: ethernet-phy@0 {
57 reg = <0>; 87 reg = <0>;
58 device_type = "ethernet-phy"; 88 device_type = "ethernet-phy";
59 }; 89 };
60 Phy1: ethernet-phy@1 { 90
91 PHY1: ethernet-phy@1 {
61 reg = <1>; 92 reg = <1>;
62 device_type = "ethernet-phy"; 93 device_type = "ethernet-phy";
63 }; 94 };
64 Phy2: ethernet-phy@2 { 95
96 PHY2: ethernet-phy@2 {
65 reg = <2>; 97 reg = <2>;
66 device_type = "ethernet-phy"; 98 device_type = "ethernet-phy";
67 }; 99 };
68 }; 100 };
69 101
70 fec@e00 { 102 ethernet@e00 {
71 device_type = "network"; 103 device_type = "network";
72 compatible = "fs_enet"; 104 compatible = "fsl,mpc885-fec-enet",
73 model = "FEC"; 105 "fsl,pq1-fec-enet";
74 device-id = <1>;
75 reg = <e00 188>; 106 reg = <e00 188>;
76 mac-address = [ 00 00 0C 00 01 FD ]; 107 local-mac-address = [ 00 00 00 00 00 00 ];
77 interrupts = <3 1>; 108 interrupts = <3 1>;
78 interrupt-parent = <&Mpc8xx_pic>; 109 interrupt-parent = <&PIC>;
79 phy-handle = <&Phy1>; 110 phy-handle = <&PHY0>;
111 linux,network-index = <0>;
80 }; 112 };
81 113
82 fec@1e00 { 114 ethernet@1e00 {
83 device_type = "network"; 115 device_type = "network";
84 compatible = "fs_enet"; 116 compatible = "fsl,mpc885-fec-enet",
85 model = "FEC"; 117 "fsl,pq1-fec-enet";
86 device-id = <2>;
87 reg = <1e00 188>; 118 reg = <1e00 188>;
88 mac-address = [ 00 00 0C 00 02 FD ]; 119 local-mac-address = [ 00 00 00 00 00 00 ];
89 interrupts = <7 1>; 120 interrupts = <7 1>;
90 interrupt-parent = <&Mpc8xx_pic>; 121 interrupt-parent = <&PIC>;
91 phy-handle = <&Phy2>; 122 phy-handle = <&PHY1>;
123 linux,network-index = <1>;
92 }; 124 };
93 125
94 Mpc8xx_pic: pic@ff000000 { 126 PIC: interrupt-controller@0 {
95 interrupt-controller; 127 interrupt-controller;
96 #address-cells = <0>;
97 #interrupt-cells = <2>; 128 #interrupt-cells = <2>;
98 reg = <0 24>; 129 reg = <0 24>;
99 device_type = "mpc8xx-pic"; 130 compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
100 compatible = "CPM";
101 }; 131 };
102 132
103 pcmcia@0080 { 133 pcmcia@80 {
104 #address-cells = <3>; 134 #address-cells = <3>;
105 #interrupt-cells = <1>; 135 #interrupt-cells = <1>;
106 #size-cells = <2>; 136 #size-cells = <2>;
107 compatible = "fsl,pq-pcmcia"; 137 compatible = "fsl,pq-pcmcia";
108 device_type = "pcmcia"; 138 device_type = "pcmcia";
109 reg = <80 80>; 139 reg = <80 80>;
110 interrupt-parent = <&Mpc8xx_pic>; 140 interrupt-parent = <&PIC>;
111 interrupts = <d 1>; 141 interrupts = <d 1>;
112 }; 142 };
113 143
114 cpm@ff000000 { 144 cpm@9c0 {
115 #address-cells = <1>; 145 #address-cells = <1>;
116 #size-cells = <1>; 146 #size-cells = <1>;
117 device_type = "cpm"; 147 compatible = "fsl,mpc885-cpm", "fsl,cpm1";
118 model = "CPM";
119 ranges = <0 0 4000>;
120 reg = <860 f0>;
121 command-proc = <9c0>; 148 command-proc = <9c0>;
122 brg-frequency = <0>; 149 interrupts = <0>; // cpm error interrupt
123 interrupts = <0 2>; // cpm error interrupt 150 interrupt-parent = <&CPM_PIC>;
124 interrupt-parent = <&Cpm_pic>; 151 reg = <9c0 40 2000 1c00>;
152 ranges;
125 153
126 Cpm_pic: pic@930 { 154 brg@9f0 {
155 compatible = "fsl,mpc885-brg",
156 "fsl,cpm1-brg",
157 "fsl,cpm-brg";
158 reg = <9f0 10>;
159 };
160
161 CPM_PIC: interrupt-controller@930 {
127 interrupt-controller; 162 interrupt-controller;
128 #address-cells = <0>; 163 #interrupt-cells = <1>;
129 #interrupt-cells = <2>;
130 interrupts = <5 2 0 2>; 164 interrupts = <5 2 0 2>;
131 interrupt-parent = <&Mpc8xx_pic>; 165 interrupt-parent = <&PIC>;
132 reg = <930 20>; 166 reg = <930 20>;
133 device_type = "cpm-pic"; 167 compatible = "fsl,mpc885-cpm-pic",
134 compatible = "CPM"; 168 "fsl,cpm1-pic";
135 }; 169 };
136 170
137 smc@a80 { 171 serial@a80 {
138 device_type = "serial"; 172 device_type = "serial";
139 compatible = "cpm_uart"; 173 compatible = "fsl,mpc885-smc-uart",
140 model = "SMC"; 174 "fsl,cpm1-smc-uart";
141 device-id = <1>;
142 reg = <a80 10 3e80 40>; 175 reg = <a80 10 3e80 40>;
143 clock-setup = <00ffffff 0>; 176 interrupts = <4>;
144 rx-clock = <1>; 177 interrupt-parent = <&CPM_PIC>;
145 tx-clock = <1>; 178 fsl,cpm-brg = <1>;
146 current-speed = <0>; 179 fsl,cpm-command = <0090>;
147 interrupts = <4 3>;
148 interrupt-parent = <&Cpm_pic>;
149 }; 180 };
150 181
151 smc@a90 { 182 serial@a90 {
152 device_type = "serial"; 183 device_type = "serial";
153 compatible = "cpm_uart"; 184 compatible = "fsl,mpc885-smc-uart",
154 model = "SMC"; 185 "fsl,cpm1-smc-uart";
155 device-id = <2>; 186 reg = <a90 10 3f80 40>;
156 reg = <a90 20 3f80 40>; 187 interrupts = <3>;
157 clock-setup = <ff00ffff 90000>; 188 interrupt-parent = <&CPM_PIC>;
158 rx-clock = <2>; 189 fsl,cpm-brg = <2>;
159 tx-clock = <2>; 190 fsl,cpm-command = <00d0>;
160 current-speed = <0>;
161 interrupts = <3 3>;
162 interrupt-parent = <&Cpm_pic>;
163 }; 191 };
164 192
165 scc@a40 { 193 ethernet@a40 {
166 device_type = "network"; 194 device_type = "network";
167 compatible = "fs_enet"; 195 compatible = "fsl,mpc885-scc-enet",
168 model = "SCC"; 196 "fsl,cpm1-scc-enet";
169 device-id = <3>; 197 reg = <a40 18 3e00 100>;
170 reg = <a40 18 3e00 80>; 198 local-mac-address = [ 00 00 00 00 00 00 ];
171 mac-address = [ 00 00 0C 00 03 FD ]; 199 interrupts = <1c>;
172 interrupts = <1c 3>; 200 interrupt-parent = <&CPM_PIC>;
173 interrupt-parent = <&Cpm_pic>; 201 phy-handle = <&PHY2>;
174 phy-handle = <&Phy2>; 202 fsl,cpm-command = <0080>;
203 linux,network-index = <2>;
175 }; 204 };
176 }; 205 };
177 }; 206 };
207
208 chosen {
209 linux,stdout-path = "/soc/cpm/serial@a80";
210 };
178}; 211};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 18:11:40 -0500