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authorChunhe Lan <Chunhe.Lan@freescale.com>2013-07-30 17:39:26 -0400
committerScott Wood <scottwood@freescale.com>2013-08-23 20:14:21 -0400
commit75898156bcf0f524a00e5140bc644f2dda5a099a (patch)
treea2b96693481cc3782fe51d31ad878ab5f2677e8f /arch/powerpc/boot/dts
parentb9b5350b828276169b3e33d154e9f8bbd4b262a6 (diff)
powerpc/85xx: Add P1023RDB board support
P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts')
-rw-r--r--arch/powerpc/boot/dts/p1023rdb.dts234
1 files changed, 234 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/p1023rdb.dts b/arch/powerpc/boot/dts/p1023rdb.dts
new file mode 100644
index 000000000000..0a06a88ddbd5
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1023rdb.dts
@@ -0,0 +1,234 @@
1/*
2 * P1023 RDB Device Tree Source
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Author: Chunhe Lan <Chunhe.Lan@freescale.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * * Neither the name of Freescale Semiconductor nor the
16 * names of its contributors may be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 *
20 * ALTERNATIVELY, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") as published by the Free Software
22 * Foundation, either version 2 of that License or (at your option) any
23 * later version.
24 *
25 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
26 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
28 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
29 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
31 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 */
36
37/include/ "fsl/p1023si-pre.dtsi"
38
39/ {
40 model = "fsl,P1023";
41 compatible = "fsl,P1023RDB";
42 #address-cells = <2>;
43 #size-cells = <2>;
44 interrupt-parent = <&mpic>;
45
46 memory {
47 device_type = "memory";
48 };
49
50 soc: soc@ff600000 {
51 ranges = <0x0 0x0 0xff600000 0x200000>;
52
53 i2c@3000 {
54 eeprom@53 {
55 compatible = "at24,24c04";
56 reg = <0x53>;
57 };
58
59 rtc@6f {
60 compatible = "microchip,mcp7941x";
61 reg = <0x6f>;
62 };
63 };
64
65 usb@22000 {
66 dr_mode = "host";
67 phy_type = "ulpi";
68 };
69 };
70
71 lbc: localbus@ff605000 {
72 reg = <0 0xff605000 0 0x1000>;
73
74 /* NOR, NAND Flashes */
75 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
76 0x1 0x0 0x0 0xffa00000 0x08000000>;
77
78 nor@0,0 {
79 #address-cells = <1>;
80 #size-cells = <1>;
81 compatible = "cfi-flash";
82 reg = <0x0 0x0 0x04000000>;
83 bank-width = <2>;
84 device-width = <1>;
85
86 partition@0 {
87 /* 48MB for Root File System */
88 reg = <0x00000000 0x03000000>;
89 label = "NOR Root File System";
90 };
91
92 partition@3000000 {
93 /* 1MB for DTB Image */
94 reg = <0x03000000 0x00100000>;
95 label = "NOR DTB Image";
96 };
97
98 partition@3100000 {
99 /* 14MB for Linux Kernel Image */
100 reg = <0x03100000 0x00e00000>;
101 label = "NOR Linux Kernel Image";
102 };
103
104 partition@3f00000 {
105 /* This location must not be altered */
106 /* 512KB for u-boot Bootloader Image */
107 /* 512KB for u-boot Environment Variables */
108 reg = <0x03f00000 0x00100000>;
109 label = "NOR U-Boot Image";
110 read-only;
111 };
112 };
113
114 nand@1,0 {
115 #address-cells = <1>;
116 #size-cells = <1>;
117 compatible = "fsl,elbc-fcm-nand";
118 reg = <0x1 0x0 0x40000>;
119
120 partition@0 {
121 /* This location must not be altered */
122 /* 1MB for u-boot Bootloader Image */
123 reg = <0x0 0x00100000>;
124 label = "NAND U-Boot Image";
125 read-only;
126 };
127
128 partition@100000 {
129 /* 1MB for DTB Image */
130 reg = <0x00100000 0x00100000>;
131 label = "NAND DTB Image";
132 };
133
134 partition@200000 {
135 /* 14MB for Linux Kernel Image */
136 reg = <0x00200000 0x00e00000>;
137 label = "NAND Linux Kernel Image";
138 };
139
140 partition@1000000 {
141 /* 96MB for Root File System Image */
142 reg = <0x01000000 0x06000000>;
143 label = "NAND Root File System";
144 };
145
146 partition@7000000 {
147 /* 16MB for User Writable Area */
148 reg = <0x07000000 0x01000000>;
149 label = "NAND Writable User area";
150 };
151 };
152 };
153
154 pci0: pcie@ff60a000 {
155 reg = <0 0xff60a000 0 0x1000>;
156 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
157 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
158 pcie@0 {
159 /* IRQ[0:3] are pulled up on board, set to active-low */
160 interrupt-map-mask = <0xf800 0 0 7>;
161 interrupt-map = <
162 /* IDSEL 0x0 */
163 0000 0 0 1 &mpic 0 1 0 0
164 0000 0 0 2 &mpic 1 1 0 0
165 0000 0 0 3 &mpic 2 1 0 0
166 0000 0 0 4 &mpic 3 1 0 0
167 >;
168 ranges = <0x2000000 0x0 0xc0000000
169 0x2000000 0x0 0xc0000000
170 0x0 0x20000000
171
172 0x1000000 0x0 0x0
173 0x1000000 0x0 0x0
174 0x0 0x100000>;
175 };
176 };
177
178 board_pci1: pci1: pcie@ff609000 {
179 reg = <0 0xff609000 0 0x1000>;
180 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
181 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
182 pcie@0 {
183 /*
184 * IRQ[4:6] only for PCIe, set to active-high,
185 * IRQ[7] is pulled up on board, set to active-low
186 */
187 interrupt-map-mask = <0xf800 0 0 7>;
188 interrupt-map = <
189 /* IDSEL 0x0 */
190 0000 0 0 1 &mpic 4 2 0 0
191 0000 0 0 2 &mpic 5 2 0 0
192 0000 0 0 3 &mpic 6 2 0 0
193 0000 0 0 4 &mpic 7 1 0 0
194 >;
195 ranges = <0x2000000 0x0 0xa0000000
196 0x2000000 0x0 0xa0000000
197 0x0 0x20000000
198
199 0x1000000 0x0 0x0
200 0x1000000 0x0 0x0
201 0x0 0x100000>;
202 };
203 };
204
205 pci2: pcie@ff60b000 {
206 reg = <0 0xff60b000 0 0x1000>;
207 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
208 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
209 pcie@0 {
210 /*
211 * IRQ[8:10] are pulled up on board, set to active-low
212 * IRQ[11] only for PCIe, set to active-high,
213 */
214 interrupt-map-mask = <0xf800 0 0 7>;
215 interrupt-map = <
216 /* IDSEL 0x0 */
217 0000 0 0 1 &mpic 8 1 0 0
218 0000 0 0 2 &mpic 9 1 0 0
219 0000 0 0 3 &mpic 10 1 0 0
220 0000 0 0 4 &mpic 11 2 0 0
221 >;
222 ranges = <0x2000000 0x0 0x80000000
223 0x2000000 0x0 0x80000000
224 0x0 0x20000000
225
226 0x1000000 0x0 0x0
227 0x1000000 0x0 0x0
228 0x0 0x100000>;
229 };
230 };
231
232};
233
234/include/ "fsl/p1023si-post.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-02 05:04:36 -0500