diff options
| author | Kim Phillips <kim.phillips@freescale.com> | 2011-03-23 09:15:44 -0400 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2011-03-26 22:45:17 -0400 |
| commit | 54e198d4c162b36ba864ecc658c829454074523f (patch) | |
| tree | 8a919e4261ce39b34dffbd8d82eb234b8986f17a /arch/powerpc/boot/dts | |
| parent | 8e8ec596e6c0144e2dd500a57ee23dde9684df46 (diff) | |
crypto: caam - standardize device tree naming convention to utilize '-vX.Y'
Help clarify that the number trailing in compatible nomenclature
is the version number of the device, i.e., change:
"fsl,p4080-sec4.0", "fsl,sec4.0";
to:
"fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Steve Cornelius <sec@pobox.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/powerpc/boot/dts')
| -rw-r--r-- | arch/powerpc/boot/dts/p4080ds.dts | 41 |
1 files changed, 21 insertions, 20 deletions
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts index c78e80155019..0430d241fde8 100644 --- a/arch/powerpc/boot/dts/p4080ds.dts +++ b/arch/powerpc/boot/dts/p4080ds.dts | |||
| @@ -423,7 +423,7 @@ | |||
| 423 | }; | 423 | }; |
| 424 | 424 | ||
| 425 | crypto: crypto@300000 { | 425 | crypto: crypto@300000 { |
| 426 | compatible = "fsl,p4080-sec4.0", "fsl,sec4.0"; | 426 | compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; |
| 427 | #address-cells = <1>; | 427 | #address-cells = <1>; |
| 428 | #size-cells = <1>; | 428 | #size-cells = <1>; |
| 429 | reg = <0x300000 0x10000>; | 429 | reg = <0x300000 0x10000>; |
| @@ -432,73 +432,74 @@ | |||
| 432 | interrupts = <92 2>; | 432 | interrupts = <92 2>; |
| 433 | 433 | ||
| 434 | sec_jr0: jr@1000 { | 434 | sec_jr0: jr@1000 { |
| 435 | compatible = "fsl,p4080-sec4.0-job-ring", | 435 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
| 436 | "fsl,sec4.0-job-ring"; | 436 | "fsl,sec-v4.0-job-ring"; |
| 437 | reg = <0x1000 0x1000>; | 437 | reg = <0x1000 0x1000>; |
| 438 | interrupt-parent = <&mpic>; | 438 | interrupt-parent = <&mpic>; |
| 439 | interrupts = <88 2>; | 439 | interrupts = <88 2>; |
| 440 | }; | 440 | }; |
| 441 | 441 | ||
| 442 | sec_jr1: jr@2000 { | 442 | sec_jr1: jr@2000 { |
| 443 | compatible = "fsl,p4080-sec4.0-job-ring", | 443 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
| 444 | "fsl,sec4.0-job-ring"; | 444 | "fsl,sec-v4.0-job-ring"; |
| 445 | reg = <0x2000 0x1000>; | 445 | reg = <0x2000 0x1000>; |
| 446 | interrupt-parent = <&mpic>; | 446 | interrupt-parent = <&mpic>; |
| 447 | interrupts = <89 2>; | 447 | interrupts = <89 2>; |
| 448 | }; | 448 | }; |
| 449 | 449 | ||
| 450 | sec_jr2: jr@3000 { | 450 | sec_jr2: jr@3000 { |
| 451 | compatible = "fsl,p4080-sec4.0-job-ring", | 451 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
| 452 | "fsl,sec4.0-job-ring"; | 452 | "fsl,sec-v4.0-job-ring"; |
| 453 | reg = <0x3000 0x1000>; | 453 | reg = <0x3000 0x1000>; |
| 454 | interrupt-parent = <&mpic>; | 454 | interrupt-parent = <&mpic>; |
| 455 | interrupts = <90 2>; | 455 | interrupts = <90 2>; |
| 456 | }; | 456 | }; |
| 457 | 457 | ||
| 458 | sec_jr3: jr@4000 { | 458 | sec_jr3: jr@4000 { |
| 459 | compatible = "fsl,p4080-sec4.0-job-ring", | 459 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
| 460 | "fsl,sec4.0-job-ring"; | 460 | "fsl,sec-v4.0-job-ring"; |
| 461 | reg = <0x4000 0x1000>; | 461 | reg = <0x4000 0x1000>; |
| 462 | interrupt-parent = <&mpic>; | 462 | interrupt-parent = <&mpic>; |
| 463 | interrupts = <91 2>; | 463 | interrupts = <91 2>; |
| 464 | }; | 464 | }; |
| 465 | 465 | ||
| 466 | rtic@6000 { | 466 | rtic@6000 { |
| 467 | compatible = "fsl,p4080-sec4.0-rtic", | 467 | compatible = "fsl,p4080-sec-v4.0-rtic", |
| 468 | "fsl,sec4.0-rtic"; | 468 | "fsl,sec-v4.0-rtic"; |
| 469 | #address-cells = <1>; | 469 | #address-cells = <1>; |
| 470 | #size-cells = <1>; | 470 | #size-cells = <1>; |
| 471 | reg = <0x6000 0x100>; | 471 | reg = <0x6000 0x100>; |
| 472 | ranges = <0x0 0x6100 0xe00>; | 472 | ranges = <0x0 0x6100 0xe00>; |
| 473 | 473 | ||
| 474 | rtic_a: rtic-a@0 { | 474 | rtic_a: rtic-a@0 { |
| 475 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 475 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
| 476 | "fsl,sec4.0-rtic-memory"; | 476 | "fsl,sec-v4.0-rtic-memory"; |
| 477 | reg = <0x00 0x20 0x100 0x80>; | 477 | reg = <0x00 0x20 0x100 0x80>; |
| 478 | }; | 478 | }; |
| 479 | 479 | ||
| 480 | rtic_b: rtic-b@20 { | 480 | rtic_b: rtic-b@20 { |
| 481 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 481 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
| 482 | "fsl,sec4.0-rtic-memory"; | 482 | "fsl,sec-v4.0-rtic-memory"; |
| 483 | reg = <0x20 0x20 0x200 0x80>; | 483 | reg = <0x20 0x20 0x200 0x80>; |
| 484 | }; | 484 | }; |
| 485 | 485 | ||
| 486 | rtic_c: rtic-c@40 { | 486 | rtic_c: rtic-c@40 { |
| 487 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 487 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
| 488 | "fsl,sec4.0-rtic-memory"; | 488 | "fsl,sec-v4.0-rtic-memory"; |
| 489 | reg = <0x40 0x20 0x300 0x80>; | 489 | reg = <0x40 0x20 0x300 0x80>; |
| 490 | }; | 490 | }; |
| 491 | 491 | ||
| 492 | rtic_d: rtic-d@60 { | 492 | rtic_d: rtic-d@60 { |
| 493 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 493 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
| 494 | "fsl,sec4.0-rtic-memory"; | 494 | "fsl,sec-v4.0-rtic-memory"; |
| 495 | reg = <0x60 0x20 0x500 0x80>; | 495 | reg = <0x60 0x20 0x500 0x80>; |
| 496 | }; | 496 | }; |
| 497 | }; | 497 | }; |
| 498 | }; | 498 | }; |
| 499 | 499 | ||
| 500 | sec_mon: sec_mon@314000 { | 500 | sec_mon: sec_mon@314000 { |
| 501 | compatible = "fsl,p4080-sec4.0-mon", "fsl,sec4.0-mon"; | 501 | compatible = "fsl,p4080-sec-v4.0-mon", |
| 502 | "fsl,sec-v4.0-mon"; | ||
| 502 | reg = <0x314000 0x1000>; | 503 | reg = <0x314000 0x1000>; |
| 503 | interrupt-parent = <&mpic>; | 504 | interrupt-parent = <&mpic>; |
| 504 | interrupts = <93 2>; | 505 | interrupts = <93 2>; |