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authorDavid Gibson <david@gibson.dropbear.id.au>2008-05-15 02:46:39 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-05-29 08:06:56 -0400
commit71f349799b34c8b6ce3df42126b4de6cfa16456d (patch)
tree995a9385920e7be80ea9a872442caf1d475c935a /arch/powerpc/boot/dts/yosemite.dts
parentb786af117b360843349cf66165c4efa0217ca2a7 (diff)
[POWERPC] Convert remaining dts-v0 files to v1
At the moment we have a mixture of left-over version 0 and new-format version 1 files in arch/powerpc/boot/dts. This is potentially confusing to people new to the dts format attempting to figure it out. So, this patch converts all the as-yet unconverted dts v0 files and converts them to v1. They're mechanically-converted, and not hand tweaked so in some cases they're not 100% in keeping with usual v1 style, but the convertor program does have some heuristics so the discrepancies aren't too bad. I have checked that this patch produces no changes to the resulting dtb binaries. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dts/yosemite.dts')
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts146
1 files changed, 74 insertions, 72 deletions
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index 0d6d332814e0..e39422aa0d85 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -9,12 +9,14 @@
9 * any warranty of any kind, whether express or implied. 9 * any warranty of any kind, whether express or implied.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 #address-cells = <2>; 15 #address-cells = <2>;
14 #size-cells = <1>; 16 #size-cells = <1>;
15 model = "amcc,yosemite"; 17 model = "amcc,yosemite";
16 compatible = "amcc,yosemite","amcc,bamboo"; 18 compatible = "amcc,yosemite","amcc,bamboo";
17 dcr-parent = <&/cpus/cpu@0>; 19 dcr-parent = <&{/cpus/cpu@0}>;
18 20
19 aliases { 21 aliases {
20 ethernet0 = &EMAC0; 22 ethernet0 = &EMAC0;
@@ -32,13 +34,13 @@
32 cpu@0 { 34 cpu@0 {
33 device_type = "cpu"; 35 device_type = "cpu";
34 model = "PowerPC,440EP"; 36 model = "PowerPC,440EP";
35 reg = <0>; 37 reg = <0x00000000>;
36 clock-frequency = <0>; /* Filled in by zImage */ 38 clock-frequency = <0>; /* Filled in by zImage */
37 timebase-frequency = <0>; /* Filled in by zImage */ 39 timebase-frequency = <0>; /* Filled in by zImage */
38 i-cache-line-size = <20>; 40 i-cache-line-size = <32>;
39 d-cache-line-size = <20>; 41 d-cache-line-size = <32>;
40 i-cache-size = <8000>; 42 i-cache-size = <32768>;
41 d-cache-size = <8000>; 43 d-cache-size = <32768>;
42 dcr-controller; 44 dcr-controller;
43 dcr-access-method = "native"; 45 dcr-access-method = "native";
44 }; 46 };
@@ -46,14 +48,14 @@
46 48
47 memory { 49 memory {
48 device_type = "memory"; 50 device_type = "memory";
49 reg = <0 0 0>; /* Filled in by zImage */ 51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
50 }; 52 };
51 53
52 UIC0: interrupt-controller0 { 54 UIC0: interrupt-controller0 {
53 compatible = "ibm,uic-440ep","ibm,uic"; 55 compatible = "ibm,uic-440ep","ibm,uic";
54 interrupt-controller; 56 interrupt-controller;
55 cell-index = <0>; 57 cell-index = <0>;
56 dcr-reg = <0c0 009>; 58 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>; 59 #address-cells = <0>;
58 #size-cells = <0>; 60 #size-cells = <0>;
59 #interrupt-cells = <2>; 61 #interrupt-cells = <2>;
@@ -63,22 +65,22 @@
63 compatible = "ibm,uic-440ep","ibm,uic"; 65 compatible = "ibm,uic-440ep","ibm,uic";
64 interrupt-controller; 66 interrupt-controller;
65 cell-index = <1>; 67 cell-index = <1>;
66 dcr-reg = <0d0 009>; 68 dcr-reg = <0x0d0 0x009>;
67 #address-cells = <0>; 69 #address-cells = <0>;
68 #size-cells = <0>; 70 #size-cells = <0>;
69 #interrupt-cells = <2>; 71 #interrupt-cells = <2>;
70 interrupts = <1e 4 1f 4>; /* cascade */ 72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
71 interrupt-parent = <&UIC0>; 73 interrupt-parent = <&UIC0>;
72 }; 74 };
73 75
74 SDR0: sdr { 76 SDR0: sdr {
75 compatible = "ibm,sdr-440ep"; 77 compatible = "ibm,sdr-440ep";
76 dcr-reg = <00e 002>; 78 dcr-reg = <0x00e 0x002>;
77 }; 79 };
78 80
79 CPR0: cpr { 81 CPR0: cpr {
80 compatible = "ibm,cpr-440ep"; 82 compatible = "ibm,cpr-440ep";
81 dcr-reg = <00c 002>; 83 dcr-reg = <0x00c 0x002>;
82 }; 84 };
83 85
84 plb { 86 plb {
@@ -90,29 +92,29 @@
90 92
91 SDRAM0: sdram { 93 SDRAM0: sdram {
92 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 94 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
93 dcr-reg = <010 2>; 95 dcr-reg = <0x010 0x002>;
94 }; 96 };
95 97
96 DMA0: dma { 98 DMA0: dma {
97 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 99 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
98 dcr-reg = <100 027>; 100 dcr-reg = <0x100 0x027>;
99 }; 101 };
100 102
101 MAL0: mcmal { 103 MAL0: mcmal {
102 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 104 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
103 dcr-reg = <180 62>; 105 dcr-reg = <0x180 0x062>;
104 num-tx-chans = <4>; 106 num-tx-chans = <4>;
105 num-rx-chans = <2>; 107 num-rx-chans = <2>;
106 interrupt-parent = <&MAL0>; 108 interrupt-parent = <&MAL0>;
107 interrupts = <0 1 2 3 4>; 109 interrupts = <0x0 0x1 0x2 0x3 0x4>;
108 #interrupt-cells = <1>; 110 #interrupt-cells = <1>;
109 #address-cells = <0>; 111 #address-cells = <0>;
110 #size-cells = <0>; 112 #size-cells = <0>;
111 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 113 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
112 /*RXEOB*/ 1 &UIC0 b 4 114 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
113 /*SERR*/ 2 &UIC1 0 4 115 /*SERR*/ 0x2 &UIC1 0x0 0x4
114 /*TXDE*/ 3 &UIC1 1 4 116 /*TXDE*/ 0x3 &UIC1 0x1 0x4
115 /*RXDE*/ 4 &UIC1 2 4>; 117 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
116 }; 118 };
117 119
118 POB0: opb { 120 POB0: opb {
@@ -122,110 +124,110 @@
122 /* Bamboo is oddball in the 44x world and doesn't use the ERPN 124 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
123 * bits. 125 * bits.
124 */ 126 */
125 ranges = <00000000 0 00000000 80000000 127 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
126 80000000 0 80000000 80000000>; 128 0x80000000 0x00000000 0x80000000 0x80000000>;
127 interrupt-parent = <&UIC1>; 129 interrupt-parent = <&UIC1>;
128 interrupts = <7 4>; 130 interrupts = <0x7 0x4>;
129 clock-frequency = <0>; /* Filled in by zImage */ 131 clock-frequency = <0>; /* Filled in by zImage */
130 132
131 EBC0: ebc { 133 EBC0: ebc {
132 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 134 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
133 dcr-reg = <012 2>; 135 dcr-reg = <0x012 0x002>;
134 #address-cells = <2>; 136 #address-cells = <2>;
135 #size-cells = <1>; 137 #size-cells = <1>;
136 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
137 interrupts = <5 1>; 139 interrupts = <0x5 0x1>;
138 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
139 }; 141 };
140 142
141 UART0: serial@ef600300 { 143 UART0: serial@ef600300 {
142 device_type = "serial"; 144 device_type = "serial";
143 compatible = "ns16550"; 145 compatible = "ns16550";
144 reg = <ef600300 8>; 146 reg = <0xef600300 0x00000008>;
145 virtual-reg = <ef600300>; 147 virtual-reg = <0xef600300>;
146 clock-frequency = <0>; /* Filled in by zImage */ 148 clock-frequency = <0>; /* Filled in by zImage */
147 current-speed = <1c200>; 149 current-speed = <115200>;
148 interrupt-parent = <&UIC0>; 150 interrupt-parent = <&UIC0>;
149 interrupts = <0 4>; 151 interrupts = <0x0 0x4>;
150 }; 152 };
151 153
152 UART1: serial@ef600400 { 154 UART1: serial@ef600400 {
153 device_type = "serial"; 155 device_type = "serial";
154 compatible = "ns16550"; 156 compatible = "ns16550";
155 reg = <ef600400 8>; 157 reg = <0xef600400 0x00000008>;
156 virtual-reg = <ef600400>; 158 virtual-reg = <0xef600400>;
157 clock-frequency = <0>; 159 clock-frequency = <0>;
158 current-speed = <0>; 160 current-speed = <0>;
159 interrupt-parent = <&UIC0>; 161 interrupt-parent = <&UIC0>;
160 interrupts = <1 4>; 162 interrupts = <0x1 0x4>;
161 }; 163 };
162 164
163 UART2: serial@ef600500 { 165 UART2: serial@ef600500 {
164 device_type = "serial"; 166 device_type = "serial";
165 compatible = "ns16550"; 167 compatible = "ns16550";
166 reg = <ef600500 8>; 168 reg = <0xef600500 0x00000008>;
167 virtual-reg = <ef600500>; 169 virtual-reg = <0xef600500>;
168 clock-frequency = <0>; 170 clock-frequency = <0>;
169 current-speed = <0>; 171 current-speed = <0>;
170 interrupt-parent = <&UIC0>; 172 interrupt-parent = <&UIC0>;
171 interrupts = <3 4>; 173 interrupts = <0x3 0x4>;
172 status = "disabled"; 174 status = "disabled";
173 }; 175 };
174 176
175 UART3: serial@ef600600 { 177 UART3: serial@ef600600 {
176 device_type = "serial"; 178 device_type = "serial";
177 compatible = "ns16550"; 179 compatible = "ns16550";
178 reg = <ef600600 8>; 180 reg = <0xef600600 0x00000008>;
179 virtual-reg = <ef600600>; 181 virtual-reg = <0xef600600>;
180 clock-frequency = <0>; 182 clock-frequency = <0>;
181 current-speed = <0>; 183 current-speed = <0>;
182 interrupt-parent = <&UIC0>; 184 interrupt-parent = <&UIC0>;
183 interrupts = <4 4>; 185 interrupts = <0x4 0x4>;
184 status = "disabled"; 186 status = "disabled";
185 }; 187 };
186 188
187 IIC0: i2c@ef600700 { 189 IIC0: i2c@ef600700 {
188 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 190 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
189 reg = <ef600700 14>; 191 reg = <0xef600700 0x00000014>;
190 interrupt-parent = <&UIC0>; 192 interrupt-parent = <&UIC0>;
191 interrupts = <2 4>; 193 interrupts = <0x2 0x4>;
192 }; 194 };
193 195
194 IIC1: i2c@ef600800 { 196 IIC1: i2c@ef600800 {
195 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 197 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
196 reg = <ef600800 14>; 198 reg = <0xef600800 0x00000014>;
197 interrupt-parent = <&UIC0>; 199 interrupt-parent = <&UIC0>;
198 interrupts = <7 4>; 200 interrupts = <0x7 0x4>;
199 }; 201 };
200 202
201 spi@ef600900 { 203 spi@ef600900 {
202 compatible = "amcc,spi-440ep"; 204 compatible = "amcc,spi-440ep";
203 reg = <ef600900 6>; 205 reg = <0xef600900 0x00000006>;
204 interrupts = <8 4>; 206 interrupts = <0x8 0x4>;
205 interrupt-parent = <&UIC0>; 207 interrupt-parent = <&UIC0>;
206 }; 208 };
207 209
208 ZMII0: emac-zmii@ef600d00 { 210 ZMII0: emac-zmii@ef600d00 {
209 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 211 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
210 reg = <ef600d00 c>; 212 reg = <0xef600d00 0x0000000c>;
211 }; 213 };
212 214
213 EMAC0: ethernet@ef600e00 { 215 EMAC0: ethernet@ef600e00 {
214 device_type = "network"; 216 device_type = "network";
215 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 217 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
216 interrupt-parent = <&UIC1>; 218 interrupt-parent = <&UIC1>;
217 interrupts = <1c 4 1d 4>; 219 interrupts = <0x1c 0x4 0x1d 0x4>;
218 reg = <ef600e00 70>; 220 reg = <0xef600e00 0x00000070>;
219 local-mac-address = [000000000000]; 221 local-mac-address = [000000000000];
220 mal-device = <&MAL0>; 222 mal-device = <&MAL0>;
221 mal-tx-channel = <0 1>; 223 mal-tx-channel = <0 1>;
222 mal-rx-channel = <0>; 224 mal-rx-channel = <0>;
223 cell-index = <0>; 225 cell-index = <0>;
224 max-frame-size = <5dc>; 226 max-frame-size = <1500>;
225 rx-fifo-size = <1000>; 227 rx-fifo-size = <4096>;
226 tx-fifo-size = <800>; 228 tx-fifo-size = <2048>;
227 phy-mode = "rmii"; 229 phy-mode = "rmii";
228 phy-map = <00000000>; 230 phy-map = <0x00000000>;
229 zmii-device = <&ZMII0>; 231 zmii-device = <&ZMII0>;
230 zmii-channel = <0>; 232 zmii-channel = <0>;
231 }; 233 };
@@ -234,26 +236,26 @@
234 device_type = "network"; 236 device_type = "network";
235 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 237 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
236 interrupt-parent = <&UIC1>; 238 interrupt-parent = <&UIC1>;
237 interrupts = <1e 4 1f 4>; 239 interrupts = <0x1e 0x4 0x1f 0x4>;
238 reg = <ef600f00 70>; 240 reg = <0xef600f00 0x00000070>;
239 local-mac-address = [000000000000]; 241 local-mac-address = [000000000000];
240 mal-device = <&MAL0>; 242 mal-device = <&MAL0>;
241 mal-tx-channel = <2 3>; 243 mal-tx-channel = <2 3>;
242 mal-rx-channel = <1>; 244 mal-rx-channel = <1>;
243 cell-index = <1>; 245 cell-index = <1>;
244 max-frame-size = <5dc>; 246 max-frame-size = <1500>;
245 rx-fifo-size = <1000>; 247 rx-fifo-size = <4096>;
246 tx-fifo-size = <800>; 248 tx-fifo-size = <2048>;
247 phy-mode = "rmii"; 249 phy-mode = "rmii";
248 phy-map = <00000000>; 250 phy-map = <0x00000000>;
249 zmii-device = <&ZMII0>; 251 zmii-device = <&ZMII0>;
250 zmii-channel = <1>; 252 zmii-channel = <1>;
251 }; 253 };
252 254
253 usb@ef601000 { 255 usb@ef601000 {
254 compatible = "ohci-be"; 256 compatible = "ohci-be";
255 reg = <ef601000 80>; 257 reg = <0xef601000 0x00000080>;
256 interrupts = <8 4 9 4>; 258 interrupts = <0x8 0x4 0x9 0x4>;
257 interrupt-parent = < &UIC1 >; 259 interrupt-parent = < &UIC1 >;
258 }; 260 };
259 }; 261 };
@@ -265,35 +267,35 @@
265 #address-cells = <3>; 267 #address-cells = <3>;
266 compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 268 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
267 primary; 269 primary;
268 reg = <0 eec00000 8 /* Config space access */ 270 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
269 0 eed00000 4 /* IACK */ 271 0x00000000 0xeed00000 0x00000004 /* IACK */
270 0 eed00000 4 /* Special cycle */ 272 0x00000000 0xeed00000 0x00000004 /* Special cycle */
271 0 ef400000 40>; /* Internal registers */ 273 0x00000000 0xef400000 0x00000040>; /* Internal registers */
272 274
273 /* Outbound ranges, one memory and one IO, 275 /* Outbound ranges, one memory and one IO,
274 * later cannot be changed. Chip supports a second 276 * later cannot be changed. Chip supports a second
275 * IO range but we don't use it for now 277 * IO range but we don't use it for now
276 */ 278 */
277 ranges = <02000000 0 a0000000 0 a0000000 0 20000000 279 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
278 01000000 0 00000000 0 e8000000 0 00010000>; 280 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
279 281
280 /* Inbound 2GB range starting at 0 */ 282 /* Inbound 2GB range starting at 0 */
281 dma-ranges = <42000000 0 0 0 0 0 80000000>; 283 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
282 284
283 /* Bamboo has all 4 IRQ pins tied together per slot */ 285 /* Bamboo has all 4 IRQ pins tied together per slot */
284 interrupt-map-mask = <f800 0 0 0>; 286 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
285 interrupt-map = < 287 interrupt-map = <
286 /* IDSEL 1 */ 288 /* IDSEL 1 */
287 0800 0 0 0 &UIC0 1c 8 289 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
288 290
289 /* IDSEL 2 */ 291 /* IDSEL 2 */
290 1000 0 0 0 &UIC0 1b 8 292 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
291 293
292 /* IDSEL 3 */ 294 /* IDSEL 3 */
293 1800 0 0 0 &UIC0 1a 8 295 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
294 296
295 /* IDSEL 4 */ 297 /* IDSEL 4 */
296 2000 0 0 0 &UIC0 19 8 298 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
297 >; 299 >;
298 }; 300 };
299 }; 301 };