diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-05-30 14:43:43 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-06-02 15:44:25 -0400 |
commit | c054065bc10a7ee2bcf78b5bc95f4b4d9bdc923a (patch) | |
tree | 023b60c1b55c04c2db08983a3aaef151d081fcac /arch/powerpc/boot/dts/sbc8548.dts | |
parent | acd4b715ec83e451990bb82bdbf28ecaeab1b67d (diff) |
[POWERPC] 85xx: Add next-level-cache property
Added next-level-cache to the L1 and a reference to the new L2 label.
This is per the ePAPR 0.94 spec. Since we are't really dependent on this
today we aren't supporting the "legacy" l2-cache phandle that is specified
in the PPC v2.1 OF Binding spec.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/sbc8548.dts')
-rw-r--r-- | arch/powerpc/boot/dts/sbc8548.dts | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index ce496fb27894..d252e38283e7 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts | |||
@@ -44,6 +44,7 @@ | |||
44 | timebase-frequency = <0>; // From uboot | 44 | timebase-frequency = <0>; // From uboot |
45 | bus-frequency = <0>; | 45 | bus-frequency = <0>; |
46 | clock-frequency = <0>; | 46 | clock-frequency = <0>; |
47 | next-level-cache = <&L2>; | ||
47 | }; | 48 | }; |
48 | }; | 49 | }; |
49 | 50 | ||
@@ -161,7 +162,7 @@ | |||
161 | interrupts = <0x12 0x2>; | 162 | interrupts = <0x12 0x2>; |
162 | }; | 163 | }; |
163 | 164 | ||
164 | l2-cache-controller@20000 { | 165 | L2: l2-cache-controller@20000 { |
165 | compatible = "fsl,8548-l2-cache-controller"; | 166 | compatible = "fsl,8548-l2-cache-controller"; |
166 | reg = <0x20000 0x1000>; | 167 | reg = <0x20000 0x1000>; |
167 | cache-line-size = <0x20>; // 32 bytes | 168 | cache-line-size = <0x20>; // 32 bytes |