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authorPaul Gortmaker <paul.gortmaker@windriver.com>2008-01-28 16:09:36 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-01-28 17:16:38 -0500
commitcda13dd164f91df79ba797ab84848352b03de115 (patch)
treef366a541f2358c4b74b3e4c8b7ec04994c23d3e8 /arch/powerpc/boot/dts/sbc8349.dts
parenta6f71745969d495d697d1ccd96385d2f7a963375 (diff)
[POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
This patch converts the remaining 83xx boards to the dts-v1 format. This includes the mpc8313_rdb, mpc832x_mds, mpc8323_rdb, mpc8349emitx, mpc8349emitxgp and the mpc836x_mds. The mpc8315_rdb mpc834x_mds, mpc837[789]_*, and sbc8349 were already dts-v1 and only undergo minor changes for the sake of formatting consistency across the whole group of boards; i.e. the idea being that you can do a "diff -u board_A.dts board_B.dts" and see something meaningful. The general rule I've applied is that entries for values normally parsed by humans are left in decimal (i.e. IRQ, cache size, clock rates, basic counts and indexes) and all other data (i.e. reg and ranges, IRQ flags etc.) remain in hex. I've used dtc to confirm that the output prior to this changeset matches the output after this changeset is applied for all boards. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/sbc8349.dts')
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts44
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 0934f54b2b43..3839d4b7d6a7 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -35,11 +35,11 @@
35 35
36 PowerPC,8349@0 { 36 PowerPC,8349@0 {
37 device_type = "cpu"; 37 device_type = "cpu";
38 reg = <0>; 38 reg = <0x0>;
39 d-cache-line-size = <0x20>; // 32 bytes 39 d-cache-line-size = <32>;
40 i-cache-line-size = <0x20>; // 32 bytes 40 i-cache-line-size = <32>;
41 d-cache-size = <0x8000>; // L1, 32K 41 d-cache-size = <32768>;
42 i-cache-size = <0x8000>; // L1, 32K 42 i-cache-size = <32768>;
43 timebase-frequency = <0>; // from bootloader 43 timebase-frequency = <0>; // from bootloader
44 bus-frequency = <0>; // from bootloader 44 bus-frequency = <0>; // from bootloader
45 clock-frequency = <0>; // from bootloader 45 clock-frequency = <0>; // from bootloader
@@ -70,7 +70,7 @@
70 cell-index = <0>; 70 cell-index = <0>;
71 compatible = "fsl-i2c"; 71 compatible = "fsl-i2c";
72 reg = <0x3000 0x100>; 72 reg = <0x3000 0x100>;
73 interrupts = <0xe 0x8>; 73 interrupts = <14 0x8>;
74 interrupt-parent = <&ipic>; 74 interrupt-parent = <&ipic>;
75 dfsrr; 75 dfsrr;
76 }; 76 };
@@ -81,7 +81,7 @@
81 cell-index = <1>; 81 cell-index = <1>;
82 compatible = "fsl-i2c"; 82 compatible = "fsl-i2c";
83 reg = <0x3100 0x100>; 83 reg = <0x3100 0x100>;
84 interrupts = <0xf 0x8>; 84 interrupts = <15 0x8>;
85 interrupt-parent = <&ipic>; 85 interrupt-parent = <&ipic>;
86 dfsrr; 86 dfsrr;
87 }; 87 };
@@ -90,7 +90,7 @@
90 cell-index = <0>; 90 cell-index = <0>;
91 compatible = "fsl,spi"; 91 compatible = "fsl,spi";
92 reg = <0x7000 0x1000>; 92 reg = <0x7000 0x1000>;
93 interrupts = <0x10 0x8>; 93 interrupts = <16 0x8>;
94 interrupt-parent = <&ipic>; 94 interrupt-parent = <&ipic>;
95 mode = "cpu"; 95 mode = "cpu";
96 }; 96 };
@@ -103,7 +103,7 @@
103 #address-cells = <1>; 103 #address-cells = <1>;
104 #size-cells = <0>; 104 #size-cells = <0>;
105 interrupt-parent = <&ipic>; 105 interrupt-parent = <&ipic>;
106 interrupts = <0x27 0x8>; 106 interrupts = <39 0x8>;
107 phy_type = "ulpi"; 107 phy_type = "ulpi";
108 port1; 108 port1;
109 }; 109 };
@@ -115,7 +115,7 @@
115 #address-cells = <1>; 115 #address-cells = <1>;
116 #size-cells = <0>; 116 #size-cells = <0>;
117 interrupt-parent = <&ipic>; 117 interrupt-parent = <&ipic>;
118 interrupts = <0x26 0x8>; 118 interrupts = <38 0x8>;
119 dr_mode = "otg"; 119 dr_mode = "otg";
120 phy_type = "ulpi"; 120 phy_type = "ulpi";
121 }; 121 };
@@ -128,13 +128,13 @@
128 128
129 phy0: ethernet-phy@19 { 129 phy0: ethernet-phy@19 {
130 interrupt-parent = <&ipic>; 130 interrupt-parent = <&ipic>;
131 interrupts = <0x14 0x8>; 131 interrupts = <20 0x8>;
132 reg = <0x19>; 132 reg = <0x19>;
133 device_type = "ethernet-phy"; 133 device_type = "ethernet-phy";
134 }; 134 };
135 phy1: ethernet-phy@1a { 135 phy1: ethernet-phy@1a {
136 interrupt-parent = <&ipic>; 136 interrupt-parent = <&ipic>;
137 interrupts = <0x15 0x8>; 137 interrupts = <21 0x8>;
138 reg = <0x1a>; 138 reg = <0x1a>;
139 device_type = "ethernet-phy"; 139 device_type = "ethernet-phy";
140 }; 140 };
@@ -147,7 +147,7 @@
147 compatible = "gianfar"; 147 compatible = "gianfar";
148 reg = <0x24000 0x1000>; 148 reg = <0x24000 0x1000>;
149 local-mac-address = [ 00 00 00 00 00 00 ]; 149 local-mac-address = [ 00 00 00 00 00 00 ];
150 interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>; 150 interrupts = <32 0x8 33 0x8 34 0x8>;
151 interrupt-parent = <&ipic>; 151 interrupt-parent = <&ipic>;
152 phy-handle = <&phy0>; 152 phy-handle = <&phy0>;
153 linux,network-index = <0>; 153 linux,network-index = <0>;
@@ -160,7 +160,7 @@
160 compatible = "gianfar"; 160 compatible = "gianfar";
161 reg = <0x25000 0x1000>; 161 reg = <0x25000 0x1000>;
162 local-mac-address = [ 00 00 00 00 00 00 ]; 162 local-mac-address = [ 00 00 00 00 00 00 ];
163 interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>; 163 interrupts = <35 0x8 36 0x8 37 0x8>;
164 interrupt-parent = <&ipic>; 164 interrupt-parent = <&ipic>;
165 phy-handle = <&phy1>; 165 phy-handle = <&phy1>;
166 linux,network-index = <1>; 166 linux,network-index = <1>;
@@ -172,7 +172,7 @@
172 compatible = "ns16550"; 172 compatible = "ns16550";
173 reg = <0x4500 0x100>; 173 reg = <0x4500 0x100>;
174 clock-frequency = <0>; 174 clock-frequency = <0>;
175 interrupts = <0x9 0x8>; 175 interrupts = <9 0x8>;
176 interrupt-parent = <&ipic>; 176 interrupt-parent = <&ipic>;
177 }; 177 };
178 178
@@ -182,7 +182,7 @@
182 compatible = "ns16550"; 182 compatible = "ns16550";
183 reg = <0x4600 0x100>; 183 reg = <0x4600 0x100>;
184 clock-frequency = <0>; 184 clock-frequency = <0>;
185 interrupts = <0xa 0x8>; 185 interrupts = <10 0x8>;
186 interrupt-parent = <&ipic>; 186 interrupt-parent = <&ipic>;
187 }; 187 };
188 188
@@ -191,10 +191,10 @@
191 model = "SEC2"; 191 model = "SEC2";
192 compatible = "talitos"; 192 compatible = "talitos";
193 reg = <0x30000 0x10000>; 193 reg = <0x30000 0x10000>;
194 interrupts = <0xb 0x8>; 194 interrupts = <11 0x8>;
195 interrupt-parent = <&ipic>; 195 interrupt-parent = <&ipic>;
196 num-channels = <4>; 196 num-channels = <4>;
197 channel-fifo-len = <0x18>; 197 channel-fifo-len = <24>;
198 exec-units-mask = <0x0000007e>; 198 exec-units-mask = <0x0000007e>;
199 /* desc mask is for rev2.0, 199 /* desc mask is for rev2.0,
200 * we need runtime fixup for >2.0 */ 200 * we need runtime fixup for >2.0 */
@@ -222,10 +222,10 @@
222 interrupt-map = < 222 interrupt-map = <
223 223
224 /* IDSEL 0x11 */ 224 /* IDSEL 0x11 */
225 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8 225 0x8800 0x0 0x0 0x1 &ipic 20 0x8
226 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8 226 0x8800 0x0 0x0 0x2 &ipic 21 0x8
227 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8 227 0x8800 0x0 0x0 0x3 &ipic 22 0x8
228 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8>; 228 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
229 229
230 interrupt-parent = <&ipic>; 230 interrupt-parent = <&ipic>;
231 interrupts = <0x42 0x8>; 231 interrupts = <0x42 0x8>;