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authorMingkai Hu <Mingkai.hu@freescale.com>2010-10-12 06:18:33 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-10-12 23:38:12 -0400
commitf3016fa591c788d6d545ef7907e24c8b5d788759 (patch)
tree75b05dbe3a010fb026143c36a0d85f2fb5864e83 /arch/powerpc/boot/dts/p4080ds.dts
parent8b60d6c25b2a2d3525d5322de856c3ca408e5783 (diff)
powerpc/of: add eSPI controller dts bindings and DTS modification
Also modifiy the document of cell-index in SPI controller. Add the SPI flash(s25fl128p01) support on p4080ds and mpc8536ds board. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/powerpc/boot/dts/p4080ds.dts')
-rw-r--r--arch/powerpc/boot/dts/p4080ds.dts11
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 2f0de24e3822..5b7fc29dd6cf 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -236,22 +236,19 @@
236 }; 236 };
237 237
238 spi@110000 { 238 spi@110000 {
239 cell-index = <0>;
240 #address-cells = <1>; 239 #address-cells = <1>;
241 #size-cells = <0>; 240 #size-cells = <0>;
242 compatible = "fsl,espi"; 241 compatible = "fsl,p4080-espi", "fsl,mpc8536-espi";
243 reg = <0x110000 0x1000>; 242 reg = <0x110000 0x1000>;
244 interrupts = <53 0x2>; 243 interrupts = <53 0x2>;
245 interrupt-parent = <&mpic>; 244 interrupt-parent = <&mpic>;
246 espi,num-ss-bits = <4>; 245 fsl,espi-num-chipselects = <4>;
247 mode = "cpu";
248 246
249 fsl_m25p80@0 { 247 flash@0 {
250 #address-cells = <1>; 248 #address-cells = <1>;
251 #size-cells = <1>; 249 #size-cells = <1>;
252 compatible = "fsl,espi-flash"; 250 compatible = "spansion,s25sl12801";
253 reg = <0>; 251 reg = <0>;
254 linux,modalias = "fsl_m25p80";
255 spi-max-frequency = <40000000>; /* input clock */ 252 spi-max-frequency = <40000000>; /* input clock */
256 partition@u-boot { 253 partition@u-boot {
257 label = "u-boot"; 254 label = "u-boot";