powerpc/85xx: Add dts for p1025rdb board

P1025RDB Overview
------------------
1Gbyte DDR3 SDRAM
32 Mbyte NAND flash
16Mbyte NOR flash
16 Mbyte SPI flash
SD connector to interface with the SD memory card
Real-time clock on I2C bus

PCIe:
- x1 PCIe slot
- x1 mini-PCIe slot

10/100/1000 BaseT Ethernet ports:
- eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021
- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021

USB 2.0 port:
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot

Dual RJ45 UART ports:
- DUART interface: supports two UARTs up to 115200 bps for console display

Signed-off-by: Zhicheng Fan <b32736@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 88 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/p1025rdb_36b.dts b/arch/powerpc/boot/dts/p1025rdb_36b.dts
new file mode 100644
index 000000000000..4ce4bfa0eda4
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025rdb_36b.dts
@@ -0,0 +1,88 @@
+/*
+ * P1025 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/p1021si-pre.dtsi"
+/ {
+        model = "fsl,P1025RDB";
+        compatible = "fsl,P1025RDB";
+
+        memory {
+                device_type = "memory";
+        };
+
+        lbc: localbus@fffe05000 {
+                reg = <0xf 0xffe05000 0 0x1000>;
+
+                /* NOR, NAND Flashes */
+                ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+                          0x1 0x0 0xf 0xff800000 0x00040000>;
+        };
+
+        soc: soc@fffe00000 {
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
+        };
+
+        pci0: pcie@fffe09000 {
+                reg = <0xf 0xffe09000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+
+        pci1: pcie@fffe0a000 {
+                reg = <0xf 0xffe0a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
+                                  0x0 0x20000000
+
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+
+/include/ "p1025rdb.dtsi"
+/include/ "fsl/p1021si-post.dtsi"