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authorVitaly Bordug <vbordug@ru.mvista.com>2007-01-24 14:41:42 -0500
committerPaul Mackerras <paulus@samba.org>2007-02-06 22:03:17 -0500
commitdf34403dcaacef541a67c955aebc37c51f53ca7c (patch)
tree9d4159a85569a457a57f1ac352c373dd7d7a82ba /arch/powerpc/boot/dts/mpc885ads.dts
parentf2a0bd3753dad7ea4605ebd5435716b39e9f92bb (diff)
[POWERPC] 8xx: Add mpc885ads support and common mpc8xx files
This adds the core 8xx stuff and specifically mpc885ads board-specific bits to arch/powerpc. Respective Kconfig has been cleaned up from the stuff not yet ported over to avoid confusion. Updated and cleaned version. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc885ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc885ads.dts185
1 files changed, 185 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
new file mode 100644
index 000000000000..cf1a19f962c5
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -0,0 +1,185 @@
1/*
2 * MPC885 ADS Device Tree Source
3 *
4 * Copyright 2006 MontaVista Software, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12
13/ {
14 model = "MPC885ADS";
15 compatible = "mpc8xx";
16 #address-cells = <1>;
17 #size-cells = <1>;
18 linux,phandle = <100>;
19
20 cpus {
21 #cpus = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 linux,phandle = <200>;
25
26 PowerPC,885@0 {
27 device_type = "cpu";
28 reg = <0>;
29 d-cache-line-size = <20>; // 32 bytes
30 i-cache-line-size = <20>; // 32 bytes
31 d-cache-size = <2000>; // L1, 8K
32 i-cache-size = <2000>; // L1, 8K
33 timebase-frequency = <0>;
34 bus-frequency = <0>;
35 clock-frequency = <0>;
36 32-bit;
37 interrupts = <f 2>; // decrementer interrupt
38 interrupt-parent = <ff000000>;
39 linux,phandle = <201>;
40 linux,boot-cpu;
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 linux,phandle = <300>;
47 reg = <00000000 800000>;
48 };
49
50 soc885@ff000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 #interrupt-cells = <2>;
54 device_type = "soc";
55 ranges = <0 ff000000 00100000>;
56 reg = <ff000000 00000200>;
57 bus-frequency = <0>;
58 mdio@e80 {
59 device_type = "mdio";
60 compatible = "fs_enet";
61 reg = <e80 8>;
62 linux,phandle = <e80>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65 ethernet-phy@0 {
66 linux,phandle = <e8000>;
67 reg = <0>;
68 device_type = "ethernet-phy";
69 };
70 ethernet-phy@1 {
71 linux,phandle = <e8001>;
72 reg = <1>;
73 device_type = "ethernet-phy";
74 };
75 ethernet-phy@2 {
76 linux,phandle = <e8002>;
77 reg = <2>;
78 device_type = "ethernet-phy";
79 };
80 };
81
82 fec@e00 {
83 device_type = "network";
84 compatible = "fs_enet";
85 model = "FEC";
86 device-id = <1>;
87 reg = <e00 188>;
88 mac-address = [ 00 00 0C 00 01 FD ];
89 interrupts = <3 1>;
90 interrupt-parent = <ff000000>;
91 phy-handle = <e8000>;
92 };
93
94 fec@1e00 {
95 device_type = "network";
96 compatible = "fs_enet";
97 model = "FEC";
98 device-id = <2>;
99 reg = <1e00 188>;
100 mac-address = [ 00 00 0C 00 02 FD ];
101 interrupts = <7 1>;
102 interrupt-parent = <ff000000>;
103 phy-handle = <e8001>;
104 };
105
106 pic@ff000000 {
107 linux,phandle = <ff000000>;
108 interrupt-controller;
109 #address-cells = <0>;
110 #interrupt-cells = <2>;
111 reg = <0 24>;
112 built-in;
113 device_type = "mpc8xx-pic";
114 compatible = "CPM";
115 };
116
117 cpm@ff000000 {
118 linux,phandle = <ff000000>;
119 #address-cells = <1>;
120 #size-cells = <1>;
121 #interrupt-cells = <2>;
122 device_type = "cpm";
123 model = "CPM";
124 ranges = <0 0 4000>;
125 reg = <860 f0>;
126 command-proc = <9c0>;
127 brg-frequency = <0>;
128 interrupts = <0 2>; // cpm error interrupt
129 interrupt-parent = <930>;
130
131 pic@930 {
132 linux,phandle = <930>;
133 interrupt-controller;
134 #address-cells = <0>;
135 #interrupt-cells = <2>;
136 interrupts = <5 2 0 2>;
137 interrupt-parent = <ff000000>;
138 reg = <930 20>;
139 built-in;
140 device_type = "cpm-pic";
141 compatible = "CPM";
142 };
143
144 smc@a80 {
145 device_type = "serial";
146 compatible = "cpm_uart";
147 model = "SMC";
148 device-id = <1>;
149 reg = <a80 10 3e80 40>;
150 clock-setup = <00ffffff 0>;
151 rx-clock = <1>;
152 tx-clock = <1>;
153 current-speed = <0>;
154 interrupts = <4 3>;
155 interrupt-parent = <930>;
156 };
157
158 smc@a90 {
159 device_type = "serial";
160 compatible = "cpm_uart";
161 model = "SMC";
162 device-id = <2>;
163 reg = <a90 20 3f80 40>;
164 clock-setup = <ff00ffff 90000>;
165 rx-clock = <2>;
166 tx-clock = <2>;
167 current-speed = <0>;
168 interrupts = <3 3>;
169 interrupt-parent = <930>;
170 };
171
172 scc@a40 {
173 device_type = "network";
174 compatible = "fs_enet";
175 model = "SCC";
176 device-id = <3>;
177 reg = <a40 18 3e00 80>;
178 mac-address = [ 00 00 0C 00 03 FD ];
179 interrupts = <1c 3>;
180 interrupt-parent = <930>;
181 phy-handle = <e8002>;
182 };
183 };
184 };
185};