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authorKumar Gala <galak@kernel.crashing.org>2007-08-17 00:55:55 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-08-17 14:22:16 -0400
commitb66510cb9992d204f216049e9c01d432c7635f6c (patch)
tree4b00de7786b1ae5aeab06692fe2f67e1d8667fe7 /arch/powerpc/boot/dts/mpc8641_hpcn.dts
parentada3ea6fcde45abc55e2af0e564455fd7f943a79 (diff)
[POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boards
The interrupt routing in the device trees for the ULI M1575 was inproperly using the interrupt line field as pci function. Fixed up the device tree's to actual conform for to specification and changed the interrupt mapping code so it just uses a static mapping setup as follows: PIRQA - IRQ9 PIRQB - IRQ10 PIRQC - IRQ11 PIRQD - IRQ12 USB 1.1 OCHI (1c.0) - IRQ12 USB 1.1 OCHI (1c.1) - IRQ9 USB 1.1 OCHI (1c.2) - IRQ10 USB 1.1 ECHI (1c.3) - IRQ11 LAN (1b.0) - IRQ6 AC97 (1d.0) - IRQ6 Modem (1d.1) - IRQ6 HD Audio (1d.2) - IRQ6 SATA (1f.1) - IRQ5 SMB (1e.1) - IRQ7 PMU (1e.2) - IRQ7 PATA (1f.0) - IRQ14/15 Took the oppurtunity to refactor the code into a single file so we don't have to duplicate these fixes on the two current boards in the tree and several forth coming boards that will also need the code. Fixed RTC support that requires a dummy memory read on the P2P bridge to unlock the RTC and setup the default of the RTC alarm registers to match with a basic x86 style CMOS RTC. Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure the PCI IO space has been setup properly before we start poking ISA registers at random locations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8641_hpcn.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts114
1 files changed, 26 insertions, 88 deletions
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 5d82709cfcbb..b0166e5c177e 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -224,98 +224,36 @@
224 clock-frequency = <1fca055>; 224 clock-frequency = <1fca055>;
225 interrupt-parent = <&mpic>; 225 interrupt-parent = <&mpic>;
226 interrupts = <18 2>; 226 interrupts = <18 2>;
227 interrupt-map-mask = <f800 0 0 7>; 227 interrupt-map-mask = <fb00 0 0 0>;
228 interrupt-map = < 228 interrupt-map = <
229 /* IDSEL 0x11 */ 229 /* IDSEL 0x11 */
230 8800 0 0 1 &i8259 3 2 230 8800 0 0 1 &i8259 9 2
231 8800 0 0 2 &i8259 4 2 231 8800 0 0 2 &i8259 a 2
232 8800 0 0 3 &i8259 5 2 232 8800 0 0 3 &i8259 b 2
233 8800 0 0 4 &i8259 6 2 233 8800 0 0 4 &i8259 c 2
234 234
235 /* IDSEL 0x12 */ 235 /* IDSEL 0x12 */
236 9000 0 0 1 &i8259 4 2 236 9000 0 0 1 &i8259 a 2
237 9000 0 0 2 &i8259 5 2 237 9000 0 0 2 &i8259 b 2
238 9000 0 0 3 &i8259 6 2 238 9000 0 0 3 &i8259 c 2
239 9000 0 0 4 &i8259 3 2 239 9000 0 0 4 &i8259 9 2
240 240
241 /* IDSEL 0x13 */ 241 // IDSEL 0x1c USB
242 9800 0 0 1 &i8259 0 0 242 e000 0 0 0 &i8259 c 2
243 9800 0 0 2 &i8259 0 0 243 e100 0 0 0 &i8259 9 2
244 9800 0 0 3 &i8259 0 0 244 e200 0 0 0 &i8259 a 2
245 9800 0 0 4 &i8259 0 0 245 e300 0 0 0 &i8259 b 2
246 246
247 /* IDSEL 0x14 */ 247 // IDSEL 0x1d Audio
248 a000 0 0 1 &i8259 0 0 248 e800 0 0 0 &i8259 6 2
249 a000 0 0 2 &i8259 0 0 249
250 a000 0 0 3 &i8259 0 0 250 // IDSEL 0x1e Legacy
251 a000 0 0 4 &i8259 0 0 251 f000 0 0 0 &i8259 7 2
252 252 f100 0 0 0 &i8259 7 2
253 /* IDSEL 0x15 */ 253
254 a800 0 0 1 &i8259 0 0 254 // IDSEL 0x1f IDE/SATA
255 a800 0 0 2 &i8259 0 0 255 f800 0 0 0 &i8259 e 2
256 a800 0 0 3 &i8259 0 0 256 f900 0 0 0 &i8259 5 2
257 a800 0 0 4 &i8259 0 0
258
259 /* IDSEL 0x16 */
260 b000 0 0 1 &i8259 0 0
261 b000 0 0 2 &i8259 0 0
262 b000 0 0 3 &i8259 0 0
263 b000 0 0 4 &i8259 0 0
264
265 /* IDSEL 0x17 */
266 b800 0 0 1 &i8259 0 0
267 b800 0 0 2 &i8259 0 0
268 b800 0 0 3 &i8259 0 0
269 b800 0 0 4 &i8259 0 0
270
271 /* IDSEL 0x18 */
272 c000 0 0 1 &i8259 0 0
273 c000 0 0 2 &i8259 0 0
274 c000 0 0 3 &i8259 0 0
275 c000 0 0 4 &i8259 0 0
276
277 /* IDSEL 0x19 */
278 c800 0 0 1 &i8259 0 0
279 c800 0 0 2 &i8259 0 0
280 c800 0 0 3 &i8259 0 0
281 c800 0 0 4 &i8259 0 0
282
283 /* IDSEL 0x1a */
284 d000 0 0 1 &i8259 6 2
285 d000 0 0 2 &i8259 3 2
286 d000 0 0 3 &i8259 4 2
287 d000 0 0 4 &i8259 5 2
288
289
290 /* IDSEL 0x1b */
291 d800 0 0 1 &i8259 5 2
292 d800 0 0 2 &i8259 0 0
293 d800 0 0 3 &i8259 0 0
294 d800 0 0 4 &i8259 0 0
295
296 /* IDSEL 0x1c */
297 e000 0 0 1 &i8259 9 2
298 e000 0 0 2 &i8259 a 2
299 e000 0 0 3 &i8259 c 2
300 e000 0 0 4 &i8259 7 2
301
302 /* IDSEL 0x1d */
303 e800 0 0 1 &i8259 9 2
304 e800 0 0 2 &i8259 a 2
305 e800 0 0 3 &i8259 b 2
306 e800 0 0 4 &i8259 0 0
307
308 /* IDSEL 0x1e */
309 f000 0 0 1 &i8259 c 2
310 f000 0 0 2 &i8259 0 0
311 f000 0 0 3 &i8259 0 0
312 f000 0 0 4 &i8259 0 0
313
314 /* IDSEL 0x1f */
315 f800 0 0 1 &i8259 6 2
316 f800 0 0 2 &i8259 0 0
317 f800 0 0 3 &i8259 0 0
318 f800 0 0 4 &i8259 0 0
319 >; 257 >;
320 uli1575@0 { 258 uli1575@0 {
321 reg = <0 0 0 0 0>; 259 reg = <0 0 0 0 0>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 03:55:17 -0500