diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-07-03 03:35:35 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-07-03 03:35:35 -0400 |
commit | b533f8ae796d1ee0289bf04d4f1e72c02ad4a17d (patch) | |
tree | 4bec480194b251e18fee511df1cf4840a1995c88 /arch/powerpc/boot/dts/mpc8568mds.dts | |
parent | eae98266e78e5659d75dbb62b4601960c15c7830 (diff) |
[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.
Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8568mds.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8568mds.dts | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 479a7a55ede2..6bb18f2807a8 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
@@ -61,7 +61,7 @@ | |||
61 | compatible = "fsl,8568-memory-controller"; | 61 | compatible = "fsl,8568-memory-controller"; |
62 | reg = <2000 1000>; | 62 | reg = <2000 1000>; |
63 | interrupt-parent = <&mpic>; | 63 | interrupt-parent = <&mpic>; |
64 | interrupts = <2 2>; | 64 | interrupts = <12 2>; |
65 | }; | 65 | }; |
66 | 66 | ||
67 | l2-cache-controller@20000 { | 67 | l2-cache-controller@20000 { |
@@ -70,14 +70,14 @@ | |||
70 | cache-line-size = <20>; // 32 bytes | 70 | cache-line-size = <20>; // 32 bytes |
71 | cache-size = <80000>; // L2, 512K | 71 | cache-size = <80000>; // L2, 512K |
72 | interrupt-parent = <&mpic>; | 72 | interrupt-parent = <&mpic>; |
73 | interrupts = <0 2>; | 73 | interrupts = <10 2>; |
74 | }; | 74 | }; |
75 | 75 | ||
76 | i2c@3000 { | 76 | i2c@3000 { |
77 | device_type = "i2c"; | 77 | device_type = "i2c"; |
78 | compatible = "fsl-i2c"; | 78 | compatible = "fsl-i2c"; |
79 | reg = <3000 100>; | 79 | reg = <3000 100>; |
80 | interrupts = <1b 2>; | 80 | interrupts = <2b 2>; |
81 | interrupt-parent = <&mpic>; | 81 | interrupt-parent = <&mpic>; |
82 | dfsrr; | 82 | dfsrr; |
83 | }; | 83 | }; |
@@ -86,7 +86,7 @@ | |||
86 | device_type = "i2c"; | 86 | device_type = "i2c"; |
87 | compatible = "fsl-i2c"; | 87 | compatible = "fsl-i2c"; |
88 | reg = <3100 100>; | 88 | reg = <3100 100>; |
89 | interrupts = <1b 2>; | 89 | interrupts = <2b 2>; |
90 | interrupt-parent = <&mpic>; | 90 | interrupt-parent = <&mpic>; |
91 | dfsrr; | 91 | dfsrr; |
92 | }; | 92 | }; |
@@ -99,25 +99,25 @@ | |||
99 | reg = <24520 20>; | 99 | reg = <24520 20>; |
100 | phy0: ethernet-phy@0 { | 100 | phy0: ethernet-phy@0 { |
101 | interrupt-parent = <&mpic>; | 101 | interrupt-parent = <&mpic>; |
102 | interrupts = <31 1>; | 102 | interrupts = <1 1>; |
103 | reg = <0>; | 103 | reg = <0>; |
104 | device_type = "ethernet-phy"; | 104 | device_type = "ethernet-phy"; |
105 | }; | 105 | }; |
106 | phy1: ethernet-phy@1 { | 106 | phy1: ethernet-phy@1 { |
107 | interrupt-parent = <&mpic>; | 107 | interrupt-parent = <&mpic>; |
108 | interrupts = <32 1>; | 108 | interrupts = <2 1>; |
109 | reg = <1>; | 109 | reg = <1>; |
110 | device_type = "ethernet-phy"; | 110 | device_type = "ethernet-phy"; |
111 | }; | 111 | }; |
112 | phy2: ethernet-phy@2 { | 112 | phy2: ethernet-phy@2 { |
113 | interrupt-parent = <&mpic>; | 113 | interrupt-parent = <&mpic>; |
114 | interrupts = <31 1>; | 114 | interrupts = <1 1>; |
115 | reg = <2>; | 115 | reg = <2>; |
116 | device_type = "ethernet-phy"; | 116 | device_type = "ethernet-phy"; |
117 | }; | 117 | }; |
118 | phy3: ethernet-phy@3 { | 118 | phy3: ethernet-phy@3 { |
119 | interrupt-parent = <&mpic>; | 119 | interrupt-parent = <&mpic>; |
120 | interrupts = <32 1>; | 120 | interrupts = <2 1>; |
121 | reg = <3>; | 121 | reg = <3>; |
122 | device_type = "ethernet-phy"; | 122 | device_type = "ethernet-phy"; |
123 | }; | 123 | }; |
@@ -137,7 +137,7 @@ | |||
137 | */ | 137 | */ |
138 | mac-address = [ 00 00 00 00 00 00 ]; | 138 | mac-address = [ 00 00 00 00 00 00 ]; |
139 | local-mac-address = [ 00 00 00 00 00 00 ]; | 139 | local-mac-address = [ 00 00 00 00 00 00 ]; |
140 | interrupts = <d 2 e 2 12 2>; | 140 | interrupts = <1d 2 1e 2 22 2>; |
141 | interrupt-parent = <&mpic>; | 141 | interrupt-parent = <&mpic>; |
142 | phy-handle = <&phy2>; | 142 | phy-handle = <&phy2>; |
143 | }; | 143 | }; |
@@ -156,7 +156,7 @@ | |||
156 | */ | 156 | */ |
157 | mac-address = [ 00 00 00 00 00 00 ]; | 157 | mac-address = [ 00 00 00 00 00 00 ]; |
158 | local-mac-address = [ 00 00 00 00 00 00 ]; | 158 | local-mac-address = [ 00 00 00 00 00 00 ]; |
159 | interrupts = <13 2 14 2 18 2>; | 159 | interrupts = <23 2 24 2 28 2>; |
160 | interrupt-parent = <&mpic>; | 160 | interrupt-parent = <&mpic>; |
161 | phy-handle = <&phy3>; | 161 | phy-handle = <&phy3>; |
162 | }; | 162 | }; |
@@ -166,7 +166,7 @@ | |||
166 | compatible = "ns16550"; | 166 | compatible = "ns16550"; |
167 | reg = <4500 100>; | 167 | reg = <4500 100>; |
168 | clock-frequency = <0>; | 168 | clock-frequency = <0>; |
169 | interrupts = <1a 2>; | 169 | interrupts = <2a 2>; |
170 | interrupt-parent = <&mpic>; | 170 | interrupt-parent = <&mpic>; |
171 | }; | 171 | }; |
172 | 172 | ||
@@ -175,7 +175,7 @@ | |||
175 | compatible = "ns16550"; | 175 | compatible = "ns16550"; |
176 | reg = <4600 100>; | 176 | reg = <4600 100>; |
177 | clock-frequency = <0>; | 177 | clock-frequency = <0>; |
178 | interrupts = <1a 2>; | 178 | interrupts = <2a 2>; |
179 | interrupt-parent = <&mpic>; | 179 | interrupt-parent = <&mpic>; |
180 | }; | 180 | }; |
181 | 181 | ||
@@ -184,7 +184,7 @@ | |||
184 | model = "SEC2"; | 184 | model = "SEC2"; |
185 | compatible = "talitos"; | 185 | compatible = "talitos"; |
186 | reg = <30000 f000>; | 186 | reg = <30000 f000>; |
187 | interrupts = <1d 2>; | 187 | interrupts = <2d 2>; |
188 | interrupt-parent = <&mpic>; | 188 | interrupt-parent = <&mpic>; |
189 | num-channels = <4>; | 189 | num-channels = <4>; |
190 | channel-fifo-len = <18>; | 190 | channel-fifo-len = <18>; |
@@ -359,25 +359,25 @@ | |||
359 | * gianfar's MDIO bus */ | 359 | * gianfar's MDIO bus */ |
360 | qe_phy0: ethernet-phy@00 { | 360 | qe_phy0: ethernet-phy@00 { |
361 | interrupt-parent = <&mpic>; | 361 | interrupt-parent = <&mpic>; |
362 | interrupts = <31 1>; | 362 | interrupts = <1 1>; |
363 | reg = <0>; | 363 | reg = <0>; |
364 | device_type = "ethernet-phy"; | 364 | device_type = "ethernet-phy"; |
365 | }; | 365 | }; |
366 | qe_phy1: ethernet-phy@01 { | 366 | qe_phy1: ethernet-phy@01 { |
367 | interrupt-parent = <&mpic>; | 367 | interrupt-parent = <&mpic>; |
368 | interrupts = <32 1>; | 368 | interrupts = <2 1>; |
369 | reg = <1>; | 369 | reg = <1>; |
370 | device_type = "ethernet-phy"; | 370 | device_type = "ethernet-phy"; |
371 | }; | 371 | }; |
372 | qe_phy2: ethernet-phy@02 { | 372 | qe_phy2: ethernet-phy@02 { |
373 | interrupt-parent = <&mpic>; | 373 | interrupt-parent = <&mpic>; |
374 | interrupts = <31 1>; | 374 | interrupts = <1 1>; |
375 | reg = <2>; | 375 | reg = <2>; |
376 | device_type = "ethernet-phy"; | 376 | device_type = "ethernet-phy"; |
377 | }; | 377 | }; |
378 | qe_phy3: ethernet-phy@03 { | 378 | qe_phy3: ethernet-phy@03 { |
379 | interrupt-parent = <&mpic>; | 379 | interrupt-parent = <&mpic>; |
380 | interrupts = <32 1>; | 380 | interrupts = <2 1>; |
381 | reg = <3>; | 381 | reg = <3>; |
382 | device_type = "ethernet-phy"; | 382 | device_type = "ethernet-phy"; |
383 | }; | 383 | }; |
@@ -391,7 +391,7 @@ | |||
391 | reg = <80 80>; | 391 | reg = <80 80>; |
392 | built-in; | 392 | built-in; |
393 | big-endian; | 393 | big-endian; |
394 | interrupts = <1e 2 1e 2>; //high:30 low:30 | 394 | interrupts = <2e 2 2e 2>; //high:30 low:30 |
395 | interrupt-parent = <&mpic>; | 395 | interrupt-parent = <&mpic>; |
396 | }; | 396 | }; |
397 | 397 | ||