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authorBradley Hughes <bhughes@silicontkx.com>2010-07-21 08:04:06 -0400
committerKumar Gala <galak@kernel.crashing.org>2010-08-04 15:22:04 -0400
commit8a4ab218ef7034660982931b3e1eb6bbc2bde0ea (patch)
tree5edb501132f3af03ae7a995147d9c922ab672c18 /arch/powerpc/boot/dts/mpc8568mds.dts
parente9502fbe2d1e754edfb70d5738f058853097c88c (diff)
powerpc/85xx: Change deprecated binding for 85xx-based boards
The "fsl,85..." style compatible binding was to be deprecated some time ago. This patch corrects existing occurrences of the incorrect binding. The memory-controller and l2-cache-controller are the only affected nodes. Signed-off-by: Bradley Hughes <bhughes@silicontkx.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8568mds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 92fb17876e7d..30cf0e098bb9 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -124,14 +124,14 @@
124 }; 124 };
125 125
126 memory-controller@2000 { 126 memory-controller@2000 {
127 compatible = "fsl,8568-memory-controller"; 127 compatible = "fsl,mpc8568-memory-controller";
128 reg = <0x2000 0x1000>; 128 reg = <0x2000 0x1000>;
129 interrupt-parent = <&mpic>; 129 interrupt-parent = <&mpic>;
130 interrupts = <18 2>; 130 interrupts = <18 2>;
131 }; 131 };
132 132
133 L2: l2-cache-controller@20000 { 133 L2: l2-cache-controller@20000 {
134 compatible = "fsl,8568-l2-cache-controller"; 134 compatible = "fsl,mpc8568-l2-cache-controller";
135 reg = <0x20000 0x1000>; 135 reg = <0x20000 0x1000>;
136 cache-line-size = <32>; // 32 bytes 136 cache-line-size = <32>; // 32 bytes
137 cache-size = <0x80000>; // L2, 512K 137 cache-size = <0x80000>; // L2, 512K