diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2008-05-30 14:43:43 -0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-06-02 15:44:25 -0400 |
| commit | c054065bc10a7ee2bcf78b5bc95f4b4d9bdc923a (patch) | |
| tree | 023b60c1b55c04c2db08983a3aaef151d081fcac /arch/powerpc/boot/dts/mpc8560ads.dts | |
| parent | acd4b715ec83e451990bb82bdbf28ecaeab1b67d (diff) | |
[POWERPC] 85xx: Add next-level-cache property
Added next-level-cache to the L1 and a reference to the new L2 label.
This is per the ePAPR 0.94 spec. Since we are't really dependent on this
today we aren't supporting the "legacy" l2-cache phandle that is specified
in the PPC v2.1 OF Binding spec.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8560ads.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/mpc8560ads.dts | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index f0b1f98a2df8..5d9f3c4b5b71 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
| @@ -64,7 +64,7 @@ | |||
| 64 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
| 65 | }; | 65 | }; |
| 66 | 66 | ||
| 67 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
| 68 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
| 69 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
| 70 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |