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authorKumar Gala <galak@kernel.crashing.org>2007-02-17 17:04:23 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-02-17 17:06:27 -0500
commit520948796335111cf91970efabca7e5d064db344 (patch)
tree60be45c7b1ab1a56c842acf49802cbbaa4f0686b /arch/powerpc/boot/dts/mpc8560ads.dts
parent975b89399679dcf8587288d46d3f21d4286af167 (diff)
[POWERPC] 85xx: Cleaned up platform dts files
* Fixed up top level compatible property for all boards * Removed explicit linux,phandle usage. Use references and labels now * Fixed phy-phandles for TSEC3/4 in mpc8548cds.dts Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8560ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts157
1 files changed, 72 insertions, 85 deletions
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index c74d6ebc5c8a..10502638b0e9 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8560ADS"; 14 model = "MPC8560ADS";
15 compatible = "MPC85xxADS"; 15 compatible = "MPC8560ADS", "MPC85xxADS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8560@0 { 24 PowerPC,8560@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <13ab6680>; 32 bus-frequency = <13ab6680>;
35 clock-frequency = <312c8040>; 33 clock-frequency = <312c8040>;
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 10000000>; 40 reg = <00000000 10000000>;
45 }; 41 };
46 42
@@ -57,33 +53,28 @@
57 device_type = "mdio"; 53 device_type = "mdio";
58 compatible = "gianfar"; 54 compatible = "gianfar";
59 reg = <24520 20>; 55 reg = <24520 20>;
60 linux,phandle = <24520>;
61 #address-cells = <1>; 56 #address-cells = <1>;
62 #size-cells = <0>; 57 #size-cells = <0>;
63 ethernet-phy@0 { 58 phy0: ethernet-phy@0 {
64 linux,phandle = <2452000>; 59 interrupt-parent = <&mpic>;
65 interrupt-parent = <40000>;
66 interrupts = <35 1>; 60 interrupts = <35 1>;
67 reg = <0>; 61 reg = <0>;
68 device_type = "ethernet-phy"; 62 device_type = "ethernet-phy";
69 }; 63 };
70 ethernet-phy@1 { 64 phy1: ethernet-phy@1 {
71 linux,phandle = <2452001>; 65 interrupt-parent = <&mpic>;
72 interrupt-parent = <40000>;
73 interrupts = <35 1>; 66 interrupts = <35 1>;
74 reg = <1>; 67 reg = <1>;
75 device_type = "ethernet-phy"; 68 device_type = "ethernet-phy";
76 }; 69 };
77 ethernet-phy@2 { 70 phy2: ethernet-phy@2 {
78 linux,phandle = <2452002>; 71 interrupt-parent = <&mpic>;
79 interrupt-parent = <40000>;
80 interrupts = <37 1>; 72 interrupts = <37 1>;
81 reg = <2>; 73 reg = <2>;
82 device_type = "ethernet-phy"; 74 device_type = "ethernet-phy";
83 }; 75 };
84 ethernet-phy@3 { 76 phy3: ethernet-phy@3 {
85 linux,phandle = <2452003>; 77 interrupt-parent = <&mpic>;
86 interrupt-parent = <40000>;
87 interrupts = <37 1>; 78 interrupts = <37 1>;
88 reg = <3>; 79 reg = <3>;
89 device_type = "ethernet-phy"; 80 device_type = "ethernet-phy";
@@ -97,8 +88,8 @@
97 reg = <24000 1000>; 88 reg = <24000 1000>;
98 address = [ 00 00 0C 00 00 FD ]; 89 address = [ 00 00 0C 00 00 FD ];
99 interrupts = <d 2 e 2 12 2>; 90 interrupts = <d 2 e 2 12 2>;
100 interrupt-parent = <40000>; 91 interrupt-parent = <&mpic>;
101 phy-handle = <2452000>; 92 phy-handle = <&phy0>;
102 }; 93 };
103 94
104 ethernet@25000 { 95 ethernet@25000 {
@@ -110,12 +101,11 @@
110 reg = <25000 1000>; 101 reg = <25000 1000>;
111 address = [ 00 00 0C 00 01 FD ]; 102 address = [ 00 00 0C 00 01 FD ];
112 interrupts = <13 2 14 2 18 2>; 103 interrupts = <13 2 14 2 18 2>;
113 interrupt-parent = <40000>; 104 interrupt-parent = <&mpic>;
114 phy-handle = <2452001>; 105 phy-handle = <&phy1>;
115 }; 106 };
116 107
117 pci@8000 { 108 pci@8000 {
118 linux,phandle = <8000>;
119 #interrupt-cells = <1>; 109 #interrupt-cells = <1>;
120 #size-cells = <2>; 110 #size-cells = <2>;
121 #address-cells = <3>; 111 #address-cells = <3>;
@@ -127,96 +117,94 @@
127 interrupt-map = < 117 interrupt-map = <
128 118
129 /* IDSEL 0x2 */ 119 /* IDSEL 0x2 */
130 1000 0 0 1 40000 31 1 120 1000 0 0 1 &mpic 31 1
131 1000 0 0 2 40000 32 1 121 1000 0 0 2 &mpic 32 1
132 1000 0 0 3 40000 33 1 122 1000 0 0 3 &mpic 33 1
133 1000 0 0 4 40000 34 1 123 1000 0 0 4 &mpic 34 1
134 124
135 /* IDSEL 0x3 */ 125 /* IDSEL 0x3 */
136 1800 0 0 1 40000 34 1 126 1800 0 0 1 &mpic 34 1
137 1800 0 0 2 40000 31 1 127 1800 0 0 2 &mpic 31 1
138 1800 0 0 3 40000 32 1 128 1800 0 0 3 &mpic 32 1
139 1800 0 0 4 40000 33 1 129 1800 0 0 4 &mpic 33 1
140 130
141 /* IDSEL 0x4 */ 131 /* IDSEL 0x4 */
142 2000 0 0 1 40000 33 1 132 2000 0 0 1 &mpic 33 1
143 2000 0 0 2 40000 34 1 133 2000 0 0 2 &mpic 34 1
144 2000 0 0 3 40000 31 1 134 2000 0 0 3 &mpic 31 1
145 2000 0 0 4 40000 32 1 135 2000 0 0 4 &mpic 32 1
146 136
147 /* IDSEL 0x5 */ 137 /* IDSEL 0x5 */
148 2800 0 0 1 40000 32 1 138 2800 0 0 1 &mpic 32 1
149 2800 0 0 2 40000 33 1 139 2800 0 0 2 &mpic 33 1
150 2800 0 0 3 40000 34 1 140 2800 0 0 3 &mpic 34 1
151 2800 0 0 4 40000 31 1 141 2800 0 0 4 &mpic 31 1
152 142
153 /* IDSEL 12 */ 143 /* IDSEL 12 */
154 6000 0 0 1 40000 31 1 144 6000 0 0 1 &mpic 31 1
155 6000 0 0 2 40000 32 1 145 6000 0 0 2 &mpic 32 1
156 6000 0 0 3 40000 33 1 146 6000 0 0 3 &mpic 33 1
157 6000 0 0 4 40000 34 1 147 6000 0 0 4 &mpic 34 1
158 148
159 /* IDSEL 13 */ 149 /* IDSEL 13 */
160 6800 0 0 1 40000 34 1 150 6800 0 0 1 &mpic 34 1
161 6800 0 0 2 40000 31 1 151 6800 0 0 2 &mpic 31 1
162 6800 0 0 3 40000 32 1 152 6800 0 0 3 &mpic 32 1
163 6800 0 0 4 40000 33 1 153 6800 0 0 4 &mpic 33 1
164 154
165 /* IDSEL 14*/ 155 /* IDSEL 14*/
166 7000 0 0 1 40000 33 1 156 7000 0 0 1 &mpic 33 1
167 7000 0 0 2 40000 34 1 157 7000 0 0 2 &mpic 34 1
168 7000 0 0 3 40000 31 1 158 7000 0 0 3 &mpic 31 1
169 7000 0 0 4 40000 32 1 159 7000 0 0 4 &mpic 32 1
170 160
171 /* IDSEL 15 */ 161 /* IDSEL 15 */
172 7800 0 0 1 40000 32 1 162 7800 0 0 1 &mpic 32 1
173 7800 0 0 2 40000 33 1 163 7800 0 0 2 &mpic 33 1
174 7800 0 0 3 40000 34 1 164 7800 0 0 3 &mpic 34 1
175 7800 0 0 4 40000 31 1 165 7800 0 0 4 &mpic 31 1
176 166
177 /* IDSEL 18 */ 167 /* IDSEL 18 */
178 9000 0 0 1 40000 31 1 168 9000 0 0 1 &mpic 31 1
179 9000 0 0 2 40000 32 1 169 9000 0 0 2 &mpic 32 1
180 9000 0 0 3 40000 33 1 170 9000 0 0 3 &mpic 33 1
181 9000 0 0 4 40000 34 1 171 9000 0 0 4 &mpic 34 1
182 172
183 /* IDSEL 19 */ 173 /* IDSEL 19 */
184 9800 0 0 1 40000 34 1 174 9800 0 0 1 &mpic 34 1
185 9800 0 0 2 40000 31 1 175 9800 0 0 2 &mpic 31 1
186 9800 0 0 3 40000 32 1 176 9800 0 0 3 &mpic 32 1
187 9800 0 0 4 40000 33 1 177 9800 0 0 4 &mpic 33 1
188 178
189 /* IDSEL 20 */ 179 /* IDSEL 20 */
190 a000 0 0 1 40000 33 1 180 a000 0 0 1 &mpic 33 1
191 a000 0 0 2 40000 34 1 181 a000 0 0 2 &mpic 34 1
192 a000 0 0 3 40000 31 1 182 a000 0 0 3 &mpic 31 1
193 a000 0 0 4 40000 32 1 183 a000 0 0 4 &mpic 32 1
194 184
195 /* IDSEL 21 */ 185 /* IDSEL 21 */
196 a800 0 0 1 40000 32 1 186 a800 0 0 1 &mpic 32 1
197 a800 0 0 2 40000 33 1 187 a800 0 0 2 &mpic 33 1
198 a800 0 0 3 40000 34 1 188 a800 0 0 3 &mpic 34 1
199 a800 0 0 4 40000 31 1>; 189 a800 0 0 4 &mpic 31 1>;
200 190
201 interrupt-parent = <40000>; 191 interrupt-parent = <&mpic>;
202 interrupts = <8 0>; 192 interrupts = <8 0>;
203 bus-range = <0 0>; 193 bus-range = <0 0>;
204 ranges = <02000000 0 80000000 80000000 0 20000000 194 ranges = <02000000 0 80000000 80000000 0 20000000
205 01000000 0 00000000 e2000000 0 01000000>; 195 01000000 0 00000000 e2000000 0 01000000>;
206 }; 196 };
207 197
208 pic@40000 { 198 mpic: pic@40000 {
209 linux,phandle = <40000>;
210 interrupt-controller; 199 interrupt-controller;
211 #address-cells = <0>; 200 #address-cells = <0>;
212 #interrupt-cells = <2>; 201 #interrupt-cells = <2>;
213 reg = <40000 20100>; 202 reg = <40000 40000>;
214 built-in; 203 built-in;
215 device_type = "open-pic"; 204 device_type = "open-pic";
216 }; 205 };
217 206
218 cpm@e0000000 { 207 cpm@e0000000 {
219 linux,phandle = <e0000000>;
220 #address-cells = <1>; 208 #address-cells = <1>;
221 #size-cells = <1>; 209 #size-cells = <1>;
222 #interrupt-cells = <2>; 210 #interrupt-cells = <2>;
@@ -227,13 +215,12 @@
227 command-proc = <919c0>; 215 command-proc = <919c0>;
228 brg-frequency = <9d5b340>; 216 brg-frequency = <9d5b340>;
229 217
230 pic@90c00 { 218 cpmpic: pic@90c00 {
231 linux,phandle = <90c00>;
232 interrupt-controller; 219 interrupt-controller;
233 #address-cells = <0>; 220 #address-cells = <0>;
234 #interrupt-cells = <2>; 221 #interrupt-cells = <2>;
235 interrupts = <1e 0>; 222 interrupts = <1e 0>;
236 interrupt-parent = <40000>; 223 interrupt-parent = <&mpic>;
237 reg = <90c00 80>; 224 reg = <90c00 80>;
238 built-in; 225 built-in;
239 device_type = "cpm-pic"; 226 device_type = "cpm-pic";
@@ -250,7 +237,7 @@
250 tx-clock = <1>; 237 tx-clock = <1>;
251 current-speed = <1c200>; 238 current-speed = <1c200>;
252 interrupts = <28 8>; 239 interrupts = <28 8>;
253 interrupt-parent = <90c00>; 240 interrupt-parent = <&cpmpic>;
254 }; 241 };
255 242
256 scc@91a20 { 243 scc@91a20 {
@@ -264,7 +251,7 @@
264 tx-clock = <2>; 251 tx-clock = <2>;
265 current-speed = <1c200>; 252 current-speed = <1c200>;
266 interrupts = <29 8>; 253 interrupts = <29 8>;
267 interrupt-parent = <90c00>; 254 interrupt-parent = <&cpmpic>;
268 }; 255 };
269 256
270 fcc@91320 { 257 fcc@91320 {
@@ -278,8 +265,8 @@
278 rx-clock = <15>; 265 rx-clock = <15>;
279 tx-clock = <16>; 266 tx-clock = <16>;
280 interrupts = <21 8>; 267 interrupts = <21 8>;
281 interrupt-parent = <90c00>; 268 interrupt-parent = <&cpmpic>;
282 phy-handle = <2452002>; 269 phy-handle = <&phy2>;
283 }; 270 };
284 271
285 fcc@91340 { 272 fcc@91340 {
@@ -293,8 +280,8 @@
293 rx-clock = <17>; 280 rx-clock = <17>;
294 tx-clock = <18>; 281 tx-clock = <18>;
295 interrupts = <22 8>; 282 interrupts = <22 8>;
296 interrupt-parent = <90c00>; 283 interrupt-parent = <&cpmpic>;
297 phy-handle = <2452003>; 284 phy-handle = <&phy3>;
298 }; 285 };
299 }; 286 };
300 }; 287 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 07:42:42 -0500