diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-07-03 03:35:35 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-07-03 03:35:35 -0400 |
commit | b533f8ae796d1ee0289bf04d4f1e72c02ad4a17d (patch) | |
tree | 4bec480194b251e18fee511df1cf4840a1995c88 /arch/powerpc/boot/dts/mpc8544ds.dts | |
parent | eae98266e78e5659d75dbb62b4601960c15c7830 (diff) |
[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.
Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8544ds.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8544ds.dts | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 3033599e74e8..828592592460 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
@@ -52,7 +52,7 @@ | |||
52 | compatible = "fsl,8544-memory-controller"; | 52 | compatible = "fsl,8544-memory-controller"; |
53 | reg = <2000 1000>; | 53 | reg = <2000 1000>; |
54 | interrupt-parent = <&mpic>; | 54 | interrupt-parent = <&mpic>; |
55 | interrupts = <2 2>; | 55 | interrupts = <12 2>; |
56 | }; | 56 | }; |
57 | 57 | ||
58 | l2-cache-controller@20000 { | 58 | l2-cache-controller@20000 { |
@@ -61,14 +61,14 @@ | |||
61 | cache-line-size = <20>; // 32 bytes | 61 | cache-line-size = <20>; // 32 bytes |
62 | cache-size = <40000>; // L2, 256K | 62 | cache-size = <40000>; // L2, 256K |
63 | interrupt-parent = <&mpic>; | 63 | interrupt-parent = <&mpic>; |
64 | interrupts = <0 2>; | 64 | interrupts = <10 2>; |
65 | }; | 65 | }; |
66 | 66 | ||
67 | i2c@3000 { | 67 | i2c@3000 { |
68 | device_type = "i2c"; | 68 | device_type = "i2c"; |
69 | compatible = "fsl-i2c"; | 69 | compatible = "fsl-i2c"; |
70 | reg = <3000 100>; | 70 | reg = <3000 100>; |
71 | interrupts = <1b 2>; | 71 | interrupts = <2b 2>; |
72 | interrupt-parent = <&mpic>; | 72 | interrupt-parent = <&mpic>; |
73 | dfsrr; | 73 | dfsrr; |
74 | }; | 74 | }; |
@@ -81,13 +81,13 @@ | |||
81 | reg = <24520 20>; | 81 | reg = <24520 20>; |
82 | phy0: ethernet-phy@0 { | 82 | phy0: ethernet-phy@0 { |
83 | interrupt-parent = <&mpic>; | 83 | interrupt-parent = <&mpic>; |
84 | interrupts = <3a 1>; | 84 | interrupts = <a 1>; |
85 | reg = <0>; | 85 | reg = <0>; |
86 | device_type = "ethernet-phy"; | 86 | device_type = "ethernet-phy"; |
87 | }; | 87 | }; |
88 | phy1: ethernet-phy@1 { | 88 | phy1: ethernet-phy@1 { |
89 | interrupt-parent = <&mpic>; | 89 | interrupt-parent = <&mpic>; |
90 | interrupts = <3a 1>; | 90 | interrupts = <a 1>; |
91 | reg = <1>; | 91 | reg = <1>; |
92 | device_type = "ethernet-phy"; | 92 | device_type = "ethernet-phy"; |
93 | }; | 93 | }; |
@@ -101,7 +101,7 @@ | |||
101 | compatible = "gianfar"; | 101 | compatible = "gianfar"; |
102 | reg = <24000 1000>; | 102 | reg = <24000 1000>; |
103 | local-mac-address = [ 00 00 00 00 00 00 ]; | 103 | local-mac-address = [ 00 00 00 00 00 00 ]; |
104 | interrupts = <d 2 e 2 12 2>; | 104 | interrupts = <1d 2 1e 2 22 2>; |
105 | interrupt-parent = <&mpic>; | 105 | interrupt-parent = <&mpic>; |
106 | phy-handle = <&phy0>; | 106 | phy-handle = <&phy0>; |
107 | }; | 107 | }; |
@@ -114,7 +114,7 @@ | |||
114 | compatible = "gianfar"; | 114 | compatible = "gianfar"; |
115 | reg = <26000 1000>; | 115 | reg = <26000 1000>; |
116 | local-mac-address = [ 00 00 00 00 00 00 ]; | 116 | local-mac-address = [ 00 00 00 00 00 00 ]; |
117 | interrupts = <f 2 10 2 11 2>; | 117 | interrupts = <1f 2 20 2 21 2>; |
118 | interrupt-parent = <&mpic>; | 118 | interrupt-parent = <&mpic>; |
119 | phy-handle = <&phy1>; | 119 | phy-handle = <&phy1>; |
120 | }; | 120 | }; |
@@ -124,7 +124,7 @@ | |||
124 | compatible = "ns16550"; | 124 | compatible = "ns16550"; |
125 | reg = <4500 100>; | 125 | reg = <4500 100>; |
126 | clock-frequency = <0>; | 126 | clock-frequency = <0>; |
127 | interrupts = <1a 2>; | 127 | interrupts = <2a 2>; |
128 | interrupt-parent = <&mpic>; | 128 | interrupt-parent = <&mpic>; |
129 | }; | 129 | }; |
130 | 130 | ||
@@ -133,7 +133,7 @@ | |||
133 | compatible = "ns16550"; | 133 | compatible = "ns16550"; |
134 | reg = <4600 100>; | 134 | reg = <4600 100>; |
135 | clock-frequency = <0>; | 135 | clock-frequency = <0>; |
136 | interrupts = <1a 2>; | 136 | interrupts = <2a 2>; |
137 | interrupt-parent = <&mpic>; | 137 | interrupt-parent = <&mpic>; |
138 | }; | 138 | }; |
139 | 139 | ||