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authorKumar Gala <galak@kernel.crashing.org>2008-04-17 02:28:15 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-04-17 02:28:15 -0400
commit32f960e9439bbe72c45f8cd854049254122fc198 (patch)
tree7773600dbe67df8bd07b35e865a7a7c1b7a863fd /arch/powerpc/boot/dts/mpc8544ds.dts
parenta5dc66e2ab2e2cf641346b056a69a67cfcf9458c (diff)
[POWERPC] 85xx: Convert dts to v1 syntax
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8544ds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts279
1 files changed, 140 insertions, 139 deletions
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 131ffaae2b5d..e238ebb4596e 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC8544 DS Device Tree Source 2 * MPC8544 DS Device Tree Source
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor Inc. 4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -9,6 +9,7 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
12/ { 13/ {
13 model = "MPC8544DS"; 14 model = "MPC8544DS";
14 compatible = "MPC8544DS", "MPC85xxDS"; 15 compatible = "MPC8544DS", "MPC85xxDS";
@@ -27,17 +28,17 @@
27 }; 28 };
28 29
29 cpus { 30 cpus {
30 #cpus = <1>; 31 #cpus = <0x1>;
31 #address-cells = <1>; 32 #address-cells = <1>;
32 #size-cells = <0>; 33 #size-cells = <0>;
33 34
34 PowerPC,8544@0 { 35 PowerPC,8544@0 {
35 device_type = "cpu"; 36 device_type = "cpu";
36 reg = <0>; 37 reg = <0x0>;
37 d-cache-line-size = <20>; // 32 bytes 38 d-cache-line-size = <32>; // 32 bytes
38 i-cache-line-size = <20>; // 32 bytes 39 i-cache-line-size = <32>; // 32 bytes
39 d-cache-size = <8000>; // L1, 32K 40 d-cache-size = <0x8000>; // L1, 32K
40 i-cache-size = <8000>; // L1, 32K 41 i-cache-size = <0x8000>; // L1, 32K
41 timebase-frequency = <0>; 42 timebase-frequency = <0>;
42 bus-frequency = <0>; 43 bus-frequency = <0>;
43 clock-frequency = <0>; 44 clock-frequency = <0>;
@@ -46,7 +47,7 @@
46 47
47 memory { 48 memory {
48 device_type = "memory"; 49 device_type = "memory";
49 reg = <00000000 00000000>; // Filled by U-Boot 50 reg = <0x0 0x0>; // Filled by U-Boot
50 }; 51 };
51 52
52 soc8544@e0000000 { 53 soc8544@e0000000 {
@@ -54,24 +55,24 @@
54 #size-cells = <1>; 55 #size-cells = <1>;
55 device_type = "soc"; 56 device_type = "soc";
56 57
57 ranges = <00000000 e0000000 00100000>; 58 ranges = <0x0 0xe0000000 0x100000>;
58 reg = <e0000000 00001000>; // CCSRBAR 1M 59 reg = <0xe0000000 0x1000>; // CCSRBAR 1M
59 bus-frequency = <0>; // Filled out by uboot. 60 bus-frequency = <0>; // Filled out by uboot.
60 61
61 memory-controller@2000 { 62 memory-controller@2000 {
62 compatible = "fsl,8544-memory-controller"; 63 compatible = "fsl,8544-memory-controller";
63 reg = <2000 1000>; 64 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>; 65 interrupt-parent = <&mpic>;
65 interrupts = <12 2>; 66 interrupts = <18 2>;
66 }; 67 };
67 68
68 l2-cache-controller@20000 { 69 l2-cache-controller@20000 {
69 compatible = "fsl,8544-l2-cache-controller"; 70 compatible = "fsl,8544-l2-cache-controller";
70 reg = <20000 1000>; 71 reg = <0x20000 0x1000>;
71 cache-line-size = <20>; // 32 bytes 72 cache-line-size = <32>; // 32 bytes
72 cache-size = <40000>; // L2, 256K 73 cache-size = <0x40000>; // L2, 256K
73 interrupt-parent = <&mpic>; 74 interrupt-parent = <&mpic>;
74 interrupts = <10 2>; 75 interrupts = <16 2>;
75 }; 76 };
76 77
77 i2c@3000 { 78 i2c@3000 {
@@ -79,8 +80,8 @@
79 #size-cells = <0>; 80 #size-cells = <0>;
80 cell-index = <0>; 81 cell-index = <0>;
81 compatible = "fsl-i2c"; 82 compatible = "fsl-i2c";
82 reg = <3000 100>; 83 reg = <0x3000 0x100>;
83 interrupts = <2b 2>; 84 interrupts = <43 2>;
84 interrupt-parent = <&mpic>; 85 interrupt-parent = <&mpic>;
85 dfsrr; 86 dfsrr;
86 }; 87 };
@@ -90,8 +91,8 @@
90 #size-cells = <0>; 91 #size-cells = <0>;
91 cell-index = <1>; 92 cell-index = <1>;
92 compatible = "fsl-i2c"; 93 compatible = "fsl-i2c";
93 reg = <3100 100>; 94 reg = <0x3100 0x100>;
94 interrupts = <2b 2>; 95 interrupts = <43 2>;
95 interrupt-parent = <&mpic>; 96 interrupt-parent = <&mpic>;
96 dfsrr; 97 dfsrr;
97 }; 98 };
@@ -100,18 +101,18 @@
100 #address-cells = <1>; 101 #address-cells = <1>;
101 #size-cells = <0>; 102 #size-cells = <0>;
102 compatible = "fsl,gianfar-mdio"; 103 compatible = "fsl,gianfar-mdio";
103 reg = <24520 20>; 104 reg = <0x24520 0x20>;
104 105
105 phy0: ethernet-phy@0 { 106 phy0: ethernet-phy@0 {
106 interrupt-parent = <&mpic>; 107 interrupt-parent = <&mpic>;
107 interrupts = <a 1>; 108 interrupts = <10 1>;
108 reg = <0>; 109 reg = <0x0>;
109 device_type = "ethernet-phy"; 110 device_type = "ethernet-phy";
110 }; 111 };
111 phy1: ethernet-phy@1 { 112 phy1: ethernet-phy@1 {
112 interrupt-parent = <&mpic>; 113 interrupt-parent = <&mpic>;
113 interrupts = <a 1>; 114 interrupts = <10 1>;
114 reg = <1>; 115 reg = <0x1>;
115 device_type = "ethernet-phy"; 116 device_type = "ethernet-phy";
116 }; 117 };
117 }; 118 };
@@ -120,40 +121,40 @@
120 #address-cells = <1>; 121 #address-cells = <1>;
121 #size-cells = <1>; 122 #size-cells = <1>;
122 compatible = "fsl,mpc8544-dma", "fsl,eloplus-dma"; 123 compatible = "fsl,mpc8544-dma", "fsl,eloplus-dma";
123 reg = <21300 4>; 124 reg = <0x21300 0x4>;
124 ranges = <0 21100 200>; 125 ranges = <0x0 0x21100 0x200>;
125 cell-index = <0>; 126 cell-index = <0>;
126 dma-channel@0 { 127 dma-channel@0 {
127 compatible = "fsl,mpc8544-dma-channel", 128 compatible = "fsl,mpc8544-dma-channel",
128 "fsl,eloplus-dma-channel"; 129 "fsl,eloplus-dma-channel";
129 reg = <0 80>; 130 reg = <0x0 0x80>;
130 cell-index = <0>; 131 cell-index = <0>;
131 interrupt-parent = <&mpic>; 132 interrupt-parent = <&mpic>;
132 interrupts = <14 2>; 133 interrupts = <20 2>;
133 }; 134 };
134 dma-channel@80 { 135 dma-channel@80 {
135 compatible = "fsl,mpc8544-dma-channel", 136 compatible = "fsl,mpc8544-dma-channel",
136 "fsl,eloplus-dma-channel"; 137 "fsl,eloplus-dma-channel";
137 reg = <80 80>; 138 reg = <0x80 0x80>;
138 cell-index = <1>; 139 cell-index = <1>;
139 interrupt-parent = <&mpic>; 140 interrupt-parent = <&mpic>;
140 interrupts = <15 2>; 141 interrupts = <21 2>;
141 }; 142 };
142 dma-channel@100 { 143 dma-channel@100 {
143 compatible = "fsl,mpc8544-dma-channel", 144 compatible = "fsl,mpc8544-dma-channel",
144 "fsl,eloplus-dma-channel"; 145 "fsl,eloplus-dma-channel";
145 reg = <100 80>; 146 reg = <0x100 0x80>;
146 cell-index = <2>; 147 cell-index = <2>;
147 interrupt-parent = <&mpic>; 148 interrupt-parent = <&mpic>;
148 interrupts = <16 2>; 149 interrupts = <22 2>;
149 }; 150 };
150 dma-channel@180 { 151 dma-channel@180 {
151 compatible = "fsl,mpc8544-dma-channel", 152 compatible = "fsl,mpc8544-dma-channel",
152 "fsl,eloplus-dma-channel"; 153 "fsl,eloplus-dma-channel";
153 reg = <180 80>; 154 reg = <0x180 0x80>;
154 cell-index = <3>; 155 cell-index = <3>;
155 interrupt-parent = <&mpic>; 156 interrupt-parent = <&mpic>;
156 interrupts = <17 2>; 157 interrupts = <23 2>;
157 }; 158 };
158 }; 159 };
159 160
@@ -162,9 +163,9 @@
162 device_type = "network"; 163 device_type = "network";
163 model = "TSEC"; 164 model = "TSEC";
164 compatible = "gianfar"; 165 compatible = "gianfar";
165 reg = <24000 1000>; 166 reg = <0x24000 0x1000>;
166 local-mac-address = [ 00 00 00 00 00 00 ]; 167 local-mac-address = [ 00 00 00 00 00 00 ];
167 interrupts = <1d 2 1e 2 22 2>; 168 interrupts = <29 2 30 2 34 2>;
168 interrupt-parent = <&mpic>; 169 interrupt-parent = <&mpic>;
169 phy-handle = <&phy0>; 170 phy-handle = <&phy0>;
170 phy-connection-type = "rgmii-id"; 171 phy-connection-type = "rgmii-id";
@@ -175,9 +176,9 @@
175 device_type = "network"; 176 device_type = "network";
176 model = "TSEC"; 177 model = "TSEC";
177 compatible = "gianfar"; 178 compatible = "gianfar";
178 reg = <26000 1000>; 179 reg = <0x26000 0x1000>;
179 local-mac-address = [ 00 00 00 00 00 00 ]; 180 local-mac-address = [ 00 00 00 00 00 00 ];
180 interrupts = <1f 2 20 2 21 2>; 181 interrupts = <31 2 32 2 33 2>;
181 interrupt-parent = <&mpic>; 182 interrupt-parent = <&mpic>;
182 phy-handle = <&phy1>; 183 phy-handle = <&phy1>;
183 phy-connection-type = "rgmii-id"; 184 phy-connection-type = "rgmii-id";
@@ -187,9 +188,9 @@
187 cell-index = <0>; 188 cell-index = <0>;
188 device_type = "serial"; 189 device_type = "serial";
189 compatible = "ns16550"; 190 compatible = "ns16550";
190 reg = <4500 100>; 191 reg = <0x4500 0x100>;
191 clock-frequency = <0>; 192 clock-frequency = <0>;
192 interrupts = <2a 2>; 193 interrupts = <42 2>;
193 interrupt-parent = <&mpic>; 194 interrupt-parent = <&mpic>;
194 }; 195 };
195 196
@@ -197,15 +198,15 @@
197 cell-index = <1>; 198 cell-index = <1>;
198 device_type = "serial"; 199 device_type = "serial";
199 compatible = "ns16550"; 200 compatible = "ns16550";
200 reg = <4600 100>; 201 reg = <0x4600 0x100>;
201 clock-frequency = <0>; 202 clock-frequency = <0>;
202 interrupts = <2a 2>; 203 interrupts = <42 2>;
203 interrupt-parent = <&mpic>; 204 interrupt-parent = <&mpic>;
204 }; 205 };
205 206
206 global-utilities@e0000 { //global utilities block 207 global-utilities@e0000 { //global utilities block
207 compatible = "fsl,mpc8548-guts"; 208 compatible = "fsl,mpc8548-guts";
208 reg = <e0000 1000>; 209 reg = <0xe0000 0x1000>;
209 fsl,has-rstcr; 210 fsl,has-rstcr;
210 }; 211 };
211 212
@@ -214,7 +215,7 @@
214 interrupt-controller; 215 interrupt-controller;
215 #address-cells = <0>; 216 #address-cells = <0>;
216 #interrupt-cells = <2>; 217 #interrupt-cells = <2>;
217 reg = <40000 40000>; 218 reg = <0x40000 0x40000>;
218 compatible = "chrp,open-pic"; 219 compatible = "chrp,open-pic";
219 device_type = "open-pic"; 220 device_type = "open-pic";
220 big-endian; 221 big-endian;
@@ -225,32 +226,32 @@
225 cell-index = <0>; 226 cell-index = <0>;
226 compatible = "fsl,mpc8540-pci"; 227 compatible = "fsl,mpc8540-pci";
227 device_type = "pci"; 228 device_type = "pci";
228 interrupt-map-mask = <f800 0 0 7>; 229 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
229 interrupt-map = < 230 interrupt-map = <
230 231
231 /* IDSEL 0x11 J17 Slot 1 */ 232 /* IDSEL 0x11 J17 Slot 1 */
232 8800 0 0 1 &mpic 2 1 233 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1
233 8800 0 0 2 &mpic 3 1 234 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1
234 8800 0 0 3 &mpic 4 1 235 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1
235 8800 0 0 4 &mpic 1 1 236 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1
236 237
237 /* IDSEL 0x12 J16 Slot 2 */ 238 /* IDSEL 0x12 J16 Slot 2 */
238 239
239 9000 0 0 1 &mpic 3 1 240 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1
240 9000 0 0 2 &mpic 4 1 241 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1
241 9000 0 0 3 &mpic 2 1 242 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
242 9000 0 0 4 &mpic 1 1>; 243 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>;
243 244
244 interrupt-parent = <&mpic>; 245 interrupt-parent = <&mpic>;
245 interrupts = <18 2>; 246 interrupts = <24 2>;
246 bus-range = <0 ff>; 247 bus-range = <0 255>;
247 ranges = <02000000 0 c0000000 c0000000 0 20000000 248 ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
248 01000000 0 00000000 e1000000 0 00010000>; 249 0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>;
249 clock-frequency = <3f940aa>; 250 clock-frequency = <66666666>;
250 #interrupt-cells = <1>; 251 #interrupt-cells = <1>;
251 #size-cells = <2>; 252 #size-cells = <2>;
252 #address-cells = <3>; 253 #address-cells = <3>;
253 reg = <e0008000 1000>; 254 reg = <0xe0008000 0x1000>;
254 }; 255 };
255 256
256 pci1: pcie@e0009000 { 257 pci1: pcie@e0009000 {
@@ -260,33 +261,33 @@
260 #interrupt-cells = <1>; 261 #interrupt-cells = <1>;
261 #size-cells = <2>; 262 #size-cells = <2>;
262 #address-cells = <3>; 263 #address-cells = <3>;
263 reg = <e0009000 1000>; 264 reg = <0xe0009000 0x1000>;
264 bus-range = <0 ff>; 265 bus-range = <0 255>;
265 ranges = <02000000 0 80000000 80000000 0 20000000 266 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
266 01000000 0 00000000 e1010000 0 00010000>; 267 0x1000000 0x0 0x0 0xe1010000 0x0 0x10000>;
267 clock-frequency = <1fca055>; 268 clock-frequency = <33333333>;
268 interrupt-parent = <&mpic>; 269 interrupt-parent = <&mpic>;
269 interrupts = <1a 2>; 270 interrupts = <26 2>;
270 interrupt-map-mask = <f800 0 0 7>; 271 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
271 interrupt-map = < 272 interrupt-map = <
272 /* IDSEL 0x0 */ 273 /* IDSEL 0x0 */
273 0000 0 0 1 &mpic 4 1 274 0000 0x0 0x0 0x1 &mpic 0x4 0x1
274 0000 0 0 2 &mpic 5 1 275 0000 0x0 0x0 0x2 &mpic 0x5 0x1
275 0000 0 0 3 &mpic 6 1 276 0000 0x0 0x0 0x3 &mpic 0x6 0x1
276 0000 0 0 4 &mpic 7 1 277 0000 0x0 0x0 0x4 &mpic 0x7 0x1
277 >; 278 >;
278 pcie@0 { 279 pcie@0 {
279 reg = <0 0 0 0 0>; 280 reg = <0x0 0x0 0x0 0x0 0x0>;
280 #size-cells = <2>; 281 #size-cells = <2>;
281 #address-cells = <3>; 282 #address-cells = <3>;
282 device_type = "pci"; 283 device_type = "pci";
283 ranges = <02000000 0 80000000 284 ranges = <0x2000000 0x0 0x80000000
284 02000000 0 80000000 285 0x2000000 0x0 0x80000000
285 0 20000000 286 0x0 0x20000000
286 287
287 01000000 0 00000000 288 0x1000000 0x0 0x0
288 01000000 0 00000000 289 0x1000000 0x0 0x0
289 0 00010000>; 290 0x0 0x10000>;
290 }; 291 };
291 }; 292 };
292 293
@@ -297,33 +298,33 @@
297 #interrupt-cells = <1>; 298 #interrupt-cells = <1>;
298 #size-cells = <2>; 299 #size-cells = <2>;
299 #address-cells = <3>; 300 #address-cells = <3>;
300 reg = <e000a000 1000>; 301 reg = <0xe000a000 0x1000>;
301 bus-range = <0 ff>; 302 bus-range = <0 255>;
302 ranges = <02000000 0 a0000000 a0000000 0 10000000 303 ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
303 01000000 0 00000000 e1020000 0 00010000>; 304 0x1000000 0x0 0x0 0xe1020000 0x0 0x10000>;
304 clock-frequency = <1fca055>; 305 clock-frequency = <33333333>;
305 interrupt-parent = <&mpic>; 306 interrupt-parent = <&mpic>;
306 interrupts = <19 2>; 307 interrupts = <25 2>;
307 interrupt-map-mask = <f800 0 0 7>; 308 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
308 interrupt-map = < 309 interrupt-map = <
309 /* IDSEL 0x0 */ 310 /* IDSEL 0x0 */
310 0000 0 0 1 &mpic 0 1 311 0000 0x0 0x0 0x1 &mpic 0x0 0x1
311 0000 0 0 2 &mpic 1 1 312 0000 0x0 0x0 0x2 &mpic 0x1 0x1
312 0000 0 0 3 &mpic 2 1 313 0000 0x0 0x0 0x3 &mpic 0x2 0x1
313 0000 0 0 4 &mpic 3 1 314 0000 0x0 0x0 0x4 &mpic 0x3 0x1
314 >; 315 >;
315 pcie@0 { 316 pcie@0 {
316 reg = <0 0 0 0 0>; 317 reg = <0x0 0x0 0x0 0x0 0x0>;
317 #size-cells = <2>; 318 #size-cells = <2>;
318 #address-cells = <3>; 319 #address-cells = <3>;
319 device_type = "pci"; 320 device_type = "pci";
320 ranges = <02000000 0 a0000000 321 ranges = <0x2000000 0x0 0xa0000000
321 02000000 0 a0000000 322 0x2000000 0x0 0xa0000000
322 0 10000000 323 0x0 0x10000000
323 324
324 01000000 0 00000000 325 0x1000000 0x0 0x0
325 01000000 0 00000000 326 0x1000000 0x0 0x0
326 0 00010000>; 327 0x0 0x10000>;
327 }; 328 };
328 }; 329 };
329 330
@@ -334,72 +335,72 @@
334 #interrupt-cells = <1>; 335 #interrupt-cells = <1>;
335 #size-cells = <2>; 336 #size-cells = <2>;
336 #address-cells = <3>; 337 #address-cells = <3>;
337 reg = <e000b000 1000>; 338 reg = <0xe000b000 0x1000>;
338 bus-range = <0 ff>; 339 bus-range = <0 255>;
339 ranges = <02000000 0 b0000000 b0000000 0 00100000 340 ranges = <0x2000000 0x0 0xb0000000 0xb0000000 0x0 0x100000
340 01000000 0 00000000 b0100000 0 00100000>; 341 0x1000000 0x0 0x0 0xb0100000 0x0 0x100000>;
341 clock-frequency = <1fca055>; 342 clock-frequency = <33333333>;
342 interrupt-parent = <&mpic>; 343 interrupt-parent = <&mpic>;
343 interrupts = <1b 2>; 344 interrupts = <27 2>;
344 interrupt-map-mask = <ff00 0 0 1>; 345 interrupt-map-mask = <0xff00 0x0 0x0 0x1>;
345 interrupt-map = < 346 interrupt-map = <
346 // IDSEL 0x1c USB 347 // IDSEL 0x1c USB
347 e000 0 0 1 &i8259 c 2 348 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
348 e100 0 0 2 &i8259 9 2 349 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
349 e200 0 0 3 &i8259 a 2 350 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
350 e300 0 0 4 &i8259 b 2 351 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
351 352
352 // IDSEL 0x1d Audio 353 // IDSEL 0x1d Audio
353 e800 0 0 1 &i8259 6 2 354 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
354 355
355 // IDSEL 0x1e Legacy 356 // IDSEL 0x1e Legacy
356 f000 0 0 1 &i8259 7 2 357 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
357 f100 0 0 1 &i8259 7 2 358 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
358 359
359 // IDSEL 0x1f IDE/SATA 360 // IDSEL 0x1f IDE/SATA
360 f800 0 0 1 &i8259 e 2 361 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
361 f900 0 0 1 &i8259 5 2 362 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
362 >; 363 >;
363 364
364 pcie@0 { 365 pcie@0 {
365 reg = <0 0 0 0 0>; 366 reg = <0x0 0x0 0x0 0x0 0x0>;
366 #size-cells = <2>; 367 #size-cells = <2>;
367 #address-cells = <3>; 368 #address-cells = <3>;
368 device_type = "pci"; 369 device_type = "pci";
369 ranges = <02000000 0 b0000000 370 ranges = <0x2000000 0x0 0xb0000000
370 02000000 0 b0000000 371 0x2000000 0x0 0xb0000000
371 0 00100000 372 0x0 0x100000
372 373
373 01000000 0 00000000 374 0x1000000 0x0 0x0
374 01000000 0 00000000 375 0x1000000 0x0 0x0
375 0 00100000>; 376 0x0 0x100000>;
376 377
377 uli1575@0 { 378 uli1575@0 {
378 reg = <0 0 0 0 0>; 379 reg = <0x0 0x0 0x0 0x0 0x0>;
379 #size-cells = <2>; 380 #size-cells = <2>;
380 #address-cells = <3>; 381 #address-cells = <3>;
381 ranges = <02000000 0 b0000000 382 ranges = <0x2000000 0x0 0xb0000000
382 02000000 0 b0000000 383 0x2000000 0x0 0xb0000000
383 0 00100000 384 0x0 0x100000
384 385
385 01000000 0 00000000 386 0x1000000 0x0 0x0
386 01000000 0 00000000 387 0x1000000 0x0 0x0
387 0 00100000>; 388 0x0 0x100000>;
388 isa@1e { 389 isa@1e {
389 device_type = "isa"; 390 device_type = "isa";
390 #interrupt-cells = <2>; 391 #interrupt-cells = <2>;
391 #size-cells = <1>; 392 #size-cells = <1>;
392 #address-cells = <2>; 393 #address-cells = <2>;
393 reg = <f000 0 0 0 0>; 394 reg = <0xf000 0x0 0x0 0x0 0x0>;
394 ranges = <1 0 395 ranges = <0x1 0x0
395 01000000 0 0 396 0x1000000 0x0 0x0
396 00001000>; 397 0x1000>;
397 interrupt-parent = <&i8259>; 398 interrupt-parent = <&i8259>;
398 399
399 i8259: interrupt-controller@20 { 400 i8259: interrupt-controller@20 {
400 reg = <1 20 2 401 reg = <0x1 0x20 0x2
401 1 a0 2 402 0x1 0xa0 0x2
402 1 4d0 2>; 403 0x1 0x4d0 0x2>;
403 interrupt-controller; 404 interrupt-controller;
404 device_type = "interrupt-controller"; 405 device_type = "interrupt-controller";
405 #address-cells = <0>; 406 #address-cells = <0>;
@@ -412,28 +413,28 @@
412 i8042@60 { 413 i8042@60 {
413 #size-cells = <0>; 414 #size-cells = <0>;
414 #address-cells = <1>; 415 #address-cells = <1>;
415 reg = <1 60 1 1 64 1>; 416 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
416 interrupts = <1 3 c 3>; 417 interrupts = <1 3 12 3>;
417 interrupt-parent = <&i8259>; 418 interrupt-parent = <&i8259>;
418 419
419 keyboard@0 { 420 keyboard@0 {
420 reg = <0>; 421 reg = <0x0>;
421 compatible = "pnpPNP,303"; 422 compatible = "pnpPNP,303";
422 }; 423 };
423 424
424 mouse@1 { 425 mouse@1 {
425 reg = <1>; 426 reg = <0x1>;
426 compatible = "pnpPNP,f03"; 427 compatible = "pnpPNP,f03";
427 }; 428 };
428 }; 429 };
429 430
430 rtc@70 { 431 rtc@70 {
431 compatible = "pnpPNP,b00"; 432 compatible = "pnpPNP,b00";
432 reg = <1 70 2>; 433 reg = <0x1 0x70 0x2>;
433 }; 434 };
434 435
435 gpio@400 { 436 gpio@400 {
436 reg = <1 400 80>; 437 reg = <0x1 0x400 0x80>;
437 }; 438 };
438 }; 439 };
439 }; 440 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-04 06:25:37 -0500