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authorKumar Gala <galak@kernel.crashing.org>2007-07-03 03:35:35 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-07-03 03:35:35 -0400
commitb533f8ae796d1ee0289bf04d4f1e72c02ad4a17d (patch)
tree4bec480194b251e18fee511df1cf4840a1995c88 /arch/powerpc/boot/dts/mpc8540ads.dts
parenteae98266e78e5659d75dbb62b4601960c15c7830 (diff)
[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips
Make the interrupt numbers match the OpenPIC spec intead of the Freescale docs which distinguish between internal and external interrupts. Now we can use the interrupt number directly to find the register offset associated with it. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8540ads.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts120
1 files changed, 60 insertions, 60 deletions
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 78828b239d0e..364a969f5c2f 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -52,7 +52,7 @@
52 compatible = "fsl,8540-memory-controller"; 52 compatible = "fsl,8540-memory-controller";
53 reg = <2000 1000>; 53 reg = <2000 1000>;
54 interrupt-parent = <&mpic>; 54 interrupt-parent = <&mpic>;
55 interrupts = <2 2>; 55 interrupts = <12 2>;
56 }; 56 };
57 57
58 l2-cache-controller@20000 { 58 l2-cache-controller@20000 {
@@ -61,14 +61,14 @@
61 cache-line-size = <20>; // 32 bytes 61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K 62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>; 63 interrupt-parent = <&mpic>;
64 interrupts = <0 2>; 64 interrupts = <10 2>;
65 }; 65 };
66 66
67 i2c@3000 { 67 i2c@3000 {
68 device_type = "i2c"; 68 device_type = "i2c";
69 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
70 reg = <3000 100>; 70 reg = <3000 100>;
71 interrupts = <1b 2>; 71 interrupts = <2b 2>;
72 interrupt-parent = <&mpic>; 72 interrupt-parent = <&mpic>;
73 dfsrr; 73 dfsrr;
74 }; 74 };
@@ -81,19 +81,19 @@
81 reg = <24520 20>; 81 reg = <24520 20>;
82 phy0: ethernet-phy@0 { 82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
84 interrupts = <35 1>; 84 interrupts = <5 1>;
85 reg = <0>; 85 reg = <0>;
86 device_type = "ethernet-phy"; 86 device_type = "ethernet-phy";
87 }; 87 };
88 phy1: ethernet-phy@1 { 88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>; 89 interrupt-parent = <&mpic>;
90 interrupts = <35 1>; 90 interrupts = <5 1>;
91 reg = <1>; 91 reg = <1>;
92 device_type = "ethernet-phy"; 92 device_type = "ethernet-phy";
93 }; 93 };
94 phy3: ethernet-phy@3 { 94 phy3: ethernet-phy@3 {
95 interrupt-parent = <&mpic>; 95 interrupt-parent = <&mpic>;
96 interrupts = <37 1>; 96 interrupts = <7 1>;
97 reg = <3>; 97 reg = <3>;
98 device_type = "ethernet-phy"; 98 device_type = "ethernet-phy";
99 }; 99 };
@@ -113,7 +113,7 @@
113 */ 113 */
114 address = [ 00 00 00 00 00 00 ]; 114 address = [ 00 00 00 00 00 00 ];
115 local-mac-address = [ 00 00 00 00 00 00 ]; 115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <d 2 e 2 12 2>; 116 interrupts = <1d 2 1e 2 22 2>;
117 interrupt-parent = <&mpic>; 117 interrupt-parent = <&mpic>;
118 phy-handle = <&phy0>; 118 phy-handle = <&phy0>;
119 }; 119 };
@@ -132,7 +132,7 @@
132 */ 132 */
133 address = [ 00 00 00 00 00 00 ]; 133 address = [ 00 00 00 00 00 00 ];
134 local-mac-address = [ 00 00 00 00 00 00 ]; 134 local-mac-address = [ 00 00 00 00 00 00 ];
135 interrupts = <13 2 14 2 18 2>; 135 interrupts = <23 2 24 2 28 2>;
136 interrupt-parent = <&mpic>; 136 interrupt-parent = <&mpic>;
137 phy-handle = <&phy1>; 137 phy-handle = <&phy1>;
138 }; 138 };
@@ -151,7 +151,7 @@
151 */ 151 */
152 address = [ 00 00 00 00 00 00 ]; 152 address = [ 00 00 00 00 00 00 ];
153 local-mac-address = [ 00 00 00 00 00 00 ]; 153 local-mac-address = [ 00 00 00 00 00 00 ];
154 interrupts = <19 2>; 154 interrupts = <29 2>;
155 interrupt-parent = <&mpic>; 155 interrupt-parent = <&mpic>;
156 phy-handle = <&phy3>; 156 phy-handle = <&phy3>;
157 }; 157 };
@@ -161,7 +161,7 @@
161 compatible = "ns16550"; 161 compatible = "ns16550";
162 reg = <4500 100>; // reg base, size 162 reg = <4500 100>; // reg base, size
163 clock-frequency = <0>; // should we fill in in uboot? 163 clock-frequency = <0>; // should we fill in in uboot?
164 interrupts = <1a 2>; 164 interrupts = <2a 2>;
165 interrupt-parent = <&mpic>; 165 interrupt-parent = <&mpic>;
166 }; 166 };
167 167
@@ -170,7 +170,7 @@
170 compatible = "ns16550"; 170 compatible = "ns16550";
171 reg = <4600 100>; // reg base, size 171 reg = <4600 100>; // reg base, size
172 clock-frequency = <0>; // should we fill in in uboot? 172 clock-frequency = <0>; // should we fill in in uboot?
173 interrupts = <1a 2>; 173 interrupts = <2a 2>;
174 interrupt-parent = <&mpic>; 174 interrupt-parent = <&mpic>;
175 }; 175 };
176 pci@8000 { 176 pci@8000 {
@@ -178,78 +178,78 @@
178 interrupt-map = < 178 interrupt-map = <
179 179
180 /* IDSEL 0x02 */ 180 /* IDSEL 0x02 */
181 1000 0 0 1 &mpic 31 1 181 1000 0 0 1 &mpic 1 1
182 1000 0 0 2 &mpic 32 1 182 1000 0 0 2 &mpic 2 1
183 1000 0 0 3 &mpic 33 1 183 1000 0 0 3 &mpic 3 1
184 1000 0 0 4 &mpic 34 1 184 1000 0 0 4 &mpic 4 1
185 185
186 /* IDSEL 0x03 */ 186 /* IDSEL 0x03 */
187 1800 0 0 1 &mpic 34 1 187 1800 0 0 1 &mpic 4 1
188 1800 0 0 2 &mpic 31 1 188 1800 0 0 2 &mpic 1 1
189 1800 0 0 3 &mpic 32 1 189 1800 0 0 3 &mpic 2 1
190 1800 0 0 4 &mpic 33 1 190 1800 0 0 4 &mpic 3 1
191 191
192 /* IDSEL 0x04 */ 192 /* IDSEL 0x04 */
193 2000 0 0 1 &mpic 33 1 193 2000 0 0 1 &mpic 3 1
194 2000 0 0 2 &mpic 34 1 194 2000 0 0 2 &mpic 4 1
195 2000 0 0 3 &mpic 31 1 195 2000 0 0 3 &mpic 1 1
196 2000 0 0 4 &mpic 32 1 196 2000 0 0 4 &mpic 2 1
197 197
198 /* IDSEL 0x05 */ 198 /* IDSEL 0x05 */
199 2800 0 0 1 &mpic 32 1 199 2800 0 0 1 &mpic 2 1
200 2800 0 0 2 &mpic 33 1 200 2800 0 0 2 &mpic 3 1
201 2800 0 0 3 &mpic 34 1 201 2800 0 0 3 &mpic 4 1
202 2800 0 0 4 &mpic 31 1 202 2800 0 0 4 &mpic 1 1
203 203
204 /* IDSEL 0x0c */ 204 /* IDSEL 0x0c */
205 6000 0 0 1 &mpic 31 1 205 6000 0 0 1 &mpic 1 1
206 6000 0 0 2 &mpic 32 1 206 6000 0 0 2 &mpic 2 1
207 6000 0 0 3 &mpic 33 1 207 6000 0 0 3 &mpic 3 1
208 6000 0 0 4 &mpic 34 1 208 6000 0 0 4 &mpic 4 1
209 209
210 /* IDSEL 0x0d */ 210 /* IDSEL 0x0d */
211 6800 0 0 1 &mpic 34 1 211 6800 0 0 1 &mpic 4 1
212 6800 0 0 2 &mpic 31 1 212 6800 0 0 2 &mpic 1 1
213 6800 0 0 3 &mpic 32 1 213 6800 0 0 3 &mpic 2 1
214 6800 0 0 4 &mpic 33 1 214 6800 0 0 4 &mpic 3 1
215 215
216 /* IDSEL 0x0e */ 216 /* IDSEL 0x0e */
217 7000 0 0 1 &mpic 33 1 217 7000 0 0 1 &mpic 3 1
218 7000 0 0 2 &mpic 34 1 218 7000 0 0 2 &mpic 4 1
219 7000 0 0 3 &mpic 31 1 219 7000 0 0 3 &mpic 1 1
220 7000 0 0 4 &mpic 32 1 220 7000 0 0 4 &mpic 2 1
221 221
222 /* IDSEL 0x0f */ 222 /* IDSEL 0x0f */
223 7800 0 0 1 &mpic 32 1 223 7800 0 0 1 &mpic 2 1
224 7800 0 0 2 &mpic 33 1 224 7800 0 0 2 &mpic 3 1
225 7800 0 0 3 &mpic 34 1 225 7800 0 0 3 &mpic 4 1
226 7800 0 0 4 &mpic 31 1 226 7800 0 0 4 &mpic 1 1
227 227
228 /* IDSEL 0x12 */ 228 /* IDSEL 0x12 */
229 9000 0 0 1 &mpic 31 1 229 9000 0 0 1 &mpic 1 1
230 9000 0 0 2 &mpic 32 1 230 9000 0 0 2 &mpic 2 1
231 9000 0 0 3 &mpic 33 1 231 9000 0 0 3 &mpic 3 1
232 9000 0 0 4 &mpic 34 1 232 9000 0 0 4 &mpic 4 1
233 233
234 /* IDSEL 0x13 */ 234 /* IDSEL 0x13 */
235 9800 0 0 1 &mpic 34 1 235 9800 0 0 1 &mpic 4 1
236 9800 0 0 2 &mpic 31 1 236 9800 0 0 2 &mpic 1 1
237 9800 0 0 3 &mpic 32 1 237 9800 0 0 3 &mpic 2 1
238 9800 0 0 4 &mpic 33 1 238 9800 0 0 4 &mpic 3 1
239 239
240 /* IDSEL 0x14 */ 240 /* IDSEL 0x14 */
241 a000 0 0 1 &mpic 33 1 241 a000 0 0 1 &mpic 3 1
242 a000 0 0 2 &mpic 34 1 242 a000 0 0 2 &mpic 4 1
243 a000 0 0 3 &mpic 31 1 243 a000 0 0 3 &mpic 1 1
244 a000 0 0 4 &mpic 32 1 244 a000 0 0 4 &mpic 2 1
245 245
246 /* IDSEL 0x15 */ 246 /* IDSEL 0x15 */
247 a800 0 0 1 &mpic 32 1 247 a800 0 0 1 &mpic 2 1
248 a800 0 0 2 &mpic 33 1 248 a800 0 0 2 &mpic 3 1
249 a800 0 0 3 &mpic 34 1 249 a800 0 0 3 &mpic 4 1
250 a800 0 0 4 &mpic 31 1>; 250 a800 0 0 4 &mpic 1 1>;
251 interrupt-parent = <&mpic>; 251 interrupt-parent = <&mpic>;
252 interrupts = <08 2>; 252 interrupts = <18 2>;
253 bus-range = <0 0>; 253 bus-range = <0 0>;
254 ranges = <02000000 0 80000000 80000000 0 20000000 254 ranges = <02000000 0 80000000 80000000 0 20000000
255 01000000 0 00000000 e2000000 0 00100000>; 255 01000000 0 00000000 e2000000 0 00100000>;