diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-09-12 12:52:31 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-09-14 09:53:16 -0400 |
commit | f0c8ac8083cbd9347b398bfddcca20f1e2786016 (patch) | |
tree | 7fb8b26ef9242dfba1db898a476437ed234f7989 /arch/powerpc/boot/dts/mpc8540ads.dts | |
parent | 5d54ddcbcf931bf07cd1ce262bda4674ebd1427f (diff) |
[POWERPC] DTS cleanup
Removed the following cruft from .dts files:
* 32-bit in cpu node -- doesn't exist in any spec and not used by kernel
* removed built-in (chrp legacy)
* Removed #interrupt-cells in places they don't need to be set
* Fixed ranges on lite5200*
* Removed clock-frequency from i8259 pic node, not sure where this came from
* Removed big-endian from i8259 pic nodes, this was just bogus
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8540ads.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc8540ads.dts | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index fc8dff9f6201..e038c04b4220 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -30,7 +30,6 @@ | |||
30 | timebase-frequency = <0>; // 33 MHz, from uboot | 30 | timebase-frequency = <0>; // 33 MHz, from uboot |
31 | bus-frequency = <0>; // 166 MHz | 31 | bus-frequency = <0>; // 166 MHz |
32 | clock-frequency = <0>; // 825 MHz, from uboot | 32 | clock-frequency = <0>; // 825 MHz, from uboot |
33 | 32-bit; | ||
34 | }; | 33 | }; |
35 | }; | 34 | }; |
36 | 35 | ||
@@ -42,7 +41,6 @@ | |||
42 | soc8540@e0000000 { | 41 | soc8540@e0000000 { |
43 | #address-cells = <1>; | 42 | #address-cells = <1>; |
44 | #size-cells = <1>; | 43 | #size-cells = <1>; |
45 | #interrupt-cells = <2>; | ||
46 | device_type = "soc"; | 44 | device_type = "soc"; |
47 | ranges = <0 e0000000 00100000>; | 45 | ranges = <0 e0000000 00100000>; |
48 | reg = <e0000000 00100000>; // CCSRBAR 1M | 46 | reg = <e0000000 00100000>; // CCSRBAR 1M |
@@ -268,7 +266,6 @@ | |||
268 | #address-cells = <0>; | 266 | #address-cells = <0>; |
269 | #interrupt-cells = <2>; | 267 | #interrupt-cells = <2>; |
270 | reg = <40000 40000>; | 268 | reg = <40000 40000>; |
271 | built-in; | ||
272 | compatible = "chrp,open-pic"; | 269 | compatible = "chrp,open-pic"; |
273 | device_type = "open-pic"; | 270 | device_type = "open-pic"; |
274 | big-endian; | 271 | big-endian; |