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authorKumar Gala <galak@kernel.crashing.org>2011-11-28 14:58:53 -0500
committerKumar Gala <galak@kernel.crashing.org>2012-01-04 16:38:40 -0500
commitf706bed1144e0fdad2b583549fc366afd4a1e9f1 (patch)
tree99a81eb38dd583b9a3be69dbb26c1f48422ee194 /arch/powerpc/boot/dts/mpc8377_wlan.dts
parent0725696306b10e125191ae772c7f19eca88f2ca1 (diff)
powerpc/fsl: update compatiable on fsl 16550 uart nodes
The Freescale serial port's are pretty much a 16550, however there are some FSL specific bugs and features. Add a "fsl,ns16550" compatiable string to allow code to handle those FSL specific issues. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8377_wlan.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8377_wlan.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/boot/dts/mpc8377_wlan.dts b/arch/powerpc/boot/dts/mpc8377_wlan.dts
index 9ea783056969..ef4a305a0d0c 100644
--- a/arch/powerpc/boot/dts/mpc8377_wlan.dts
+++ b/arch/powerpc/boot/dts/mpc8377_wlan.dts
@@ -304,7 +304,7 @@
304 serial0: serial@4500 { 304 serial0: serial@4500 {
305 cell-index = <0>; 305 cell-index = <0>;
306 device_type = "serial"; 306 device_type = "serial";
307 compatible = "ns16550"; 307 compatible = "fsl,ns16550", "ns16550";
308 reg = <0x4500 0x100>; 308 reg = <0x4500 0x100>;
309 clock-frequency = <0>; 309 clock-frequency = <0>;
310 interrupts = <9 0x8>; 310 interrupts = <9 0x8>;
@@ -314,7 +314,7 @@
314 serial1: serial@4600 { 314 serial1: serial@4600 {
315 cell-index = <1>; 315 cell-index = <1>;
316 device_type = "serial"; 316 device_type = "serial";
317 compatible = "ns16550"; 317 compatible = "fsl,ns16550", "ns16550";
318 reg = <0x4600 0x100>; 318 reg = <0x4600 0x100>;
319 clock-frequency = <0>; 319 clock-frequency = <0>;
320 interrupts = <10 0x8>; 320 interrupts = <10 0x8>;