diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2007-02-16 10:57:22 -0500 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2007-02-16 11:10:52 -0500 |
commit | d71a1dc62b0380ab9c4022dcba02775a791c3d7e (patch) | |
tree | c1e15f94082f0e44986a5c6254a39c1bed978076 /arch/powerpc/boot/dts/mpc834x_mds.dts | |
parent | a32525449b30dfbae804f6b05cde041f35f5a811 (diff) |
[POWERPC] 83xx: Cleaned up 83xx platform dts files
* Fixed up top level compatible property for all boards
* Removed explicit linux,phandle usage. Use references and labels now
* Fixed interrupt sense attribute, some interrupts were marked edge, that are level
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc834x_mds.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc834x_mds.dts | 164 |
1 files changed, 80 insertions, 84 deletions
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index dc121b3cb4a9..e4b43c24bc0b 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts | |||
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | / { | 12 | / { |
13 | model = "MPC8349EMDS"; | 13 | model = "MPC8349EMDS"; |
14 | compatible = "MPC834xMDS"; | 14 | compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS"; |
15 | #address-cells = <1>; | 15 | #address-cells = <1>; |
16 | #size-cells = <1>; | 16 | #size-cells = <1>; |
17 | 17 | ||
@@ -64,7 +64,7 @@ | |||
64 | compatible = "fsl-i2c"; | 64 | compatible = "fsl-i2c"; |
65 | reg = <3000 100>; | 65 | reg = <3000 100>; |
66 | interrupts = <e 8>; | 66 | interrupts = <e 8>; |
67 | interrupt-parent = <700>; | 67 | interrupt-parent = < &ipic >; |
68 | dfsrr; | 68 | dfsrr; |
69 | }; | 69 | }; |
70 | 70 | ||
@@ -73,7 +73,7 @@ | |||
73 | compatible = "fsl-i2c"; | 73 | compatible = "fsl-i2c"; |
74 | reg = <3100 100>; | 74 | reg = <3100 100>; |
75 | interrupts = <f 8>; | 75 | interrupts = <f 8>; |
76 | interrupt-parent = <700>; | 76 | interrupt-parent = < &ipic >; |
77 | dfsrr; | 77 | dfsrr; |
78 | }; | 78 | }; |
79 | 79 | ||
@@ -82,7 +82,7 @@ | |||
82 | compatible = "mpc83xx_spi"; | 82 | compatible = "mpc83xx_spi"; |
83 | reg = <7000 1000>; | 83 | reg = <7000 1000>; |
84 | interrupts = <10 8>; | 84 | interrupts = <10 8>; |
85 | interrupt-parent = <700>; | 85 | interrupt-parent = < &ipic >; |
86 | mode = <0>; | 86 | mode = <0>; |
87 | }; | 87 | }; |
88 | 88 | ||
@@ -94,8 +94,8 @@ | |||
94 | reg = <22000 1000>; | 94 | reg = <22000 1000>; |
95 | #address-cells = <1>; | 95 | #address-cells = <1>; |
96 | #size-cells = <0>; | 96 | #size-cells = <0>; |
97 | interrupt-parent = <700>; | 97 | interrupt-parent = < &ipic >; |
98 | interrupts = <27 2>; | 98 | interrupts = <27 8>; |
99 | phy_type = "ulpi"; | 99 | phy_type = "ulpi"; |
100 | port1; | 100 | port1; |
101 | }; | 101 | }; |
@@ -106,8 +106,8 @@ | |||
106 | reg = <23000 1000>; | 106 | reg = <23000 1000>; |
107 | #address-cells = <1>; | 107 | #address-cells = <1>; |
108 | #size-cells = <0>; | 108 | #size-cells = <0>; |
109 | interrupt-parent = <700>; | 109 | interrupt-parent = < &ipic >; |
110 | interrupts = <26 2>; | 110 | interrupts = <26 8>; |
111 | dr_mode = "otg"; | 111 | dr_mode = "otg"; |
112 | phy_type = "ulpi"; | 112 | phy_type = "ulpi"; |
113 | }; | 113 | }; |
@@ -118,18 +118,15 @@ | |||
118 | reg = <24520 20>; | 118 | reg = <24520 20>; |
119 | #address-cells = <1>; | 119 | #address-cells = <1>; |
120 | #size-cells = <0>; | 120 | #size-cells = <0>; |
121 | linux,phandle = <24520>; | 121 | phy0: ethernet-phy@0 { |
122 | ethernet-phy@0 { | 122 | interrupt-parent = < &ipic >; |
123 | linux,phandle = <2452000>; | 123 | interrupts = <11 8>; |
124 | interrupt-parent = <700>; | ||
125 | interrupts = <11 2>; | ||
126 | reg = <0>; | 124 | reg = <0>; |
127 | device_type = "ethernet-phy"; | 125 | device_type = "ethernet-phy"; |
128 | }; | 126 | }; |
129 | ethernet-phy@1 { | 127 | phy1: ethernet-phy@1 { |
130 | linux,phandle = <2452001>; | 128 | interrupt-parent = < &ipic >; |
131 | interrupt-parent = <700>; | 129 | interrupts = <12 8>; |
132 | interrupts = <12 2>; | ||
133 | reg = <1>; | 130 | reg = <1>; |
134 | device_type = "ethernet-phy"; | 131 | device_type = "ethernet-phy"; |
135 | }; | 132 | }; |
@@ -143,8 +140,8 @@ | |||
143 | address = [ 00 00 00 00 00 00 ]; | 140 | address = [ 00 00 00 00 00 00 ]; |
144 | local-mac-address = [ 00 00 00 00 00 00 ]; | 141 | local-mac-address = [ 00 00 00 00 00 00 ]; |
145 | interrupts = <20 8 21 8 22 8>; | 142 | interrupts = <20 8 21 8 22 8>; |
146 | interrupt-parent = <700>; | 143 | interrupt-parent = < &ipic >; |
147 | phy-handle = <2452000>; | 144 | phy-handle = < &phy0 >; |
148 | }; | 145 | }; |
149 | 146 | ||
150 | ethernet@25000 { | 147 | ethernet@25000 { |
@@ -157,8 +154,8 @@ | |||
157 | address = [ 00 00 00 00 00 00 ]; | 154 | address = [ 00 00 00 00 00 00 ]; |
158 | local-mac-address = [ 00 00 00 00 00 00 ]; | 155 | local-mac-address = [ 00 00 00 00 00 00 ]; |
159 | interrupts = <23 8 24 8 25 8>; | 156 | interrupts = <23 8 24 8 25 8>; |
160 | interrupt-parent = <700>; | 157 | interrupt-parent = < &ipic >; |
161 | phy-handle = <2452001>; | 158 | phy-handle = < &phy1 >; |
162 | }; | 159 | }; |
163 | 160 | ||
164 | serial@4500 { | 161 | serial@4500 { |
@@ -167,7 +164,7 @@ | |||
167 | reg = <4500 100>; | 164 | reg = <4500 100>; |
168 | clock-frequency = <0>; | 165 | clock-frequency = <0>; |
169 | interrupts = <9 8>; | 166 | interrupts = <9 8>; |
170 | interrupt-parent = <700>; | 167 | interrupt-parent = < &ipic >; |
171 | }; | 168 | }; |
172 | 169 | ||
173 | serial@4600 { | 170 | serial@4600 { |
@@ -176,7 +173,7 @@ | |||
176 | reg = <4600 100>; | 173 | reg = <4600 100>; |
177 | clock-frequency = <0>; | 174 | clock-frequency = <0>; |
178 | interrupts = <a 8>; | 175 | interrupts = <a 8>; |
179 | interrupt-parent = <700>; | 176 | interrupt-parent = < &ipic >; |
180 | }; | 177 | }; |
181 | 178 | ||
182 | pci@8500 { | 179 | pci@8500 { |
@@ -184,47 +181,47 @@ | |||
184 | interrupt-map = < | 181 | interrupt-map = < |
185 | 182 | ||
186 | /* IDSEL 0x11 */ | 183 | /* IDSEL 0x11 */ |
187 | 8800 0 0 1 700 14 8 | 184 | 8800 0 0 1 &ipic 14 8 |
188 | 8800 0 0 2 700 15 8 | 185 | 8800 0 0 2 &ipic 15 8 |
189 | 8800 0 0 3 700 16 8 | 186 | 8800 0 0 3 &ipic 16 8 |
190 | 8800 0 0 4 700 17 8 | 187 | 8800 0 0 4 &ipic 17 8 |
191 | 188 | ||
192 | /* IDSEL 0x12 */ | 189 | /* IDSEL 0x12 */ |
193 | 9000 0 0 1 700 16 8 | 190 | 9000 0 0 1 &ipic 16 8 |
194 | 9000 0 0 2 700 17 8 | 191 | 9000 0 0 2 &ipic 17 8 |
195 | 9000 0 0 3 700 14 8 | 192 | 9000 0 0 3 &ipic 14 8 |
196 | 9000 0 0 4 700 15 8 | 193 | 9000 0 0 4 &ipic 15 8 |
197 | 194 | ||
198 | /* IDSEL 0x13 */ | 195 | /* IDSEL 0x13 */ |
199 | 9800 0 0 1 700 17 8 | 196 | 9800 0 0 1 &ipic 17 8 |
200 | 9800 0 0 2 700 14 8 | 197 | 9800 0 0 2 &ipic 14 8 |
201 | 9800 0 0 3 700 15 8 | 198 | 9800 0 0 3 &ipic 15 8 |
202 | 9800 0 0 4 700 16 8 | 199 | 9800 0 0 4 &ipic 16 8 |
203 | 200 | ||
204 | /* IDSEL 0x15 */ | 201 | /* IDSEL 0x15 */ |
205 | a800 0 0 1 700 14 8 | 202 | a800 0 0 1 &ipic 14 8 |
206 | a800 0 0 2 700 15 8 | 203 | a800 0 0 2 &ipic 15 8 |
207 | a800 0 0 3 700 16 8 | 204 | a800 0 0 3 &ipic 16 8 |
208 | a800 0 0 4 700 17 8 | 205 | a800 0 0 4 &ipic 17 8 |
209 | 206 | ||
210 | /* IDSEL 0x16 */ | 207 | /* IDSEL 0x16 */ |
211 | b000 0 0 1 700 17 8 | 208 | b000 0 0 1 &ipic 17 8 |
212 | b000 0 0 2 700 14 8 | 209 | b000 0 0 2 &ipic 14 8 |
213 | b000 0 0 3 700 15 8 | 210 | b000 0 0 3 &ipic 15 8 |
214 | b000 0 0 4 700 16 8 | 211 | b000 0 0 4 &ipic 16 8 |
215 | 212 | ||
216 | /* IDSEL 0x17 */ | 213 | /* IDSEL 0x17 */ |
217 | b800 0 0 1 700 16 8 | 214 | b800 0 0 1 &ipic 16 8 |
218 | b800 0 0 2 700 17 8 | 215 | b800 0 0 2 &ipic 17 8 |
219 | b800 0 0 3 700 14 8 | 216 | b800 0 0 3 &ipic 14 8 |
220 | b800 0 0 4 700 15 8 | 217 | b800 0 0 4 &ipic 15 8 |
221 | 218 | ||
222 | /* IDSEL 0x18 */ | 219 | /* IDSEL 0x18 */ |
223 | c000 0 0 1 700 15 8 | 220 | c000 0 0 1 &ipic 15 8 |
224 | c000 0 0 2 700 16 8 | 221 | c000 0 0 2 &ipic 16 8 |
225 | c000 0 0 3 700 17 8 | 222 | c000 0 0 3 &ipic 17 8 |
226 | c000 0 0 4 700 14 8>; | 223 | c000 0 0 4 &ipic 14 8>; |
227 | interrupt-parent = <700>; | 224 | interrupt-parent = < &ipic >; |
228 | interrupts = <42 8>; | 225 | interrupts = <42 8>; |
229 | bus-range = <0 0>; | 226 | bus-range = <0 0>; |
230 | ranges = <02000000 0 a0000000 a0000000 0 10000000 | 227 | ranges = <02000000 0 a0000000 a0000000 0 10000000 |
@@ -244,47 +241,47 @@ | |||
244 | interrupt-map = < | 241 | interrupt-map = < |
245 | 242 | ||
246 | /* IDSEL 0x11 */ | 243 | /* IDSEL 0x11 */ |
247 | 8800 0 0 1 700 14 8 | 244 | 8800 0 0 1 &ipic 14 8 |
248 | 8800 0 0 2 700 15 8 | 245 | 8800 0 0 2 &ipic 15 8 |
249 | 8800 0 0 3 700 16 8 | 246 | 8800 0 0 3 &ipic 16 8 |
250 | 8800 0 0 4 700 17 8 | 247 | 8800 0 0 4 &ipic 17 8 |
251 | 248 | ||
252 | /* IDSEL 0x12 */ | 249 | /* IDSEL 0x12 */ |
253 | 9000 0 0 1 700 16 8 | 250 | 9000 0 0 1 &ipic 16 8 |
254 | 9000 0 0 2 700 17 8 | 251 | 9000 0 0 2 &ipic 17 8 |
255 | 9000 0 0 3 700 14 8 | 252 | 9000 0 0 3 &ipic 14 8 |
256 | 9000 0 0 4 700 15 8 | 253 | 9000 0 0 4 &ipic 15 8 |
257 | 254 | ||
258 | /* IDSEL 0x13 */ | 255 | /* IDSEL 0x13 */ |
259 | 9800 0 0 1 700 17 8 | 256 | 9800 0 0 1 &ipic 17 8 |
260 | 9800 0 0 2 700 14 8 | 257 | 9800 0 0 2 &ipic 14 8 |
261 | 9800 0 0 3 700 15 8 | 258 | 9800 0 0 3 &ipic 15 8 |
262 | 9800 0 0 4 700 16 8 | 259 | 9800 0 0 4 &ipic 16 8 |
263 | 260 | ||
264 | /* IDSEL 0x15 */ | 261 | /* IDSEL 0x15 */ |
265 | a800 0 0 1 700 14 8 | 262 | a800 0 0 1 &ipic 14 8 |
266 | a800 0 0 2 700 15 8 | 263 | a800 0 0 2 &ipic 15 8 |
267 | a800 0 0 3 700 16 8 | 264 | a800 0 0 3 &ipic 16 8 |
268 | a800 0 0 4 700 17 8 | 265 | a800 0 0 4 &ipic 17 8 |
269 | 266 | ||
270 | /* IDSEL 0x16 */ | 267 | /* IDSEL 0x16 */ |
271 | b000 0 0 1 700 17 8 | 268 | b000 0 0 1 &ipic 17 8 |
272 | b000 0 0 2 700 14 8 | 269 | b000 0 0 2 &ipic 14 8 |
273 | b000 0 0 3 700 15 8 | 270 | b000 0 0 3 &ipic 15 8 |
274 | b000 0 0 4 700 16 8 | 271 | b000 0 0 4 &ipic 16 8 |
275 | 272 | ||
276 | /* IDSEL 0x17 */ | 273 | /* IDSEL 0x17 */ |
277 | b800 0 0 1 700 16 8 | 274 | b800 0 0 1 &ipic 16 8 |
278 | b800 0 0 2 700 17 8 | 275 | b800 0 0 2 &ipic 17 8 |
279 | b800 0 0 3 700 14 8 | 276 | b800 0 0 3 &ipic 14 8 |
280 | b800 0 0 4 700 15 8 | 277 | b800 0 0 4 &ipic 15 8 |
281 | 278 | ||
282 | /* IDSEL 0x18 */ | 279 | /* IDSEL 0x18 */ |
283 | c000 0 0 1 700 15 8 | 280 | c000 0 0 1 &ipic 15 8 |
284 | c000 0 0 2 700 16 8 | 281 | c000 0 0 2 &ipic 16 8 |
285 | c000 0 0 3 700 17 8 | 282 | c000 0 0 3 &ipic 17 8 |
286 | c000 0 0 4 700 14 8>; | 283 | c000 0 0 4 &ipic 14 8>; |
287 | interrupt-parent = <700>; | 284 | interrupt-parent = < &ipic >; |
288 | interrupts = <42 8>; | 285 | interrupts = <42 8>; |
289 | bus-range = <0 0>; | 286 | bus-range = <0 0>; |
290 | ranges = <02000000 0 b0000000 b0000000 0 10000000 | 287 | ranges = <02000000 0 b0000000 b0000000 0 10000000 |
@@ -306,7 +303,7 @@ | |||
306 | compatible = "talitos"; | 303 | compatible = "talitos"; |
307 | reg = <30000 10000>; | 304 | reg = <30000 10000>; |
308 | interrupts = <b 8>; | 305 | interrupts = <b 8>; |
309 | interrupt-parent = <700>; | 306 | interrupt-parent = < &ipic >; |
310 | num-channels = <4>; | 307 | num-channels = <4>; |
311 | channel-fifo-len = <18>; | 308 | channel-fifo-len = <18>; |
312 | exec-units-mask = <0000007e>; | 309 | exec-units-mask = <0000007e>; |
@@ -321,8 +318,7 @@ | |||
321 | * sense == 8: Level, low assertion | 318 | * sense == 8: Level, low assertion |
322 | * sense == 2: Edge, high-to-low change | 319 | * sense == 2: Edge, high-to-low change |
323 | */ | 320 | */ |
324 | pic@700 { | 321 | ipic: pic@700 { |
325 | linux,phandle = <700>; | ||
326 | interrupt-controller; | 322 | interrupt-controller; |
327 | #address-cells = <0>; | 323 | #address-cells = <0>; |
328 | #interrupt-cells = <2>; | 324 | #interrupt-cells = <2>; |