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authorKumar Gala <galak@kernel.crashing.org>2007-09-12 19:23:46 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-09-14 09:53:22 -0400
commit1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 (patch)
treeb81e6642588b00a7dbb42611614e745517b6a6b9 /arch/powerpc/boot/dts/mpc834x_mds.dts
parentf0c8ac8083cbd9347b398bfddcca20f1e2786016 (diff)
[POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as the SOC node. This is to make it so that the SOC nodes children address space is just on chip registers and not other bus memory as well. Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge that exists in the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc834x_mds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts240
1 files changed, 120 insertions, 120 deletions
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index f4ba85775409..1b8882e20040 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -183,126 +183,6 @@
183 interrupt-parent = < &ipic >; 183 interrupt-parent = < &ipic >;
184 }; 184 };
185 185
186 pci@8500 {
187 interrupt-map-mask = <f800 0 0 7>;
188 interrupt-map = <
189
190 /* IDSEL 0x11 */
191 8800 0 0 1 &ipic 14 8
192 8800 0 0 2 &ipic 15 8
193 8800 0 0 3 &ipic 16 8
194 8800 0 0 4 &ipic 17 8
195
196 /* IDSEL 0x12 */
197 9000 0 0 1 &ipic 16 8
198 9000 0 0 2 &ipic 17 8
199 9000 0 0 3 &ipic 14 8
200 9000 0 0 4 &ipic 15 8
201
202 /* IDSEL 0x13 */
203 9800 0 0 1 &ipic 17 8
204 9800 0 0 2 &ipic 14 8
205 9800 0 0 3 &ipic 15 8
206 9800 0 0 4 &ipic 16 8
207
208 /* IDSEL 0x15 */
209 a800 0 0 1 &ipic 14 8
210 a800 0 0 2 &ipic 15 8
211 a800 0 0 3 &ipic 16 8
212 a800 0 0 4 &ipic 17 8
213
214 /* IDSEL 0x16 */
215 b000 0 0 1 &ipic 17 8
216 b000 0 0 2 &ipic 14 8
217 b000 0 0 3 &ipic 15 8
218 b000 0 0 4 &ipic 16 8
219
220 /* IDSEL 0x17 */
221 b800 0 0 1 &ipic 16 8
222 b800 0 0 2 &ipic 17 8
223 b800 0 0 3 &ipic 14 8
224 b800 0 0 4 &ipic 15 8
225
226 /* IDSEL 0x18 */
227 c000 0 0 1 &ipic 15 8
228 c000 0 0 2 &ipic 16 8
229 c000 0 0 3 &ipic 17 8
230 c000 0 0 4 &ipic 14 8>;
231 interrupt-parent = < &ipic >;
232 interrupts = <42 8>;
233 bus-range = <0 0>;
234 ranges = <02000000 0 90000000 90000000 0 10000000
235 42000000 0 80000000 80000000 0 10000000
236 01000000 0 00000000 e2000000 0 00100000>;
237 clock-frequency = <3f940aa>;
238 #interrupt-cells = <1>;
239 #size-cells = <2>;
240 #address-cells = <3>;
241 reg = <8500 100>;
242 compatible = "fsl,mpc8349-pci";
243 device_type = "pci";
244 };
245
246 pci@8600 {
247 interrupt-map-mask = <f800 0 0 7>;
248 interrupt-map = <
249
250 /* IDSEL 0x11 */
251 8800 0 0 1 &ipic 14 8
252 8800 0 0 2 &ipic 15 8
253 8800 0 0 3 &ipic 16 8
254 8800 0 0 4 &ipic 17 8
255
256 /* IDSEL 0x12 */
257 9000 0 0 1 &ipic 16 8
258 9000 0 0 2 &ipic 17 8
259 9000 0 0 3 &ipic 14 8
260 9000 0 0 4 &ipic 15 8
261
262 /* IDSEL 0x13 */
263 9800 0 0 1 &ipic 17 8
264 9800 0 0 2 &ipic 14 8
265 9800 0 0 3 &ipic 15 8
266 9800 0 0 4 &ipic 16 8
267
268 /* IDSEL 0x15 */
269 a800 0 0 1 &ipic 14 8
270 a800 0 0 2 &ipic 15 8
271 a800 0 0 3 &ipic 16 8
272 a800 0 0 4 &ipic 17 8
273
274 /* IDSEL 0x16 */
275 b000 0 0 1 &ipic 17 8
276 b000 0 0 2 &ipic 14 8
277 b000 0 0 3 &ipic 15 8
278 b000 0 0 4 &ipic 16 8
279
280 /* IDSEL 0x17 */
281 b800 0 0 1 &ipic 16 8
282 b800 0 0 2 &ipic 17 8
283 b800 0 0 3 &ipic 14 8
284 b800 0 0 4 &ipic 15 8
285
286 /* IDSEL 0x18 */
287 c000 0 0 1 &ipic 15 8
288 c000 0 0 2 &ipic 16 8
289 c000 0 0 3 &ipic 17 8
290 c000 0 0 4 &ipic 14 8>;
291 interrupt-parent = < &ipic >;
292 interrupts = <42 8>;
293 bus-range = <0 0>;
294 ranges = <02000000 0 b0000000 b0000000 0 10000000
295 42000000 0 a0000000 a0000000 0 10000000
296 01000000 0 00000000 e2100000 0 00100000>;
297 clock-frequency = <3f940aa>;
298 #interrupt-cells = <1>;
299 #size-cells = <2>;
300 #address-cells = <3>;
301 reg = <8600 100>;
302 compatible = "fsl,mpc8349-pci";
303 device_type = "pci";
304 };
305
306 /* May need to remove if on a part without crypto engine */ 186 /* May need to remove if on a part without crypto engine */
307 crypto@30000 { 187 crypto@30000 {
308 device_type = "crypto"; 188 device_type = "crypto";
@@ -333,4 +213,124 @@
333 device_type = "ipic"; 213 device_type = "ipic";
334 }; 214 };
335 }; 215 };
216
217 pci@e0008500 {
218 interrupt-map-mask = <f800 0 0 7>;
219 interrupt-map = <
220
221 /* IDSEL 0x11 */
222 8800 0 0 1 &ipic 14 8
223 8800 0 0 2 &ipic 15 8
224 8800 0 0 3 &ipic 16 8
225 8800 0 0 4 &ipic 17 8
226
227 /* IDSEL 0x12 */
228 9000 0 0 1 &ipic 16 8
229 9000 0 0 2 &ipic 17 8
230 9000 0 0 3 &ipic 14 8
231 9000 0 0 4 &ipic 15 8
232
233 /* IDSEL 0x13 */
234 9800 0 0 1 &ipic 17 8
235 9800 0 0 2 &ipic 14 8
236 9800 0 0 3 &ipic 15 8
237 9800 0 0 4 &ipic 16 8
238
239 /* IDSEL 0x15 */
240 a800 0 0 1 &ipic 14 8
241 a800 0 0 2 &ipic 15 8
242 a800 0 0 3 &ipic 16 8
243 a800 0 0 4 &ipic 17 8
244
245 /* IDSEL 0x16 */
246 b000 0 0 1 &ipic 17 8
247 b000 0 0 2 &ipic 14 8
248 b000 0 0 3 &ipic 15 8
249 b000 0 0 4 &ipic 16 8
250
251 /* IDSEL 0x17 */
252 b800 0 0 1 &ipic 16 8
253 b800 0 0 2 &ipic 17 8
254 b800 0 0 3 &ipic 14 8
255 b800 0 0 4 &ipic 15 8
256
257 /* IDSEL 0x18 */
258 c000 0 0 1 &ipic 15 8
259 c000 0 0 2 &ipic 16 8
260 c000 0 0 3 &ipic 17 8
261 c000 0 0 4 &ipic 14 8>;
262 interrupt-parent = < &ipic >;
263 interrupts = <42 8>;
264 bus-range = <0 0>;
265 ranges = <02000000 0 90000000 90000000 0 10000000
266 42000000 0 80000000 80000000 0 10000000
267 01000000 0 00000000 e2000000 0 00100000>;
268 clock-frequency = <3f940aa>;
269 #interrupt-cells = <1>;
270 #size-cells = <2>;
271 #address-cells = <3>;
272 reg = <e0008500 100>;
273 compatible = "fsl,mpc8349-pci";
274 device_type = "pci";
275 };
276
277 pci@e0008600 {
278 interrupt-map-mask = <f800 0 0 7>;
279 interrupt-map = <
280
281 /* IDSEL 0x11 */
282 8800 0 0 1 &ipic 14 8
283 8800 0 0 2 &ipic 15 8
284 8800 0 0 3 &ipic 16 8
285 8800 0 0 4 &ipic 17 8
286
287 /* IDSEL 0x12 */
288 9000 0 0 1 &ipic 16 8
289 9000 0 0 2 &ipic 17 8
290 9000 0 0 3 &ipic 14 8
291 9000 0 0 4 &ipic 15 8
292
293 /* IDSEL 0x13 */
294 9800 0 0 1 &ipic 17 8
295 9800 0 0 2 &ipic 14 8
296 9800 0 0 3 &ipic 15 8
297 9800 0 0 4 &ipic 16 8
298
299 /* IDSEL 0x15 */
300 a800 0 0 1 &ipic 14 8
301 a800 0 0 2 &ipic 15 8
302 a800 0 0 3 &ipic 16 8
303 a800 0 0 4 &ipic 17 8
304
305 /* IDSEL 0x16 */
306 b000 0 0 1 &ipic 17 8
307 b000 0 0 2 &ipic 14 8
308 b000 0 0 3 &ipic 15 8
309 b000 0 0 4 &ipic 16 8
310
311 /* IDSEL 0x17 */
312 b800 0 0 1 &ipic 16 8
313 b800 0 0 2 &ipic 17 8
314 b800 0 0 3 &ipic 14 8
315 b800 0 0 4 &ipic 15 8
316
317 /* IDSEL 0x18 */
318 c000 0 0 1 &ipic 15 8
319 c000 0 0 2 &ipic 16 8
320 c000 0 0 3 &ipic 17 8
321 c000 0 0 4 &ipic 14 8>;
322 interrupt-parent = < &ipic >;
323 interrupts = <42 8>;
324 bus-range = <0 0>;
325 ranges = <02000000 0 b0000000 b0000000 0 10000000
326 42000000 0 a0000000 a0000000 0 10000000
327 01000000 0 00000000 e2100000 0 00100000>;
328 clock-frequency = <3f940aa>;
329 #interrupt-cells = <1>;
330 #size-cells = <2>;
331 #address-cells = <3>;
332 reg = <e0008600 100>;
333 compatible = "fsl,mpc8349-pci";
334 device_type = "pci";
335 };
336}; 336};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-06 00:51:19 -0400