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authorPaul Gortmaker <paul.gortmaker@windriver.com>2008-01-28 16:09:36 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-01-28 17:16:38 -0500
commitcda13dd164f91df79ba797ab84848352b03de115 (patch)
treef366a541f2358c4b74b3e4c8b7ec04994c23d3e8 /arch/powerpc/boot/dts/mpc8349emitx.dts
parenta6f71745969d495d697d1ccd96385d2f7a963375 (diff)
[POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
This patch converts the remaining 83xx boards to the dts-v1 format. This includes the mpc8313_rdb, mpc832x_mds, mpc8323_rdb, mpc8349emitx, mpc8349emitxgp and the mpc836x_mds. The mpc8315_rdb mpc834x_mds, mpc837[789]_*, and sbc8349 were already dts-v1 and only undergo minor changes for the sake of formatting consistency across the whole group of boards; i.e. the idea being that you can do a "diff -u board_A.dts board_B.dts" and see something meaningful. The general rule I've applied is that entries for values normally parsed by humans are left in decimal (i.e. IRQ, cache size, clock rates, basic counts and indexes) and all other data (i.e. reg and ranges, IRQ flags etc.) remain in hex. I've used dtc to confirm that the output prior to this changeset matches the output after this changeset is applied for all boards. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8349emitx.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts155
1 files changed, 79 insertions, 76 deletions
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 4a4ddea2d99c..9426676b0b7d 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -8,6 +8,9 @@
8 * Free Software Foundation; either version 2 of the License, or (at your 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11
12/dts-v1/;
13
11/ { 14/ {
12 model = "MPC8349EMITX"; 15 model = "MPC8349EMITX";
13 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; 16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
@@ -29,11 +32,11 @@
29 32
30 PowerPC,8349@0 { 33 PowerPC,8349@0 {
31 device_type = "cpu"; 34 device_type = "cpu";
32 reg = <0>; 35 reg = <0x0>;
33 d-cache-line-size = <20>; 36 d-cache-line-size = <32>;
34 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
35 d-cache-size = <8000>; 38 d-cache-size = <32768>;
36 i-cache-size = <8000>; 39 i-cache-size = <32768>;
37 timebase-frequency = <0>; // from bootloader 40 timebase-frequency = <0>; // from bootloader
38 bus-frequency = <0>; // from bootloader 41 bus-frequency = <0>; // from bootloader
39 clock-frequency = <0>; // from bootloader 42 clock-frequency = <0>; // from bootloader
@@ -42,21 +45,21 @@
42 45
43 memory { 46 memory {
44 device_type = "memory"; 47 device_type = "memory";
45 reg = <00000000 10000000>; 48 reg = <0x00000000 0x10000000>;
46 }; 49 };
47 50
48 soc8349@e0000000 { 51 soc8349@e0000000 {
49 #address-cells = <1>; 52 #address-cells = <1>;
50 #size-cells = <1>; 53 #size-cells = <1>;
51 device_type = "soc"; 54 device_type = "soc";
52 ranges = <0 e0000000 00100000>; 55 ranges = <0x0 0xe0000000 0x00100000>;
53 reg = <e0000000 00000200>; 56 reg = <0xe0000000 0x00000200>;
54 bus-frequency = <0>; // from bootloader 57 bus-frequency = <0>; // from bootloader
55 58
56 wdt@200 { 59 wdt@200 {
57 device_type = "watchdog"; 60 device_type = "watchdog";
58 compatible = "mpc83xx_wdt"; 61 compatible = "mpc83xx_wdt";
59 reg = <200 100>; 62 reg = <0x200 0x100>;
60 }; 63 };
61 64
62 i2c@3000 { 65 i2c@3000 {
@@ -64,9 +67,9 @@
64 #size-cells = <0>; 67 #size-cells = <0>;
65 cell-index = <0>; 68 cell-index = <0>;
66 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
67 reg = <3000 100>; 70 reg = <0x3000 0x100>;
68 interrupts = <e 8>; 71 interrupts = <14 0x8>;
69 interrupt-parent = < &ipic >; 72 interrupt-parent = <&ipic>;
70 dfsrr; 73 dfsrr;
71 }; 74 };
72 75
@@ -75,39 +78,39 @@
75 #size-cells = <0>; 78 #size-cells = <0>;
76 cell-index = <1>; 79 cell-index = <1>;
77 compatible = "fsl-i2c"; 80 compatible = "fsl-i2c";
78 reg = <3100 100>; 81 reg = <0x3100 0x100>;
79 interrupts = <f 8>; 82 interrupts = <15 0x8>;
80 interrupt-parent = < &ipic >; 83 interrupt-parent = <&ipic>;
81 dfsrr; 84 dfsrr;
82 }; 85 };
83 86
84 spi@7000 { 87 spi@7000 {
85 cell-index = <0>; 88 cell-index = <0>;
86 compatible = "fsl,spi"; 89 compatible = "fsl,spi";
87 reg = <7000 1000>; 90 reg = <0x7000 0x1000>;
88 interrupts = <10 8>; 91 interrupts = <16 0x8>;
89 interrupt-parent = < &ipic >; 92 interrupt-parent = <&ipic>;
90 mode = "cpu"; 93 mode = "cpu";
91 }; 94 };
92 95
93 usb@22000 { 96 usb@22000 {
94 compatible = "fsl-usb2-mph"; 97 compatible = "fsl-usb2-mph";
95 reg = <22000 1000>; 98 reg = <0x22000 0x1000>;
96 #address-cells = <1>; 99 #address-cells = <1>;
97 #size-cells = <0>; 100 #size-cells = <0>;
98 interrupt-parent = < &ipic >; 101 interrupt-parent = <&ipic>;
99 interrupts = <27 8>; 102 interrupts = <39 0x8>;
100 phy_type = "ulpi"; 103 phy_type = "ulpi";
101 port1; 104 port1;
102 }; 105 };
103 106
104 usb@23000 { 107 usb@23000 {
105 compatible = "fsl-usb2-dr"; 108 compatible = "fsl-usb2-dr";
106 reg = <23000 1000>; 109 reg = <0x23000 0x1000>;
107 #address-cells = <1>; 110 #address-cells = <1>;
108 #size-cells = <0>; 111 #size-cells = <0>;
109 interrupt-parent = < &ipic >; 112 interrupt-parent = <&ipic>;
110 interrupts = <26 8>; 113 interrupts = <38 0x8>;
111 dr_mode = "peripheral"; 114 dr_mode = "peripheral";
112 phy_type = "ulpi"; 115 phy_type = "ulpi";
113 }; 116 };
@@ -116,13 +119,13 @@
116 #address-cells = <1>; 119 #address-cells = <1>;
117 #size-cells = <0>; 120 #size-cells = <0>;
118 compatible = "fsl,gianfar-mdio"; 121 compatible = "fsl,gianfar-mdio";
119 reg = <24520 20>; 122 reg = <0x24520 0x20>;
120 123
121 /* Vitesse 8201 */ 124 /* Vitesse 8201 */
122 phy1c: ethernet-phy@1c { 125 phy1c: ethernet-phy@1c {
123 interrupt-parent = < &ipic >; 126 interrupt-parent = <&ipic>;
124 interrupts = <12 8>; 127 interrupts = <18 0x8>;
125 reg = <1c>; 128 reg = <0x1c>;
126 device_type = "ethernet-phy"; 129 device_type = "ethernet-phy";
127 }; 130 };
128 }; 131 };
@@ -132,11 +135,11 @@
132 device_type = "network"; 135 device_type = "network";
133 model = "TSEC"; 136 model = "TSEC";
134 compatible = "gianfar"; 137 compatible = "gianfar";
135 reg = <24000 1000>; 138 reg = <0x24000 0x1000>;
136 local-mac-address = [ 00 00 00 00 00 00 ]; 139 local-mac-address = [ 00 00 00 00 00 00 ];
137 interrupts = <20 8 21 8 22 8>; 140 interrupts = <32 0x8 33 0x8 34 0x8>;
138 interrupt-parent = < &ipic >; 141 interrupt-parent = <&ipic>;
139 phy-handle = < &phy1c >; 142 phy-handle = <&phy1c>;
140 linux,network-index = <0>; 143 linux,network-index = <0>;
141 }; 144 };
142 145
@@ -145,12 +148,12 @@
145 device_type = "network"; 148 device_type = "network";
146 model = "TSEC"; 149 model = "TSEC";
147 compatible = "gianfar"; 150 compatible = "gianfar";
148 reg = <25000 1000>; 151 reg = <0x25000 0x1000>;
149 local-mac-address = [ 00 00 00 00 00 00 ]; 152 local-mac-address = [ 00 00 00 00 00 00 ];
150 interrupts = <23 8 24 8 25 8>; 153 interrupts = <35 0x8 36 0x8 37 0x8>;
151 interrupt-parent = < &ipic >; 154 interrupt-parent = <&ipic>;
152 /* Vitesse 7385 isn't on the MDIO bus */ 155 /* Vitesse 7385 isn't on the MDIO bus */
153 fixed-link = <1 1 d#1000 0 0>; 156 fixed-link = <1 1 1000 0 0>;
154 linux,network-index = <1>; 157 linux,network-index = <1>;
155 }; 158 };
156 159
@@ -158,88 +161,88 @@
158 cell-index = <0>; 161 cell-index = <0>;
159 device_type = "serial"; 162 device_type = "serial";
160 compatible = "ns16550"; 163 compatible = "ns16550";
161 reg = <4500 100>; 164 reg = <0x4500 0x100>;
162 clock-frequency = <0>; // from bootloader 165 clock-frequency = <0>; // from bootloader
163 interrupts = <9 8>; 166 interrupts = <9 0x8>;
164 interrupt-parent = < &ipic >; 167 interrupt-parent = <&ipic>;
165 }; 168 };
166 169
167 serial1: serial@4600 { 170 serial1: serial@4600 {
168 cell-index = <1>; 171 cell-index = <1>;
169 device_type = "serial"; 172 device_type = "serial";
170 compatible = "ns16550"; 173 compatible = "ns16550";
171 reg = <4600 100>; 174 reg = <0x4600 0x100>;
172 clock-frequency = <0>; // from bootloader 175 clock-frequency = <0>; // from bootloader
173 interrupts = <a 8>; 176 interrupts = <10 0x8>;
174 interrupt-parent = < &ipic >; 177 interrupt-parent = <&ipic>;
175 }; 178 };
176 179
177 crypto@30000 { 180 crypto@30000 {
178 device_type = "crypto"; 181 device_type = "crypto";
179 model = "SEC2"; 182 model = "SEC2";
180 compatible = "talitos"; 183 compatible = "talitos";
181 reg = <30000 10000>; 184 reg = <0x30000 0x10000>;
182 interrupts = <b 8>; 185 interrupts = <11 0x8>;
183 interrupt-parent = < &ipic >; 186 interrupt-parent = <&ipic>;
184 num-channels = <4>; 187 num-channels = <4>;
185 channel-fifo-len = <18>; 188 channel-fifo-len = <24>;
186 exec-units-mask = <0000007e>; 189 exec-units-mask = <0x0000007e>;
187 descriptor-types-mask = <01010ebf>; 190 descriptor-types-mask = <0x01010ebf>;
188 }; 191 };
189 192
190 ipic: pic@700 { 193 ipic: pic@700 {
191 interrupt-controller; 194 interrupt-controller;
192 #address-cells = <0>; 195 #address-cells = <0>;
193 #interrupt-cells = <2>; 196 #interrupt-cells = <2>;
194 reg = <700 100>; 197 reg = <0x700 0x100>;
195 device_type = "ipic"; 198 device_type = "ipic";
196 }; 199 };
197 }; 200 };
198 201
199 pci0: pci@e0008500 { 202 pci0: pci@e0008500 {
200 cell-index = <1>; 203 cell-index = <1>;
201 interrupt-map-mask = <f800 0 0 7>; 204 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
202 interrupt-map = < 205 interrupt-map = <
203 /* IDSEL 0x10 - SATA */ 206 /* IDSEL 0x10 - SATA */
204 8000 0 0 1 &ipic 16 8 /* SATA_INTA */ 207 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
205 >; 208 >;
206 interrupt-parent = < &ipic >; 209 interrupt-parent = <&ipic>;
207 interrupts = <42 8>; 210 interrupts = <66 0x8>;
208 bus-range = <0 0>; 211 bus-range = <0x0 0x0>;
209 ranges = <42000000 0 80000000 80000000 0 10000000 212 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
210 02000000 0 90000000 90000000 0 10000000 213 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
211 01000000 0 00000000 e2000000 0 01000000>; 214 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
212 clock-frequency = <3f940aa>; 215 clock-frequency = <66666666>;
213 #interrupt-cells = <1>; 216 #interrupt-cells = <1>;
214 #size-cells = <2>; 217 #size-cells = <2>;
215 #address-cells = <3>; 218 #address-cells = <3>;
216 reg = <e0008500 100>; 219 reg = <0xe0008500 0x100>;
217 compatible = "fsl,mpc8349-pci"; 220 compatible = "fsl,mpc8349-pci";
218 device_type = "pci"; 221 device_type = "pci";
219 }; 222 };
220 223
221 pci1: pci@e0008600 { 224 pci1: pci@e0008600 {
222 cell-index = <2>; 225 cell-index = <2>;
223 interrupt-map-mask = <f800 0 0 7>; 226 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
224 interrupt-map = < 227 interrupt-map = <
225 /* IDSEL 0x0E - MiniPCI Slot */ 228 /* IDSEL 0x0E - MiniPCI Slot */
226 7000 0 0 1 &ipic 15 8 /* PCI_INTA */ 229 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
227 230
228 /* IDSEL 0x0F - PCI Slot */ 231 /* IDSEL 0x0F - PCI Slot */
229 7800 0 0 1 &ipic 14 8 /* PCI_INTA */ 232 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
230 7800 0 0 2 &ipic 15 8 /* PCI_INTB */ 233 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
231 >; 234 >;
232 interrupt-parent = < &ipic >; 235 interrupt-parent = <&ipic>;
233 interrupts = <43 8>; 236 interrupts = <67 0x8>;
234 bus-range = <0 0>; 237 bus-range = <0x0 0x0>;
235 ranges = <42000000 0 a0000000 a0000000 0 10000000 238 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
236 02000000 0 b0000000 b0000000 0 10000000 239 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
237 01000000 0 00000000 e3000000 0 01000000>; 240 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
238 clock-frequency = <3f940aa>; 241 clock-frequency = <66666666>;
239 #interrupt-cells = <1>; 242 #interrupt-cells = <1>;
240 #size-cells = <2>; 243 #size-cells = <2>;
241 #address-cells = <3>; 244 #address-cells = <3>;
242 reg = <e0008600 100>; 245 reg = <0xe0008600 0x100>;
243 compatible = "fsl,mpc8349-pci"; 246 compatible = "fsl,mpc8349-pci";
244 device_type = "pci"; 247 device_type = "pci";
245 }; 248 };
@@ -249,15 +252,15 @@
249 #size-cells = <1>; 252 #size-cells = <1>;
250 compatible = "fsl,mpc8349e-localbus", 253 compatible = "fsl,mpc8349e-localbus",
251 "fsl,pq2pro-localbus"; 254 "fsl,pq2pro-localbus";
252 reg = <e0005000 d8>; 255 reg = <0xe0005000 0xd8>;
253 ranges = <3 0 f0000000 210>; 256 ranges = <0x3 0x0 0xf0000000 0x210>;
254 257
255 pata@3,0 { 258 pata@3,0 {
256 compatible = "fsl,mpc8349emitx-pata", "ata-generic"; 259 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
257 reg = <3 0 10 3 20c 4>; 260 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
258 reg-shift = <1>; 261 reg-shift = <1>;
259 pio-mode = <6>; 262 pio-mode = <6>;
260 interrupts = <17 8>; 263 interrupts = <23 0x8>;
261 interrupt-parent = <&ipic>; 264 interrupt-parent = <&ipic>;
262 }; 265 };
263 }; 266 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-18 11:31:22 -0500