diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2007-09-12 19:23:46 -0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-09-14 09:53:22 -0400 |
| commit | 1b3c5cdab49a605f0e048e1ccbf4cc61a2626485 (patch) | |
| tree | b81e6642588b00a7dbb42611614e745517b6a6b9 /arch/powerpc/boot/dts/mpc832x_mds.dts | |
| parent | f0c8ac8083cbd9347b398bfddcca20f1e2786016 (diff) | |
[POWERPC] Move PCI nodes to be sibilings with SOC nodes
Updated the device trees to have the PCI nodes be at the same level as
the SOC node. This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.
Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc832x_mds.dts')
| -rw-r--r-- | arch/powerpc/boot/dts/mpc832x_mds.dts | 118 |
1 files changed, 59 insertions, 59 deletions
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index e88167dc1859..fcd333c391ec 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts | |||
| @@ -97,65 +97,6 @@ | |||
| 97 | descriptor-types-mask = <0122003f>; | 97 | descriptor-types-mask = <0122003f>; |
| 98 | }; | 98 | }; |
| 99 | 99 | ||
| 100 | pci@8500 { | ||
| 101 | interrupt-map-mask = <f800 0 0 7>; | ||
| 102 | interrupt-map = < | ||
| 103 | /* IDSEL 0x11 AD17 */ | ||
| 104 | 8800 0 0 1 &ipic 14 8 | ||
| 105 | 8800 0 0 2 &ipic 15 8 | ||
| 106 | 8800 0 0 3 &ipic 16 8 | ||
| 107 | 8800 0 0 4 &ipic 17 8 | ||
| 108 | |||
| 109 | /* IDSEL 0x12 AD18 */ | ||
| 110 | 9000 0 0 1 &ipic 16 8 | ||
| 111 | 9000 0 0 2 &ipic 17 8 | ||
| 112 | 9000 0 0 3 &ipic 14 8 | ||
| 113 | 9000 0 0 4 &ipic 15 8 | ||
| 114 | |||
| 115 | /* IDSEL 0x13 AD19 */ | ||
| 116 | 9800 0 0 1 &ipic 17 8 | ||
| 117 | 9800 0 0 2 &ipic 14 8 | ||
| 118 | 9800 0 0 3 &ipic 15 8 | ||
| 119 | 9800 0 0 4 &ipic 16 8 | ||
| 120 | |||
| 121 | /* IDSEL 0x15 AD21*/ | ||
| 122 | a800 0 0 1 &ipic 14 8 | ||
| 123 | a800 0 0 2 &ipic 15 8 | ||
| 124 | a800 0 0 3 &ipic 16 8 | ||
| 125 | a800 0 0 4 &ipic 17 8 | ||
| 126 | |||
| 127 | /* IDSEL 0x16 AD22*/ | ||
| 128 | b000 0 0 1 &ipic 17 8 | ||
| 129 | b000 0 0 2 &ipic 14 8 | ||
| 130 | b000 0 0 3 &ipic 15 8 | ||
| 131 | b000 0 0 4 &ipic 16 8 | ||
| 132 | |||
| 133 | /* IDSEL 0x17 AD23*/ | ||
| 134 | b800 0 0 1 &ipic 16 8 | ||
| 135 | b800 0 0 2 &ipic 17 8 | ||
| 136 | b800 0 0 3 &ipic 14 8 | ||
| 137 | b800 0 0 4 &ipic 15 8 | ||
| 138 | |||
| 139 | /* IDSEL 0x18 AD24*/ | ||
| 140 | c000 0 0 1 &ipic 15 8 | ||
| 141 | c000 0 0 2 &ipic 16 8 | ||
| 142 | c000 0 0 3 &ipic 17 8 | ||
| 143 | c000 0 0 4 &ipic 14 8>; | ||
| 144 | interrupt-parent = < &ipic >; | ||
| 145 | interrupts = <42 8>; | ||
| 146 | bus-range = <0 0>; | ||
| 147 | ranges = <02000000 0 90000000 90000000 0 10000000 | ||
| 148 | 42000000 0 80000000 80000000 0 10000000 | ||
| 149 | 01000000 0 00000000 d0000000 0 00100000>; | ||
| 150 | clock-frequency = <0>; | ||
| 151 | #interrupt-cells = <1>; | ||
| 152 | #size-cells = <2>; | ||
| 153 | #address-cells = <3>; | ||
| 154 | reg = <8500 100>; | ||
| 155 | compatible = "fsl,mpc8349-pci"; | ||
| 156 | device_type = "pci"; | ||
| 157 | }; | ||
| 158 | |||
| 159 | ipic: pic@700 { | 100 | ipic: pic@700 { |
| 160 | interrupt-controller; | 101 | interrupt-controller; |
| 161 | #address-cells = <0>; | 102 | #address-cells = <0>; |
| @@ -335,4 +276,63 @@ | |||
| 335 | interrupt-parent = < &ipic >; | 276 | interrupt-parent = < &ipic >; |
| 336 | }; | 277 | }; |
| 337 | }; | 278 | }; |
| 279 | |||
| 280 | pci@e0008500 { | ||
| 281 | interrupt-map-mask = <f800 0 0 7>; | ||
| 282 | interrupt-map = < | ||
| 283 | /* IDSEL 0x11 AD17 */ | ||
| 284 | 8800 0 0 1 &ipic 14 8 | ||
| 285 | 8800 0 0 2 &ipic 15 8 | ||
| 286 | 8800 0 0 3 &ipic 16 8 | ||
| 287 | 8800 0 0 4 &ipic 17 8 | ||
| 288 | |||
| 289 | /* IDSEL 0x12 AD18 */ | ||
| 290 | 9000 0 0 1 &ipic 16 8 | ||
| 291 | 9000 0 0 2 &ipic 17 8 | ||
| 292 | 9000 0 0 3 &ipic 14 8 | ||
| 293 | 9000 0 0 4 &ipic 15 8 | ||
| 294 | |||
| 295 | /* IDSEL 0x13 AD19 */ | ||
| 296 | 9800 0 0 1 &ipic 17 8 | ||
| 297 | 9800 0 0 2 &ipic 14 8 | ||
| 298 | 9800 0 0 3 &ipic 15 8 | ||
| 299 | 9800 0 0 4 &ipic 16 8 | ||
| 300 | |||
| 301 | /* IDSEL 0x15 AD21*/ | ||
| 302 | a800 0 0 1 &ipic 14 8 | ||
| 303 | a800 0 0 2 &ipic 15 8 | ||
| 304 | a800 0 0 3 &ipic 16 8 | ||
| 305 | a800 0 0 4 &ipic 17 8 | ||
| 306 | |||
| 307 | /* IDSEL 0x16 AD22*/ | ||
| 308 | b000 0 0 1 &ipic 17 8 | ||
| 309 | b000 0 0 2 &ipic 14 8 | ||
| 310 | b000 0 0 3 &ipic 15 8 | ||
| 311 | b000 0 0 4 &ipic 16 8 | ||
| 312 | |||
| 313 | /* IDSEL 0x17 AD23*/ | ||
| 314 | b800 0 0 1 &ipic 16 8 | ||
| 315 | b800 0 0 2 &ipic 17 8 | ||
| 316 | b800 0 0 3 &ipic 14 8 | ||
| 317 | b800 0 0 4 &ipic 15 8 | ||
| 318 | |||
| 319 | /* IDSEL 0x18 AD24*/ | ||
| 320 | c000 0 0 1 &ipic 15 8 | ||
| 321 | c000 0 0 2 &ipic 16 8 | ||
| 322 | c000 0 0 3 &ipic 17 8 | ||
| 323 | c000 0 0 4 &ipic 14 8>; | ||
| 324 | interrupt-parent = < &ipic >; | ||
| 325 | interrupts = <42 8>; | ||
| 326 | bus-range = <0 0>; | ||
| 327 | ranges = <02000000 0 90000000 90000000 0 10000000 | ||
| 328 | 42000000 0 80000000 80000000 0 10000000 | ||
| 329 | 01000000 0 00000000 d0000000 0 00100000>; | ||
| 330 | clock-frequency = <0>; | ||
| 331 | #interrupt-cells = <1>; | ||
| 332 | #size-cells = <2>; | ||
| 333 | #address-cells = <3>; | ||
| 334 | reg = <e0008500 100>; | ||
| 335 | compatible = "fsl,mpc8349-pci"; | ||
| 336 | device_type = "pci"; | ||
| 337 | }; | ||
| 338 | }; | 338 | }; |