[POWERPC] Move PCI nodes to be sibilings with SOC nodes

Updated the device trees to have the PCI nodes be at the same level as
the SOC node.  This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.

Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 30 insertions, 30 deletions

diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index abd73a2c5e0c..a8eadc8c4497 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -150,36 +150,6 @@
                         interrupt-parent = < &ipic >;
                 };
 
-                pci@8500 {
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <
-
-                                        /* IDSEL 0x0E -mini PCI */
-                                         7000 0 0 1 &ipic 12 8
-                                         7000 0 0 2 &ipic 12 8
-                                         7000 0 0 3 &ipic 12 8
-                                         7000 0 0 4 &ipic 12 8
-
-                                        /* IDSEL 0x0F - PCI slot */
-                                         7800 0 0 1 &ipic 11 8
-                                         7800 0 0 2 &ipic 12 8
-                                         7800 0 0 3 &ipic 11 8
-                                         7800 0 0 4 &ipic 12 8>;
-                        interrupt-parent = < &ipic >;
-                        interrupts = <42 8>;
-                        bus-range = <0 0>;
-                        ranges = <02000000 0 90000000 90000000 0 10000000
-                                  42000000 0 80000000 80000000 0 10000000
-                                  01000000 0 00000000 e2000000 0 00100000>;
-                        clock-frequency = <3f940aa>;
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        reg = <8500 100>;
-                        compatible = "fsl,mpc8349-pci";
-                        device_type = "pci";
-                };
-
                 crypto@30000 {
                         device_type = "crypto";
                         model = "SEC2";
@@ -208,4 +178,34 @@
                         device_type = "ipic";
                 };
         };
+
+        pci@e0008500 {
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <
+
+                                /* IDSEL 0x0E -mini PCI */
+                                 7000 0 0 1 &ipic 12 8
+                                 7000 0 0 2 &ipic 12 8
+                                 7000 0 0 3 &ipic 12 8
+                                 7000 0 0 4 &ipic 12 8
+
+                                /* IDSEL 0x0F - PCI slot */
+                                 7800 0 0 1 &ipic 11 8
+                                 7800 0 0 2 &ipic 12 8
+                                 7800 0 0 3 &ipic 11 8
+                                 7800 0 0 4 &ipic 12 8>;
+                interrupt-parent = < &ipic >;
+                interrupts = <42 8>;
+                bus-range = <0 0>;
+                ranges = <02000000 0 90000000 90000000 0 10000000
+                          42000000 0 80000000 80000000 0 10000000
+                          01000000 0 00000000 e2000000 0 00100000>;
+                clock-frequency = <3f940aa>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <e0008500 100>;
+                compatible = "fsl,mpc8349-pci";
+                device_type = "pci";
+        };
 };