[POWERPC] Move PCI nodes to be sibilings with SOC nodes

Updated the device trees to have the PCI nodes be at the same level as
the SOC node.  This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.

Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 26 insertions, 26 deletions

diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 5fe8998abb7c..3f74f73f70ad 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -182,32 +182,6 @@
                         interrupt-parent = <&mpc5200_pic>;
                 };
 
-                pci@0d00 {
-                        #interrupt-cells = <1>;
-                        #size-cells = <2>;
-                        #address-cells = <3>;
-                        device_type = "pci";
-                        compatible = "mpc5200b-pci\0mpc5200-pci";
-                        reg = <d00 100>;
-                        interrupt-map-mask = <f800 0 0 7>;
-                        interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
-                                         c000 0 0 2 &mpc5200_pic 1 1 3
-                                         c000 0 0 3 &mpc5200_pic 1 2 3
-                                         c000 0 0 4 &mpc5200_pic 1 3 3
-
-                                         c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
-                                         c800 0 0 2 &mpc5200_pic 1 2 3
-                                         c800 0 0 3 &mpc5200_pic 1 3 3
-                                         c800 0 0 4 &mpc5200_pic 0 0 3>;
-                        clock-frequency = <0>; // From boot loader
-                        interrupts = <2 8 0 2 9 0 2 a 0>;
-                        interrupt-parent = <&mpc5200_pic>;
-                        bus-range = <0 0>;
-                        ranges = <42000000 0 80000000 80000000 0 20000000
-                                  02000000 0 a0000000 a0000000 0 10000000
-                                  01000000 0 00000000 b0000000 0 01000000>;
-                };
-
                 spi@f00 {
                         device_type = "spi";
                         compatible = "mpc5200b-spi\0mpc5200-spi";
@@ -342,4 +316,30 @@
                         reg = <8000 4000>;
                 };
         };
+
+        pci@f0000d00 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                compatible = "mpc5200b-pci\0mpc5200-pci";
+                reg = <f0000d00 100>;
+                interrupt-map-mask = <f800 0 0 7>;
+                interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
+                                 c000 0 0 2 &mpc5200_pic 1 1 3
+                                 c000 0 0 3 &mpc5200_pic 1 2 3
+                                 c000 0 0 4 &mpc5200_pic 1 3 3
+
+                                 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
+                                 c800 0 0 2 &mpc5200_pic 1 2 3
+                                 c800 0 0 3 &mpc5200_pic 1 3 3
+                                 c800 0 0 4 &mpc5200_pic 0 0 3>;
+                clock-frequency = <0>; // From boot loader
+                interrupts = <2 8 0 2 9 0 2 a 0>;
+                interrupt-parent = <&mpc5200_pic>;
+                bus-range = <0 0>;
+                ranges = <42000000 0 80000000 80000000 0 20000000
+                          02000000 0 a0000000 a0000000 0 10000000
+                          01000000 0 00000000 b0000000 0 01000000>;
+        };
 };