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authorGrant Likely <grant.likely@secretlab.ca>2008-01-25 00:25:31 -0500
committerGrant Likely <grant.likely@secretlab.ca>2008-01-26 17:32:11 -0500
commit24ce6bc4a2b75509b29372f1e5e7e0fe51d98e66 (patch)
treea0dae7f428373307312d2bccac59ec5dc35f4af7 /arch/powerpc/boot/dts/lite5200b.dts
parent66ffbe490b6156898364b3f20a571a78f8d77bc8 (diff)
[POWERPC] mpc5200: make dts files conform to generic names recommended practice
Modify mpc5200 dts files to match Open Firmware's Generic Names recommended practice. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/powerpc/boot/dts/lite5200b.dts')
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts91
1 files changed, 39 insertions, 52 deletions
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index dd2c4fd3d098..571ba02accac 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -18,7 +18,6 @@
18 18
19/ { 19/ {
20 model = "fsl,lite5200b"; 20 model = "fsl,lite5200b";
21 // revision = "1.0";
22 compatible = "fsl,lite5200b"; 21 compatible = "fsl,lite5200b";
23 #address-cells = <1>; 22 #address-cells = <1>;
24 #size-cells = <1>; 23 #size-cells = <1>;
@@ -48,30 +47,27 @@
48 soc5200@f0000000 { 47 soc5200@f0000000 {
49 #address-cells = <1>; 48 #address-cells = <1>;
50 #size-cells = <1>; 49 #size-cells = <1>;
51 model = "fsl,mpc5200b"; 50 compatible = "fsl,mpc5200b-immr";
52 compatible = "mpc5200";
53 revision = ""; // from bootloader
54 device_type = "soc";
55 ranges = <0 f0000000 0000c000>; 51 ranges = <0 f0000000 0000c000>;
56 reg = <f0000000 00000100>; 52 reg = <f0000000 00000100>;
57 bus-frequency = <0>; // from bootloader 53 bus-frequency = <0>; // from bootloader
58 system-frequency = <0>; // from bootloader 54 system-frequency = <0>; // from bootloader
59 55
60 cdm@200 { 56 cdm@200 {
61 compatible = "mpc5200b-cdm","mpc5200-cdm"; 57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
62 reg = <200 38>; 58 reg = <200 38>;
63 }; 59 };
64 60
65 mpc5200_pic: pic@500 { 61 mpc5200_pic: interrupt-controller@500 {
66 // 5200 interrupts are encoded into two levels; 62 // 5200 interrupts are encoded into two levels;
67 interrupt-controller; 63 interrupt-controller;
68 #interrupt-cells = <3>; 64 #interrupt-cells = <3>;
69 device_type = "interrupt-controller"; 65 device_type = "interrupt-controller";
70 compatible = "mpc5200b-pic","mpc5200-pic"; 66 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
71 reg = <500 80>; 67 reg = <500 80>;
72 }; 68 };
73 69
74 gpt@600 { // General Purpose Timer 70 timer@600 { // General Purpose Timer
75 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 71 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
76 cell-index = <0>; 72 cell-index = <0>;
77 reg = <600 10>; 73 reg = <600 10>;
@@ -80,7 +76,7 @@
80 fsl,has-wdt; 76 fsl,has-wdt;
81 }; 77 };
82 78
83 gpt@610 { // General Purpose Timer 79 timer@610 { // General Purpose Timer
84 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
85 cell-index = <1>; 81 cell-index = <1>;
86 reg = <610 10>; 82 reg = <610 10>;
@@ -88,7 +84,7 @@
88 interrupt-parent = <&mpc5200_pic>; 84 interrupt-parent = <&mpc5200_pic>;
89 }; 85 };
90 86
91 gpt@620 { // General Purpose Timer 87 timer@620 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
93 cell-index = <2>; 89 cell-index = <2>;
94 reg = <620 10>; 90 reg = <620 10>;
@@ -96,7 +92,7 @@
96 interrupt-parent = <&mpc5200_pic>; 92 interrupt-parent = <&mpc5200_pic>;
97 }; 93 };
98 94
99 gpt@630 { // General Purpose Timer 95 timer@630 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 96 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 cell-index = <3>; 97 cell-index = <3>;
102 reg = <630 10>; 98 reg = <630 10>;
@@ -104,7 +100,7 @@
104 interrupt-parent = <&mpc5200_pic>; 100 interrupt-parent = <&mpc5200_pic>;
105 }; 101 };
106 102
107 gpt@640 { // General Purpose Timer 103 timer@640 { // General Purpose Timer
108 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
109 cell-index = <4>; 105 cell-index = <4>;
110 reg = <640 10>; 106 reg = <640 10>;
@@ -112,7 +108,7 @@
112 interrupt-parent = <&mpc5200_pic>; 108 interrupt-parent = <&mpc5200_pic>;
113 }; 109 };
114 110
115 gpt@650 { // General Purpose Timer 111 timer@650 { // General Purpose Timer
116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 112 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
117 cell-index = <5>; 113 cell-index = <5>;
118 reg = <650 10>; 114 reg = <650 10>;
@@ -120,7 +116,7 @@
120 interrupt-parent = <&mpc5200_pic>; 116 interrupt-parent = <&mpc5200_pic>;
121 }; 117 };
122 118
123 gpt@660 { // General Purpose Timer 119 timer@660 { // General Purpose Timer
124 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
125 cell-index = <6>; 121 cell-index = <6>;
126 reg = <660 10>; 122 reg = <660 10>;
@@ -128,7 +124,7 @@
128 interrupt-parent = <&mpc5200_pic>; 124 interrupt-parent = <&mpc5200_pic>;
129 }; 125 };
130 126
131 gpt@670 { // General Purpose Timer 127 timer@670 { // General Purpose Timer
132 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 128 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
133 cell-index = <7>; 129 cell-index = <7>;
134 reg = <670 10>; 130 reg = <670 10>;
@@ -137,25 +133,23 @@
137 }; 133 };
138 134
139 rtc@800 { // Real time clock 135 rtc@800 { // Real time clock
140 compatible = "mpc5200b-rtc","mpc5200-rtc"; 136 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
141 device_type = "rtc"; 137 device_type = "rtc";
142 reg = <800 100>; 138 reg = <800 100>;
143 interrupts = <1 5 0 1 6 0>; 139 interrupts = <1 5 0 1 6 0>;
144 interrupt-parent = <&mpc5200_pic>; 140 interrupt-parent = <&mpc5200_pic>;
145 }; 141 };
146 142
147 mscan@900 { 143 can@900 {
148 device_type = "mscan"; 144 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
149 compatible = "mpc5200b-mscan","mpc5200-mscan";
150 cell-index = <0>; 145 cell-index = <0>;
151 interrupts = <2 11 0>; 146 interrupts = <2 11 0>;
152 interrupt-parent = <&mpc5200_pic>; 147 interrupt-parent = <&mpc5200_pic>;
153 reg = <900 80>; 148 reg = <900 80>;
154 }; 149 };
155 150
156 mscan@980 { 151 can@980 {
157 device_type = "mscan"; 152 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
158 compatible = "mpc5200b-mscan","mpc5200-mscan";
159 cell-index = <1>; 153 cell-index = <1>;
160 interrupts = <2 12 0>; 154 interrupts = <2 12 0>;
161 interrupt-parent = <&mpc5200_pic>; 155 interrupt-parent = <&mpc5200_pic>;
@@ -163,38 +157,36 @@
163 }; 157 };
164 158
165 gpio@b00 { 159 gpio@b00 {
166 compatible = "mpc5200b-gpio","mpc5200-gpio"; 160 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
167 reg = <b00 40>; 161 reg = <b00 40>;
168 interrupts = <1 7 0>; 162 interrupts = <1 7 0>;
169 interrupt-parent = <&mpc5200_pic>; 163 interrupt-parent = <&mpc5200_pic>;
170 }; 164 };
171 165
172 gpio-wkup@c00 { 166 gpio@c00 {
173 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 167 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
174 reg = <c00 40>; 168 reg = <c00 40>;
175 interrupts = <1 8 0 0 3 0>; 169 interrupts = <1 8 0 0 3 0>;
176 interrupt-parent = <&mpc5200_pic>; 170 interrupt-parent = <&mpc5200_pic>;
177 }; 171 };
178 172
179 spi@f00 { 173 spi@f00 {
180 device_type = "spi"; 174 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
181 compatible = "mpc5200b-spi","mpc5200-spi";
182 reg = <f00 20>; 175 reg = <f00 20>;
183 interrupts = <2 d 0 2 e 0>; 176 interrupts = <2 d 0 2 e 0>;
184 interrupt-parent = <&mpc5200_pic>; 177 interrupt-parent = <&mpc5200_pic>;
185 }; 178 };
186 179
187 usb@1000 { 180 usb@1000 {
188 device_type = "usb-ohci-be"; 181 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
189 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
190 reg = <1000 ff>; 182 reg = <1000 ff>;
191 interrupts = <2 6 0>; 183 interrupts = <2 6 0>;
192 interrupt-parent = <&mpc5200_pic>; 184 interrupt-parent = <&mpc5200_pic>;
193 }; 185 };
194 186
195 bestcomm@1200 { 187 dma-controller@1200 {
196 device_type = "dma-controller"; 188 device_type = "dma-controller";
197 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 189 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
198 reg = <1200 80>; 190 reg = <1200 80>;
199 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 191 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
200 3 4 0 3 5 0 3 6 0 3 7 0 192 3 4 0 3 5 0 3 6 0 3 7 0
@@ -204,13 +196,13 @@
204 }; 196 };
205 197
206 xlb@1f00 { 198 xlb@1f00 {
207 compatible = "mpc5200b-xlb","mpc5200-xlb"; 199 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
208 reg = <1f00 100>; 200 reg = <1f00 100>;
209 }; 201 };
210 202
211 serial@2000 { // PSC1 203 serial@2000 { // PSC1
212 device_type = "serial"; 204 device_type = "serial";
213 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
214 port-number = <0>; // Logical port assignment 206 port-number = <0>; // Logical port assignment
215 cell-index = <0>; 207 cell-index = <0>;
216 reg = <2000 100>; 208 reg = <2000 100>;
@@ -220,8 +212,7 @@
220 212
221 // PSC2 in ac97 mode example 213 // PSC2 in ac97 mode example
222 //ac97@2200 { // PSC2 214 //ac97@2200 { // PSC2
223 // device_type = "sound"; 215 // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
224 // compatible = "mpc5200b-psc-ac97","mpc5200-psc-ac97";
225 // cell-index = <1>; 216 // cell-index = <1>;
226 // reg = <2200 100>; 217 // reg = <2200 100>;
227 // interrupts = <2 2 0>; 218 // interrupts = <2 2 0>;
@@ -230,8 +221,7 @@
230 221
231 // PSC3 in CODEC mode example 222 // PSC3 in CODEC mode example
232 //i2s@2400 { // PSC3 223 //i2s@2400 { // PSC3
233 // device_type = "sound"; 224 // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
234 // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
235 // cell-index = <2>; 225 // cell-index = <2>;
236 // reg = <2400 100>; 226 // reg = <2400 100>;
237 // interrupts = <2 3 0>; 227 // interrupts = <2 3 0>;
@@ -241,7 +231,7 @@
241 // PSC4 in uart mode example 231 // PSC4 in uart mode example
242 //serial@2600 { // PSC4 232 //serial@2600 { // PSC4
243 // device_type = "serial"; 233 // device_type = "serial";
244 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 234 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
245 // cell-index = <3>; 235 // cell-index = <3>;
246 // reg = <2600 100>; 236 // reg = <2600 100>;
247 // interrupts = <2 b 0>; 237 // interrupts = <2 b 0>;
@@ -251,7 +241,7 @@
251 // PSC5 in uart mode example 241 // PSC5 in uart mode example
252 //serial@2800 { // PSC5 242 //serial@2800 { // PSC5
253 // device_type = "serial"; 243 // device_type = "serial";
254 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 244 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
255 // cell-index = <4>; 245 // cell-index = <4>;
256 // reg = <2800 100>; 246 // reg = <2800 100>;
257 // interrupts = <2 c 0>; 247 // interrupts = <2 c 0>;
@@ -260,8 +250,7 @@
260 250
261 // PSC6 in spi mode example 251 // PSC6 in spi mode example
262 //spi@2c00 { // PSC6 252 //spi@2c00 { // PSC6
263 // device_type = "spi"; 253 // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
264 // compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
265 // cell-index = <5>; 254 // cell-index = <5>;
266 // reg = <2c00 100>; 255 // reg = <2c00 100>;
267 // interrupts = <2 4 0>; 256 // interrupts = <2 4 0>;
@@ -270,9 +259,9 @@
270 259
271 ethernet@3000 { 260 ethernet@3000 {
272 device_type = "network"; 261 device_type = "network";
273 compatible = "mpc5200b-fec","mpc5200-fec"; 262 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
274 reg = <3000 400>; 263 reg = <3000 400>;
275 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 264 local-mac-address = [ 00 00 00 00 00 00 ];
276 interrupts = <2 5 0>; 265 interrupts = <2 5 0>;
277 interrupt-parent = <&mpc5200_pic>; 266 interrupt-parent = <&mpc5200_pic>;
278 phy-handle = <&phy0>; 267 phy-handle = <&phy0>;
@@ -281,8 +270,7 @@
281 mdio@3000 { 270 mdio@3000 {
282 #address-cells = <1>; 271 #address-cells = <1>;
283 #size-cells = <0>; 272 #size-cells = <0>;
284 device_type = "mdio"; 273 compatible = "fsl,mpc5200b-mdio";
285 compatible = "mpc5200b-fec-phy";
286 reg = <3000 400>; // fec range, since we need to setup fec interrupts 274 reg = <3000 400>; // fec range, since we need to setup fec interrupts
287 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 275 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
288 interrupt-parent = <&mpc5200_pic>; 276 interrupt-parent = <&mpc5200_pic>;
@@ -295,7 +283,7 @@
295 283
296 ata@3a00 { 284 ata@3a00 {
297 device_type = "ata"; 285 device_type = "ata";
298 compatible = "mpc5200b-ata","mpc5200-ata"; 286 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
299 reg = <3a00 100>; 287 reg = <3a00 100>;
300 interrupts = <2 7 0>; 288 interrupts = <2 7 0>;
301 interrupt-parent = <&mpc5200_pic>; 289 interrupt-parent = <&mpc5200_pic>;
@@ -304,7 +292,7 @@
304 i2c@3d00 { 292 i2c@3d00 {
305 #address-cells = <1>; 293 #address-cells = <1>;
306 #size-cells = <0>; 294 #size-cells = <0>;
307 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 295 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
308 cell-index = <0>; 296 cell-index = <0>;
309 reg = <3d00 40>; 297 reg = <3d00 40>;
310 interrupts = <2 f 0>; 298 interrupts = <2 f 0>;
@@ -315,7 +303,7 @@
315 i2c@3d40 { 303 i2c@3d40 {
316 #address-cells = <1>; 304 #address-cells = <1>;
317 #size-cells = <0>; 305 #size-cells = <0>;
318 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 306 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
319 cell-index = <1>; 307 cell-index = <1>;
320 reg = <3d40 40>; 308 reg = <3d40 40>;
321 interrupts = <2 10 0>; 309 interrupts = <2 10 0>;
@@ -323,8 +311,7 @@
323 fsl5200-clocking; 311 fsl5200-clocking;
324 }; 312 };
325 sram@8000 { 313 sram@8000 {
326 device_type = "sram"; 314 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
327 compatible = "mpc5200b-sram","mpc5200-sram","sram";
328 reg = <8000 4000>; 315 reg = <8000 4000>;
329 }; 316 };
330 }; 317 };
@@ -334,7 +321,7 @@
334 #size-cells = <2>; 321 #size-cells = <2>;
335 #address-cells = <3>; 322 #address-cells = <3>;
336 device_type = "pci"; 323 device_type = "pci";
337 compatible = "mpc5200b-pci","mpc5200-pci"; 324 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
338 reg = <f0000d00 100>; 325 reg = <f0000d00 100>;
339 interrupt-map-mask = <f800 0 0 7>; 326 interrupt-map-mask = <f800 0 0 7>;
340 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 327 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 00:59:03 -0500