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authorStefan Roese <sr@denx.de>2007-12-15 03:10:56 -0500
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 14:36:33 -0500
commitdc88416b098a1e0bde82dc4e00ed95109681ab5c (patch)
tree821f2c7f6740ac5d7fb58c0c508cb9c1ea7d6852 /arch/powerpc/boot/dts/kilauea.dts
parent8aaed98c1e28a2c803309fcb2d32761bba4bee09 (diff)
[POWERPC] 4xx: Change Kilauea PCIe bus ranges in dts file
Currently we have some limitations in the 4xx PCIe driver and can't support all possible PCIe busses. But the current limits in the dts file are quite low (only 16 busses per RC). This patch increases the number to 64 per RC. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dts/kilauea.dts')
-rw-r--r--arch/powerpc/boot/dts/kilauea.dts8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 38141991310f..67c7ea179a07 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -284,8 +284,8 @@
284 /* Inbound 2GB range starting at 0 */ 284 /* Inbound 2GB range starting at 0 */
285 dma-ranges = <42000000 0 0 0 0 80000000>; 285 dma-ranges = <42000000 0 0 0 0 80000000>;
286 286
287 /* This drives busses 0x00 to 0x0f */ 287 /* This drives busses 0x00 to 0x3f */
288 bus-range = <00 0f>; 288 bus-range = <00 3f>;
289 289
290 /* Legacy interrupts (note the weird polarity, the bridge seems 290 /* Legacy interrupts (note the weird polarity, the bridge seems
291 * to invert PCIe legacy interrupts). 291 * to invert PCIe legacy interrupts).
@@ -325,8 +325,8 @@
325 /* Inbound 2GB range starting at 0 */ 325 /* Inbound 2GB range starting at 0 */
326 dma-ranges = <42000000 0 0 0 0 80000000>; 326 dma-ranges = <42000000 0 0 0 0 80000000>;
327 327
328 /* This drives busses 0x10 to 0x1f */ 328 /* This drives busses 0x40 to 0x7f */
329 bus-range = <10 1f>; 329 bus-range = <40 7f>;
330 330
331 /* Legacy interrupts (note the weird polarity, the bridge seems 331 /* Legacy interrupts (note the weird polarity, the bridge seems
332 * to invert PCIe legacy interrupts). 332 * to invert PCIe legacy interrupts).