diff options
author | Stefan Roese <sr@denx.de> | 2007-12-20 23:39:38 -0500 |
---|---|---|
committer | Josh Boyer <jwboyer@linux.vnet.ibm.com> | 2007-12-23 14:19:03 -0500 |
commit | accf5ef254b9dd4d3b53040dd73d80875c2cd39b (patch) | |
tree | 93ef10f49c2b5d3b4f8874ea713bac93e0a1eeb8 /arch/powerpc/boot/dts/katmai.dts | |
parent | 25c24f3dc7f01491ea0d92a1de2bb84094b27e21 (diff) |
[POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe
This patch adds runtime detection of the 440SPe revision A chips. These
chips are equipped with a slighly different PCIe core and need special/
different initialization. The compatible node is changed to
"plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that
can be equipped with both PPC revisions like the AMCC Yucca.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dts/katmai.dts')
-rw-r--r-- | arch/powerpc/boot/dts/katmai.dts | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index cc2810e05516..d4dedc2e44cc 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts | |||
@@ -267,7 +267,7 @@ | |||
267 | #interrupt-cells = <1>; | 267 | #interrupt-cells = <1>; |
268 | #size-cells = <2>; | 268 | #size-cells = <2>; |
269 | #address-cells = <3>; | 269 | #address-cells = <3>; |
270 | compatible = "ibm,plb-pciex-440speB", "ibm,plb-pciex"; | 270 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
271 | primary; | 271 | primary; |
272 | port = <0>; /* port number */ | 272 | port = <0>; /* port number */ |
273 | reg = <d 00000000 20000000 /* Config space access */ | 273 | reg = <d 00000000 20000000 /* Config space access */ |
@@ -308,7 +308,7 @@ | |||
308 | #interrupt-cells = <1>; | 308 | #interrupt-cells = <1>; |
309 | #size-cells = <2>; | 309 | #size-cells = <2>; |
310 | #address-cells = <3>; | 310 | #address-cells = <3>; |
311 | compatible = "ibm,plb-pciex-440speB", "ibm,plb-pciex"; | 311 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
312 | primary; | 312 | primary; |
313 | port = <1>; /* port number */ | 313 | port = <1>; /* port number */ |
314 | reg = <d 20000000 20000000 /* Config space access */ | 314 | reg = <d 20000000 20000000 /* Config space access */ |
@@ -349,7 +349,7 @@ | |||
349 | #interrupt-cells = <1>; | 349 | #interrupt-cells = <1>; |
350 | #size-cells = <2>; | 350 | #size-cells = <2>; |
351 | #address-cells = <3>; | 351 | #address-cells = <3>; |
352 | compatible = "ibm,plb-pciex-440speB", "ibm,plb-pciex"; | 352 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
353 | primary; | 353 | primary; |
354 | port = <2>; /* port number */ | 354 | port = <2>; /* port number */ |
355 | reg = <d 40000000 20000000 /* Config space access */ | 355 | reg = <d 40000000 20000000 /* Config space access */ |