[POWERPC] Convert remaining dts-v0 files to v1

At the moment we have a mixture of left-over version 0 and new-format
version 1 files in arch/powerpc/boot/dts.  This is potentially
confusing to people new to the dts format attempting to figure it out.

So, this patch converts all the as-yet unconverted dts v0 files and
converts them to v1.  They're mechanically-converted, and not hand
tweaked so in some cases they're not 100% in keeping with usual v1
style, but the convertor program does have some heuristics so the
discrepancies aren't too bad.

I have checked that this patch produces no changes to the resulting
dtb binaries.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

1 files changed, 51 insertions, 49 deletions

diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts
index 92938557ac8a..53ef06cc2134 100644
--- a/arch/powerpc/boot/dts/ep405.dts
+++ b/arch/powerpc/boot/dts/ep405.dts
@@ -9,12 +9,14 @@
  * any warranty of any kind, whether express or implied.
  */
 
+/dts-v1/;
+
 / {
         #address-cells = <1>;
         #size-cells = <1>;
         model = "ep405";
         compatible = "ep405";
-        dcr-parent = <&/cpus/cpu@0>;
+        dcr-parent = <&{/cpus/cpu@0}>;
 
         aliases {
                 ethernet0 = &EMAC;
@@ -29,13 +31,13 @@
                 cpu@0 {
                         device_type = "cpu";
                         model = "PowerPC,405GP";
-                        reg = <0>;
-                        clock-frequency = <bebc200>; /* Filled in by zImage */
+                        reg = <0x00000000>;
+                        clock-frequency = <200000000>; /* Filled in by zImage */
                         timebase-frequency = <0>; /* Filled in by zImage */
-                        i-cache-line-size = <20>;
-                        d-cache-line-size = <20>;
-                        i-cache-size = <4000>;
-                        d-cache-size = <4000>;
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <16384>;
+                        d-cache-size = <16384>;
                         dcr-controller;
                         dcr-access-method = "native";
                 };
@@ -43,14 +45,14 @@
 
         memory {
                 device_type = "memory";
-                reg = <0 0>; /* Filled in by zImage */
+                reg = <0x00000000 0x00000000>; /* Filled in by zImage */
         };
 
         UIC0: interrupt-controller {
                 compatible = "ibm,uic";
                 interrupt-controller;
                 cell-index = <0>;
-                dcr-reg = <0c0 9>;
+                dcr-reg = <0x0c0 0x009>;
                 #address-cells = <0>;
                 #size-cells = <0>;
                 #interrupt-cells = <2>;
@@ -65,91 +67,91 @@
 
                 SDRAM0: memory-controller {
                         compatible = "ibm,sdram-405gp";
-                        dcr-reg = <010 2>;
+                        dcr-reg = <0x010 0x002>;
                 };
 
                 MAL: mcmal {
                         compatible = "ibm,mcmal-405gp", "ibm,mcmal";
-                        dcr-reg = <180 62>;
+                        dcr-reg = <0x180 0x062>;
                         num-tx-chans = <1>;
                         num-rx-chans = <1>;
                         interrupt-parent = <&UIC0>;
                         interrupts = <
-                                b 4 /* TXEOB */
-                                c 4 /* RXEOB */
-                                a 4 /* SERR */
-                                d 4 /* TXDE */
-                                e 4 /* RXDE */>;
+                                0xb 0x4 /* TXEOB */
+                                0xc 0x4 /* RXEOB */
+                                0xa 0x4 /* SERR */
+                                0xd 0x4 /* TXDE */
+                                0xe 0x4 /* RXDE */>;
                 };
 
                 POB0: opb {
                         compatible = "ibm,opb-405gp", "ibm,opb";
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        ranges = <ef600000 ef600000 a00000>;
-                        dcr-reg = <0a0 5>;
+                        ranges = <0xef600000 0xef600000 0x00a00000>;
+                        dcr-reg = <0x0a0 0x005>;
                         clock-frequency = <0>; /* Filled in by zImage */
 
                         UART0: serial@ef600300 {
                                 device_type = "serial";
                                 compatible = "ns16550";
-                                reg = <ef600300 8>;
-                                virtual-reg = <ef600300>;
+                                reg = <0xef600300 0x00000008>;
+                                virtual-reg = <0xef600300>;
                                 clock-frequency = <0>; /* Filled in by zImage */
-                                current-speed = <2580>;
+                                current-speed = <9600>;
                                 interrupt-parent = <&UIC0>;
-                                interrupts = <0 4>;
+                                interrupts = <0x0 0x4>;
                         };
 
                         UART1: serial@ef600400 {
                                 device_type = "serial";
                                 compatible = "ns16550";
-                                reg = <ef600400 8>;
-                                virtual-reg = <ef600400>;
+                                reg = <0xef600400 0x00000008>;
+                                virtual-reg = <0xef600400>;
                                 clock-frequency = <0>; /* Filled in by zImage */
-                                current-speed = <2580>;
+                                current-speed = <9600>;
                                 interrupt-parent = <&UIC0>;
-                                interrupts = <1 4>;
+                                interrupts = <0x1 0x4>;
                         };
 
                         IIC: i2c@ef600500 {
                                 compatible = "ibm,iic-405gp", "ibm,iic";
-                                reg = <ef600500 11>;
+                                reg = <0xef600500 0x00000011>;
                                 interrupt-parent = <&UIC0>;
-                                interrupts = <2 4>;
+                                interrupts = <0x2 0x4>;
                         };
 
                         GPIO: gpio@ef600700 {
                                 compatible = "ibm,gpio-405gp";
-                                reg = <ef600700 20>;
+                                reg = <0xef600700 0x00000020>;
                         };
 
                         EMAC: ethernet@ef600800 {
-                                linux,network-index = <0>;
+                                linux,network-index = <0x0>;
                                 device_type = "network";
                                 compatible = "ibm,emac-405gp", "ibm,emac";
                                 interrupt-parent = <&UIC0>;
                                 interrupts = <
-                                        f 4 /* Ethernet */
-                                        9 4 /* Ethernet Wake Up */>;
+                                        0xf 0x4 /* Ethernet */
+                                        0x9 0x4 /* Ethernet Wake Up */>;
                                 local-mac-address = [000000000000]; /* Filled in by zImage */
-                                reg = <ef600800 70>;
+                                reg = <0xef600800 0x00000070>;
                                 mal-device = <&MAL>;
                                 mal-tx-channel = <0>;
                                 mal-rx-channel = <0>;
                                 cell-index = <0>;
-                                max-frame-size = <5dc>;
-                                rx-fifo-size = <1000>;
-                                tx-fifo-size = <800>;
+                                max-frame-size = <1500>;
+                                rx-fifo-size = <4096>;
+                                tx-fifo-size = <2048>;
                                 phy-mode = "rmii";
-                                phy-map = <00000000>;
+                                phy-map = <0x00000000>;
                         };
 
                 };
 
                 EBC0: ebc {
                         compatible = "ibm,ebc-405gp", "ibm,ebc";
-                        dcr-reg = <012 2>;
+                        dcr-reg = <0x012 0x002>;
                         #address-cells = <2>;
                         #size-cells = <1>;
 
@@ -163,13 +165,13 @@
                         /* NVRAM and RTC */
                         nvrtc@4,200000 {
                                 compatible = "ds1742";
-                                reg = <4 200000 0>; /* size fixed up by zImage */
+                                reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */
                         };
 
                         /* "BCSR" CPLD contains a PCI irq controller */
                         bcsr@4,0 {
                                 compatible = "ep405-bcsr";
-                                reg = <4 0 10>;
+                                reg = <0x00000004 0x00000000 0x00000010>;
                                 interrupt-controller;
                                 /* Routing table */
                                 irq-routing = [ 00      /* SYSERR */
@@ -198,26 +200,26 @@
                         #address-cells = <3>;
                         compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
                         primary;
-                        reg = <eec00000 8       /* Config space access */
-                               eed80000 4       /* IACK */
-                               eed80000 4       /* Special cycle */
-                               ef480000 40>;    /* Internal registers */
+                        reg = <0xeec00000 0x00000008    /* Config space access */
+                               0xeed80000 0x00000004    /* IACK */
+                               0xeed80000 0x00000004    /* Special cycle */
+                               0xef480000 0x00000040>;  /* Internal registers */
 
                         /* Outbound ranges, one memory and one IO,
                          * later cannot be changed. Chip supports a second
                          * IO range but we don't use it for now
                          */
-                        ranges = <02000000 0 80000000 80000000 0 20000000
-                                  01000000 0 00000000 e8000000 0 00010000>;
+                        ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+                                  0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
 
                         /* Inbound 2GB range starting at 0 */
-                        dma-ranges = <42000000 0 0 0 0 80000000>;
+                        dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
 
                         /* That's all I know about IRQs on that thing ... */
-                        interrupt-map-mask = <f800 0 0 0>;
+                        interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
                         interrupt-map = <
                                 /* USB */
-                                7000 0 0 0 &UIC0 1e 8 /* IRQ5 */
+                                0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */
                         >;
                 };
         };