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authorGrant Likely <grant.likely@secretlab.ca>2008-01-25 00:25:31 -0500
committerGrant Likely <grant.likely@secretlab.ca>2008-01-26 17:32:11 -0500
commit24ce6bc4a2b75509b29372f1e5e7e0fe51d98e66 (patch)
treea0dae7f428373307312d2bccac59ec5dc35f4af7 /arch/powerpc/boot/dts/cm5200.dts
parent66ffbe490b6156898364b3f20a571a78f8d77bc8 (diff)
[POWERPC] mpc5200: make dts files conform to generic names recommended practice
Modify mpc5200 dts files to match Open Firmware's Generic Names recommended practice. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'arch/powerpc/boot/dts/cm5200.dts')
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts58
1 files changed, 27 insertions, 31 deletions
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 2b88a58791ac..30737eafe68e 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -47,17 +47,14 @@
47 soc5200@f0000000 { 47 soc5200@f0000000 {
48 #address-cells = <1>; 48 #address-cells = <1>;
49 #size-cells = <1>; 49 #size-cells = <1>;
50 model = "fsl,mpc5200b"; 50 compatible = "fsl,mpc5200b-immr";
51 compatible = "fsl,mpc5200b";
52 revision = ""; // from bootloader
53 device_type = "soc";
54 ranges = <0 f0000000 0000c000>; 51 ranges = <0 f0000000 0000c000>;
55 reg = <f0000000 00000100>; 52 reg = <f0000000 00000100>;
56 bus-frequency = <0>; // from bootloader 53 bus-frequency = <0>; // from bootloader
57 system-frequency = <0>; // from bootloader 54 system-frequency = <0>; // from bootloader
58 55
59 cdm@200 { 56 cdm@200 {
60 compatible = "mpc5200b-cdm","mpc5200-cdm"; 57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
61 reg = <200 38>; 58 reg = <200 38>;
62 }; 59 };
63 60
@@ -65,11 +62,11 @@
65 // 5200 interrupts are encoded into two levels; 62 // 5200 interrupts are encoded into two levels;
66 interrupt-controller; 63 interrupt-controller;
67 #interrupt-cells = <3>; 64 #interrupt-cells = <3>;
68 compatible = "mpc5200b-pic","mpc5200-pic"; 65 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
69 reg = <500 80>; 66 reg = <500 80>;
70 }; 67 };
71 68
72 gpt@600 { // General Purpose Timer 69 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 70 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
74 reg = <600 10>; 71 reg = <600 10>;
75 interrupts = <1 9 0>; 72 interrupts = <1 9 0>;
@@ -77,49 +74,49 @@
77 fsl,has-wdt; 74 fsl,has-wdt;
78 }; 75 };
79 76
80 gpt@610 { // General Purpose Timer 77 timer@610 { // General Purpose Timer
81 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 78 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 reg = <610 10>; 79 reg = <610 10>;
83 interrupts = <1 a 0>; 80 interrupts = <1 a 0>;
84 interrupt-parent = <&mpc5200_pic>; 81 interrupt-parent = <&mpc5200_pic>;
85 }; 82 };
86 83
87 gpt@620 { // General Purpose Timer 84 timer@620 { // General Purpose Timer
88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 85 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
89 reg = <620 10>; 86 reg = <620 10>;
90 interrupts = <1 b 0>; 87 interrupts = <1 b 0>;
91 interrupt-parent = <&mpc5200_pic>; 88 interrupt-parent = <&mpc5200_pic>;
92 }; 89 };
93 90
94 gpt@630 { // General Purpose Timer 91 timer@630 { // General Purpose Timer
95 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
96 reg = <630 10>; 93 reg = <630 10>;
97 interrupts = <1 c 0>; 94 interrupts = <1 c 0>;
98 interrupt-parent = <&mpc5200_pic>; 95 interrupt-parent = <&mpc5200_pic>;
99 }; 96 };
100 97
101 gpt@640 { // General Purpose Timer 98 timer@640 { // General Purpose Timer
102 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 99 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
103 reg = <640 10>; 100 reg = <640 10>;
104 interrupts = <1 d 0>; 101 interrupts = <1 d 0>;
105 interrupt-parent = <&mpc5200_pic>; 102 interrupt-parent = <&mpc5200_pic>;
106 }; 103 };
107 104
108 gpt@650 { // General Purpose Timer 105 timer@650 { // General Purpose Timer
109 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
110 reg = <650 10>; 107 reg = <650 10>;
111 interrupts = <1 e 0>; 108 interrupts = <1 e 0>;
112 interrupt-parent = <&mpc5200_pic>; 109 interrupt-parent = <&mpc5200_pic>;
113 }; 110 };
114 111
115 gpt@660 { // General Purpose Timer 112 timer@660 { // General Purpose Timer
116 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 113 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
117 reg = <660 10>; 114 reg = <660 10>;
118 interrupts = <1 f 0>; 115 interrupts = <1 f 0>;
119 interrupt-parent = <&mpc5200_pic>; 116 interrupt-parent = <&mpc5200_pic>;
120 }; 117 };
121 118
122 gpt@670 { // General Purpose Timer 119 timer@670 { // General Purpose Timer
123 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
124 reg = <670 10>; 121 reg = <670 10>;
125 interrupts = <1 10 0>; 122 interrupts = <1 10 0>;
@@ -127,43 +124,42 @@
127 }; 124 };
128 125
129 rtc@800 { // Real time clock 126 rtc@800 { // Real time clock
130 compatible = "mpc5200b-rtc","mpc5200-rtc"; 127 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
131 reg = <800 100>; 128 reg = <800 100>;
132 interrupts = <1 5 0 1 6 0>; 129 interrupts = <1 5 0 1 6 0>;
133 interrupt-parent = <&mpc5200_pic>; 130 interrupt-parent = <&mpc5200_pic>;
134 }; 131 };
135 132
136 gpio@b00 { 133 gpio@b00 {
137 compatible = "mpc5200b-gpio","mpc5200-gpio"; 134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
138 reg = <b00 40>; 135 reg = <b00 40>;
139 interrupts = <1 7 0>; 136 interrupts = <1 7 0>;
140 interrupt-parent = <&mpc5200_pic>; 137 interrupt-parent = <&mpc5200_pic>;
141 }; 138 };
142 139
143 gpio-wkup@c00 { 140 gpio@c00 {
144 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 141 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
145 reg = <c00 40>; 142 reg = <c00 40>;
146 interrupts = <1 8 0 0 3 0>; 143 interrupts = <1 8 0 0 3 0>;
147 interrupt-parent = <&mpc5200_pic>; 144 interrupt-parent = <&mpc5200_pic>;
148 }; 145 };
149 146
150 spi@f00 { 147 spi@f00 {
151 compatible = "mpc5200b-spi","mpc5200-spi"; 148 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
152 reg = <f00 20>; 149 reg = <f00 20>;
153 interrupts = <2 d 0 2 e 0>; 150 interrupts = <2 d 0 2 e 0>;
154 interrupt-parent = <&mpc5200_pic>; 151 interrupt-parent = <&mpc5200_pic>;
155 }; 152 };
156 153
157 usb@1000 { 154 usb@1000 {
158 device_type = "usb-ohci-be"; 155 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
159 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
160 reg = <1000 ff>; 156 reg = <1000 ff>;
161 interrupts = <2 6 0>; 157 interrupts = <2 6 0>;
162 interrupt-parent = <&mpc5200_pic>; 158 interrupt-parent = <&mpc5200_pic>;
163 }; 159 };
164 160
165 dma-controller@1200 { 161 dma-controller@1200 {
166 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
167 reg = <1200 80>; 163 reg = <1200 80>;
168 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
169 3 4 0 3 5 0 3 6 0 3 7 0 165 3 4 0 3 5 0 3 6 0 3 7 0
@@ -173,13 +169,13 @@
173 }; 169 };
174 170
175 xlb@1f00 { 171 xlb@1f00 {
176 compatible = "mpc5200b-xlb","mpc5200-xlb"; 172 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
177 reg = <1f00 100>; 173 reg = <1f00 100>;
178 }; 174 };
179 175
180 serial@2000 { // PSC1 176 serial@2000 { // PSC1
181 device_type = "serial"; 177 device_type = "serial";
182 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 178 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
183 port-number = <0>; // Logical port assignment 179 port-number = <0>; // Logical port assignment
184 reg = <2000 100>; 180 reg = <2000 100>;
185 interrupts = <2 1 0>; 181 interrupts = <2 1 0>;
@@ -188,7 +184,7 @@
188 184
189 serial@2200 { // PSC2 185 serial@2200 { // PSC2
190 device_type = "serial"; 186 device_type = "serial";
191 compatible = "mpc5200-psc-uart"; 187 compatible = "fsl,mpc5200-psc-uart";
192 port-number = <1>; // Logical port assignment 188 port-number = <1>; // Logical port assignment
193 reg = <2200 100>; 189 reg = <2200 100>;
194 interrupts = <2 2 0>; 190 interrupts = <2 2 0>;
@@ -197,7 +193,7 @@
197 193
198 serial@2400 { // PSC3 194 serial@2400 { // PSC3
199 device_type = "serial"; 195 device_type = "serial";
200 compatible = "mpc5200-psc-uart"; 196 compatible = "fsl,mpc5200-psc-uart";
201 port-number = <2>; // Logical port assignment 197 port-number = <2>; // Logical port assignment
202 reg = <2400 100>; 198 reg = <2400 100>;
203 interrupts = <2 3 0>; 199 interrupts = <2 3 0>;
@@ -206,7 +202,7 @@
206 202
207 serial@2c00 { // PSC6 203 serial@2c00 { // PSC6
208 device_type = "serial"; 204 device_type = "serial";
209 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
210 port-number = <5>; // Logical port assignment 206 port-number = <5>; // Logical port assignment
211 reg = <2c00 100>; 207 reg = <2c00 100>;
212 interrupts = <2 4 0>; 208 interrupts = <2 4 0>;
@@ -215,15 +211,15 @@
215 211
216 ethernet@3000 { 212 ethernet@3000 {
217 device_type = "network"; 213 device_type = "network";
218 compatible = "mpc5200b-fec","mpc5200-fec"; 214 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
219 reg = <3000 800>; 215 reg = <3000 800>;
220 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 216 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupts = <2 5 0>; 217 interrupts = <2 5 0>;
222 interrupt-parent = <&mpc5200_pic>; 218 interrupt-parent = <&mpc5200_pic>;
223 }; 219 };
224 220
225 i2c@3d40 { 221 i2c@3d40 {
226 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 222 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
227 reg = <3d40 40>; 223 reg = <3d40 40>;
228 interrupts = <2 10 0>; 224 interrupts = <2 10 0>;
229 interrupt-parent = <&mpc5200_pic>; 225 interrupt-parent = <&mpc5200_pic>;
@@ -231,7 +227,7 @@
231 }; 227 };
232 228
233 sram@8000 { 229 sram@8000 {
234 compatible = "mpc5200b-sram","mpc5200-sram"; 230 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
235 reg = <8000 4000>; 231 reg = <8000 4000>;
236 }; 232 };
237 }; 233 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 08:43:17 -0500