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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-12-20 23:39:33 -0500
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2007-12-23 14:14:48 -0500
commit190de005384204ba4dc339c3d05f8d40f6b16643 (patch)
tree83fff853bdde49ec29e0fb488d8bf9578bec627a /arch/powerpc/boot/cuboot-taishan.c
parentbc0b4e7ffb528282df5f8ba9c7c3f60135603e9e (diff)
[POWERPC] 4xx: Rework clock probing in boot wrapper
This reworks the boot wrapper library function that probes the chip clocks. Better separate the base function that is used on 440GX,SPe,EP,... from the uart fixups as those need different device-tree path on different processors. Also, rework the function itself based on the arch/ppc code from Eugene Surovegin which I find more readable, and which handles one more bypass case. Also handle the subtle difference between 440EP/EPx and 440SPe/GX, on the former, PerClk is derived from the PLB clock while on the later, it's derived from the OPB. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/cuboot-taishan.c')
-rw-r--r--arch/powerpc/boot/cuboot-taishan.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/powerpc/boot/cuboot-taishan.c b/arch/powerpc/boot/cuboot-taishan.c
index afd828d050c0..f66455a45ab1 100644
--- a/arch/powerpc/boot/cuboot-taishan.c
+++ b/arch/powerpc/boot/cuboot-taishan.c
@@ -34,9 +34,7 @@ static void taishan_fixups(void)
34 registers */ 34 registers */
35 unsigned long sysclk = 33000000; 35 unsigned long sysclk = 33000000;
36 36
37 /* 440EP Clock logic is all but identical to 440GX 37 ibm440gx_fixup_clocks(sysclk, 6 * 1843200, 25000000);
38 so we just use that code for now at least */
39 ibm440ep_fixup_clocks(sysclk, 6 * 1843200);
40 38
41 ibm4xx_sdram_fixup_memsize(); 39 ibm4xx_sdram_fixup_memsize();
42 40