[POWERPC] Cell "Spider" MMIO workarounds

This patch implements a workaround for a Spider PCI host bridge bug
where it doesn't enforce some of the PCI ordering rules unless some
manual manipulation of a special register is done. In order to be
fully compliant with the PCI spec, I do this on every MMIO read
operation.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3e89d9d34937..9547aacc3193 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -476,6 +476,7 @@ config PPC_CELL_NATIVE
         select PPC_CELL
         select PPC_DCR_MMIO
         select PPC_OF_PLATFORM_PCI
+        select PPC_INDIRECT_IO
         select MPIC
         default n