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authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-20 17:38:14 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-20 17:40:31 -0400
commite3d2f927f788adcdabc42f8a1616f6cc56c53bbe (patch)
treeff051e33cff49e23f4c4ef84360f22cf7a1998c9 /arch/parisc
parenta9b6148d25f15ddfe9d7a7f3e526fdb64e7cf7da (diff)
parent81e192d6ce303b6792aa38ff35f41a1a7357f23a (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6: parisc: convert to generic compat_sys_ptrace parisc: add rtc platform driver parisc: initialize unwinder much earlier parisc: add new syscalls parisc: hijack jump to start_kernel parisc: add pdc_coproc_cfg_unlocked and set_firmware_width_unlocked parisc: move include/asm-parisc to arch/parisc/include/asm parisc: move pdc_result to real2.S parisc: unify CCIO_COLLECT_STATS implementation parisc: add arch/parisc/kernel/.gitignore parisc: ropes.h - fix <asm-parisc/*> -> <asm/*> parisc: parisc-agp - fix <asm-parisc/*> -> <asm/*> Resolve remove/rename conflict: include/asm-parisc/a.out.h is no longer relevant.
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/Kconfig2
-rw-r--r--arch/parisc/include/asm/Kbuild3
-rw-r--r--arch/parisc/include/asm/agp.h24
-rw-r--r--arch/parisc/include/asm/asmregs.h183
-rw-r--r--arch/parisc/include/asm/assembly.h519
-rw-r--r--arch/parisc/include/asm/atomic.h348
-rw-r--r--arch/parisc/include/asm/auxvec.h4
-rw-r--r--arch/parisc/include/asm/bitops.h239
-rw-r--r--arch/parisc/include/asm/bug.h92
-rw-r--r--arch/parisc/include/asm/bugs.h19
-rw-r--r--arch/parisc/include/asm/byteorder.h82
-rw-r--r--arch/parisc/include/asm/cache.h60
-rw-r--r--arch/parisc/include/asm/cacheflush.h121
-rw-r--r--arch/parisc/include/asm/checksum.h210
-rw-r--r--arch/parisc/include/asm/compat.h165
-rw-r--r--arch/parisc/include/asm/compat_rt_sigframe.h50
-rw-r--r--arch/parisc/include/asm/compat_signal.h2
-rw-r--r--arch/parisc/include/asm/compat_ucontext.h17
-rw-r--r--arch/parisc/include/asm/cputime.h6
-rw-r--r--arch/parisc/include/asm/current.h15
-rw-r--r--arch/parisc/include/asm/delay.h43
-rw-r--r--arch/parisc/include/asm/device.h7
-rw-r--r--arch/parisc/include/asm/div64.h1
-rw-r--r--arch/parisc/include/asm/dma-mapping.h253
-rw-r--r--arch/parisc/include/asm/dma.h186
-rw-r--r--arch/parisc/include/asm/eisa_bus.h23
-rw-r--r--arch/parisc/include/asm/eisa_eeprom.h153
-rw-r--r--arch/parisc/include/asm/elf.h342
-rw-r--r--arch/parisc/include/asm/emergency-restart.h6
-rw-r--r--arch/parisc/include/asm/errno.h124
-rw-r--r--arch/parisc/include/asm/fb.h19
-rw-r--r--arch/parisc/include/asm/fcntl.h39
-rw-r--r--arch/parisc/include/asm/fixmap.h30
-rw-r--r--arch/parisc/include/asm/floppy.h271
-rw-r--r--arch/parisc/include/asm/futex.h77
-rw-r--r--arch/parisc/include/asm/grfioctl.h113
-rw-r--r--arch/parisc/include/asm/hardirq.h29
-rw-r--r--arch/parisc/include/asm/hardware.h127
-rw-r--r--arch/parisc/include/asm/hw_irq.h8
-rw-r--r--arch/parisc/include/asm/ide.h57
-rw-r--r--arch/parisc/include/asm/io.h293
-rw-r--r--arch/parisc/include/asm/ioctl.h44
-rw-r--r--arch/parisc/include/asm/ioctls.h90
-rw-r--r--arch/parisc/include/asm/ipcbuf.h27
-rw-r--r--arch/parisc/include/asm/irq.h57
-rw-r--r--arch/parisc/include/asm/irq_regs.h1
-rw-r--r--arch/parisc/include/asm/kdebug.h1
-rw-r--r--arch/parisc/include/asm/kmap_types.h30
-rw-r--r--arch/parisc/include/asm/led.h42
-rw-r--r--arch/parisc/include/asm/linkage.h31
-rw-r--r--arch/parisc/include/asm/local.h1
-rw-r--r--arch/parisc/include/asm/machdep.h16
-rw-r--r--arch/parisc/include/asm/mc146818rtc.h9
-rw-r--r--arch/parisc/include/asm/mckinley.h9
-rw-r--r--arch/parisc/include/asm/mman.h61
-rw-r--r--arch/parisc/include/asm/mmu.h7
-rw-r--r--arch/parisc/include/asm/mmu_context.h75
-rw-r--r--arch/parisc/include/asm/mmzone.h73
-rw-r--r--arch/parisc/include/asm/module.h32
-rw-r--r--arch/parisc/include/asm/msgbuf.h37
-rw-r--r--arch/parisc/include/asm/mutex.h9
-rw-r--r--arch/parisc/include/asm/page.h173
-rw-r--r--arch/parisc/include/asm/param.h22
-rw-r--r--arch/parisc/include/asm/parisc-device.h64
-rw-r--r--arch/parisc/include/asm/parport.h18
-rw-r--r--arch/parisc/include/asm/pci.h294
-rw-r--r--arch/parisc/include/asm/pdc.h762
-rw-r--r--arch/parisc/include/asm/pdc_chassis.h381
-rw-r--r--arch/parisc/include/asm/pdcpat.h308
-rw-r--r--arch/parisc/include/asm/percpu.h7
-rw-r--r--arch/parisc/include/asm/perf.h74
-rw-r--r--arch/parisc/include/asm/pgalloc.h149
-rw-r--r--arch/parisc/include/asm/pgtable.h508
-rw-r--r--arch/parisc/include/asm/poll.h1
-rw-r--r--arch/parisc/include/asm/posix_types.h129
-rw-r--r--arch/parisc/include/asm/prefetch.h39
-rw-r--r--arch/parisc/include/asm/processor.h357
-rw-r--r--arch/parisc/include/asm/psw.h62
-rw-r--r--arch/parisc/include/asm/ptrace.h68
-rw-r--r--arch/parisc/include/asm/real.h5
-rw-r--r--arch/parisc/include/asm/resource.h7
-rw-r--r--arch/parisc/include/asm/ropes.h322
-rw-r--r--arch/parisc/include/asm/rt_sigframe.h23
-rw-r--r--arch/parisc/include/asm/rtc.h131
-rw-r--r--arch/parisc/include/asm/runway.h12
-rw-r--r--arch/parisc/include/asm/scatterlist.h27
-rw-r--r--arch/parisc/include/asm/sections.h12
-rw-r--r--arch/parisc/include/asm/segment.h6
-rw-r--r--arch/parisc/include/asm/sembuf.h29
-rw-r--r--arch/parisc/include/asm/serial.h10
-rw-r--r--arch/parisc/include/asm/setup.h6
-rw-r--r--arch/parisc/include/asm/shmbuf.h58
-rw-r--r--arch/parisc/include/asm/shmparam.h8
-rw-r--r--arch/parisc/include/asm/sigcontext.h20
-rw-r--r--arch/parisc/include/asm/siginfo.h9
-rw-r--r--arch/parisc/include/asm/signal.h153
-rw-r--r--arch/parisc/include/asm/smp.h68
-rw-r--r--arch/parisc/include/asm/socket.h62
-rw-r--r--arch/parisc/include/asm/sockios.h13
-rw-r--r--arch/parisc/include/asm/spinlock.h194
-rw-r--r--arch/parisc/include/asm/spinlock_types.h21
-rw-r--r--arch/parisc/include/asm/stat.h100
-rw-r--r--arch/parisc/include/asm/statfs.h7
-rw-r--r--arch/parisc/include/asm/string.h10
-rw-r--r--arch/parisc/include/asm/superio.h85
-rw-r--r--arch/parisc/include/asm/system.h182
-rw-r--r--arch/parisc/include/asm/termbits.h200
-rw-r--r--arch/parisc/include/asm/termios.h90
-rw-r--r--arch/parisc/include/asm/thread_info.h76
-rw-r--r--arch/parisc/include/asm/timex.h20
-rw-r--r--arch/parisc/include/asm/tlb.h27
-rw-r--r--arch/parisc/include/asm/tlbflush.h80
-rw-r--r--arch/parisc/include/asm/topology.h6
-rw-r--r--arch/parisc/include/asm/traps.h16
-rw-r--r--arch/parisc/include/asm/types.h36
-rw-r--r--arch/parisc/include/asm/uaccess.h244
-rw-r--r--arch/parisc/include/asm/ucontext.h12
-rw-r--r--arch/parisc/include/asm/unaligned.h16
-rw-r--r--arch/parisc/include/asm/unistd.h997
-rw-r--r--arch/parisc/include/asm/unwind.h79
-rw-r--r--arch/parisc/include/asm/user.h5
-rw-r--r--arch/parisc/include/asm/vga.h6
-rw-r--r--arch/parisc/include/asm/xor.h1
-rw-r--r--arch/parisc/kernel/.gitignore1
-rw-r--r--arch/parisc/kernel/asm-offsets.c3
-rw-r--r--arch/parisc/kernel/firmware.c69
-rw-r--r--arch/parisc/kernel/head.S2
-rw-r--r--arch/parisc/kernel/ptrace.c429
-rw-r--r--arch/parisc/kernel/real2.S12
-rw-r--r--arch/parisc/kernel/setup.c29
-rw-r--r--arch/parisc/kernel/syscall_table.S8
-rw-r--r--arch/parisc/kernel/time.c20
-rw-r--r--arch/parisc/kernel/unwind.c4
133 files changed, 12211 insertions, 287 deletions
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 2bd1f6ef5db0..644a70b1b04e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -9,6 +9,8 @@ config PARISC
9 def_bool y 9 def_bool y
10 select HAVE_IDE 10 select HAVE_IDE
11 select HAVE_OPROFILE 11 select HAVE_OPROFILE
12 select RTC_CLASS
13 select RTC_DRV_PARISC
12 help 14 help
13 The PA-RISC microprocessor is designed by Hewlett-Packard and used 15 The PA-RISC microprocessor is designed by Hewlett-Packard and used
14 in many of their workstations & servers (HP9000 700 and 800 series, 16 in many of their workstations & servers (HP9000 700 and 800 series,
diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild
new file mode 100644
index 000000000000..f88b252e419c
--- /dev/null
+++ b/arch/parisc/include/asm/Kbuild
@@ -0,0 +1,3 @@
1include include/asm-generic/Kbuild.asm
2
3unifdef-y += pdc.h
diff --git a/arch/parisc/include/asm/agp.h b/arch/parisc/include/asm/agp.h
new file mode 100644
index 000000000000..9651660da639
--- /dev/null
+++ b/arch/parisc/include/asm/agp.h
@@ -0,0 +1,24 @@
1#ifndef _ASM_PARISC_AGP_H
2#define _ASM_PARISC_AGP_H
3
4/*
5 * PARISC specific AGP definitions.
6 * Copyright (c) 2006 Kyle McMartin <kyle@parisc-linux.org>
7 *
8 */
9
10#define map_page_into_agp(page) /* nothing */
11#define unmap_page_from_agp(page) /* nothing */
12#define flush_agp_cache() mb()
13
14/* Convert a physical address to an address suitable for the GART. */
15#define phys_to_gart(x) (x)
16#define gart_to_phys(x) (x)
17
18/* GATT allocation. Returns/accepts GATT kernel virtual address. */
19#define alloc_gatt_pages(order) \
20 ((char *)__get_free_pages(GFP_KERNEL, (order)))
21#define free_gatt_pages(table, order) \
22 free_pages((unsigned long)(table), (order))
23
24#endif /* _ASM_PARISC_AGP_H */
diff --git a/arch/parisc/include/asm/asmregs.h b/arch/parisc/include/asm/asmregs.h
new file mode 100644
index 000000000000..d93c646e1887
--- /dev/null
+++ b/arch/parisc/include/asm/asmregs.h
@@ -0,0 +1,183 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef _PARISC_ASMREGS_H
20#define _PARISC_ASMREGS_H
21
22;! General Registers
23
24rp: .reg %r2
25arg3: .reg %r23
26arg2: .reg %r24
27arg1: .reg %r25
28arg0: .reg %r26
29dp: .reg %r27
30ret0: .reg %r28
31ret1: .reg %r29
32sl: .reg %r29
33sp: .reg %r30
34
35#if 0
36/* PA20_REVISIT */
37arg7: .reg r19
38arg6: .reg r20
39arg5: .reg r21
40arg4: .reg r22
41gp: .reg r27
42ap: .reg r29
43#endif
44
45
46r0: .reg %r0
47r1: .reg %r1
48r2: .reg %r2
49r3: .reg %r3
50r4: .reg %r4
51r5: .reg %r5
52r6: .reg %r6
53r7: .reg %r7
54r8: .reg %r8
55r9: .reg %r9
56r10: .reg %r10
57r11: .reg %r11
58r12: .reg %r12
59r13: .reg %r13
60r14: .reg %r14
61r15: .reg %r15
62r16: .reg %r16
63r17: .reg %r17
64r18: .reg %r18
65r19: .reg %r19
66r20: .reg %r20
67r21: .reg %r21
68r22: .reg %r22
69r23: .reg %r23
70r24: .reg %r24
71r25: .reg %r25
72r26: .reg %r26
73r27: .reg %r27
74r28: .reg %r28
75r29: .reg %r29
76r30: .reg %r30
77r31: .reg %r31
78
79
80;! Space Registers
81
82sr0: .reg %sr0
83sr1: .reg %sr1
84sr2: .reg %sr2
85sr3: .reg %sr3
86sr4: .reg %sr4
87sr5: .reg %sr5
88sr6: .reg %sr6
89sr7: .reg %sr7
90
91
92;! Floating Point Registers
93
94fr0: .reg %fr0
95fr1: .reg %fr1
96fr2: .reg %fr2
97fr3: .reg %fr3
98fr4: .reg %fr4
99fr5: .reg %fr5
100fr6: .reg %fr6
101fr7: .reg %fr7
102fr8: .reg %fr8
103fr9: .reg %fr9
104fr10: .reg %fr10
105fr11: .reg %fr11
106fr12: .reg %fr12
107fr13: .reg %fr13
108fr14: .reg %fr14
109fr15: .reg %fr15
110fr16: .reg %fr16
111fr17: .reg %fr17
112fr18: .reg %fr18
113fr19: .reg %fr19
114fr20: .reg %fr20
115fr21: .reg %fr21
116fr22: .reg %fr22
117fr23: .reg %fr23
118fr24: .reg %fr24
119fr25: .reg %fr25
120fr26: .reg %fr26
121fr27: .reg %fr27
122fr28: .reg %fr28
123fr29: .reg %fr29
124fr30: .reg %fr30
125fr31: .reg %fr31
126
127
128;! Control Registers
129
130rctr: .reg %cr0
131pidr1: .reg %cr8
132pidr2: .reg %cr9
133ccr: .reg %cr10
134sar: .reg %cr11
135pidr3: .reg %cr12
136pidr4: .reg %cr13
137iva: .reg %cr14
138eiem: .reg %cr15
139itmr: .reg %cr16
140pcsq: .reg %cr17
141pcoq: .reg %cr18
142iir: .reg %cr19
143isr: .reg %cr20
144ior: .reg %cr21
145ipsw: .reg %cr22
146eirr: .reg %cr23
147tr0: .reg %cr24
148tr1: .reg %cr25
149tr2: .reg %cr26
150tr3: .reg %cr27
151tr4: .reg %cr28
152tr5: .reg %cr29
153tr6: .reg %cr30
154tr7: .reg %cr31
155
156
157cr0: .reg %cr0
158cr8: .reg %cr8
159cr9: .reg %cr9
160cr10: .reg %cr10
161cr11: .reg %cr11
162cr12: .reg %cr12
163cr13: .reg %cr13
164cr14: .reg %cr14
165cr15: .reg %cr15
166cr16: .reg %cr16
167cr17: .reg %cr17
168cr18: .reg %cr18
169cr19: .reg %cr19
170cr20: .reg %cr20
171cr21: .reg %cr21
172cr22: .reg %cr22
173cr23: .reg %cr23
174cr24: .reg %cr24
175cr25: .reg %cr25
176cr26: .reg %cr26
177cr27: .reg %cr27
178cr28: .reg %cr28
179cr29: .reg %cr29
180cr30: .reg %cr30
181cr31: .reg %cr31
182
183#endif
diff --git a/arch/parisc/include/asm/assembly.h b/arch/parisc/include/asm/assembly.h
new file mode 100644
index 000000000000..ffb208840ecc
--- /dev/null
+++ b/arch/parisc/include/asm/assembly.h
@@ -0,0 +1,519 @@
1/*
2 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
3 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
4 * Copyright (C) 1999 SuSE GmbH
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef _PARISC_ASSEMBLY_H
22#define _PARISC_ASSEMBLY_H
23
24#define CALLEE_FLOAT_FRAME_SIZE 80
25
26#ifdef CONFIG_64BIT
27#define LDREG ldd
28#define STREG std
29#define LDREGX ldd,s
30#define LDREGM ldd,mb
31#define STREGM std,ma
32#define SHRREG shrd
33#define SHLREG shld
34#define ANDCM andcm,*
35#define COND(x) * ## x
36#define RP_OFFSET 16
37#define FRAME_SIZE 128
38#define CALLEE_REG_FRAME_SIZE 144
39#define ASM_ULONG_INSN .dword
40#else /* CONFIG_64BIT */
41#define LDREG ldw
42#define STREG stw
43#define LDREGX ldwx,s
44#define LDREGM ldwm
45#define STREGM stwm
46#define SHRREG shr
47#define SHLREG shlw
48#define ANDCM andcm
49#define COND(x) x
50#define RP_OFFSET 20
51#define FRAME_SIZE 64
52#define CALLEE_REG_FRAME_SIZE 128
53#define ASM_ULONG_INSN .word
54#endif
55
56#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
57
58#ifdef CONFIG_PA20
59#define LDCW ldcw,co
60#define BL b,l
61# ifdef CONFIG_64BIT
62# define LEVEL 2.0w
63# else
64# define LEVEL 2.0
65# endif
66#else
67#define LDCW ldcw
68#define BL bl
69#define LEVEL 1.1
70#endif
71
72#ifdef __ASSEMBLY__
73
74#ifdef CONFIG_64BIT
75/* the 64-bit pa gnu assembler unfortunately defaults to .level 1.1 or 2.0 so
76 * work around that for now... */
77 .level 2.0w
78#endif
79
80#include <asm/asm-offsets.h>
81#include <asm/page.h>
82
83#include <asm/asmregs.h>
84
85 sp = 30
86 gp = 27
87 ipsw = 22
88
89 /*
90 * We provide two versions of each macro to convert from physical
91 * to virtual and vice versa. The "_r1" versions take one argument
92 * register, but trashes r1 to do the conversion. The other
93 * version takes two arguments: a src and destination register.
94 * However, the source and destination registers can not be
95 * the same register.
96 */
97
98 .macro tophys grvirt, grphys
99 ldil L%(__PAGE_OFFSET), \grphys
100 sub \grvirt, \grphys, \grphys
101 .endm
102
103 .macro tovirt grphys, grvirt
104 ldil L%(__PAGE_OFFSET), \grvirt
105 add \grphys, \grvirt, \grvirt
106 .endm
107
108 .macro tophys_r1 gr
109 ldil L%(__PAGE_OFFSET), %r1
110 sub \gr, %r1, \gr
111 .endm
112
113 .macro tovirt_r1 gr
114 ldil L%(__PAGE_OFFSET), %r1
115 add \gr, %r1, \gr
116 .endm
117
118 .macro delay value
119 ldil L%\value, 1
120 ldo R%\value(1), 1
121 addib,UV,n -1,1,.
122 addib,NUV,n -1,1,.+8
123 nop
124 .endm
125
126 .macro debug value
127 .endm
128
129
130 /* Shift Left - note the r and t can NOT be the same! */
131 .macro shl r, sa, t
132 dep,z \r, 31-\sa, 32-\sa, \t
133 .endm
134
135 /* The PA 2.0 shift left */
136 .macro shlw r, sa, t
137 depw,z \r, 31-\sa, 32-\sa, \t
138 .endm
139
140 /* And the PA 2.0W shift left */
141 .macro shld r, sa, t
142 depd,z \r, 63-\sa, 64-\sa, \t
143 .endm
144
145 /* Shift Right - note the r and t can NOT be the same! */
146 .macro shr r, sa, t
147 extru \r, 31-\sa, 32-\sa, \t
148 .endm
149
150 /* pa20w version of shift right */
151 .macro shrd r, sa, t
152 extrd,u \r, 63-\sa, 64-\sa, \t
153 .endm
154
155 /* load 32-bit 'value' into 'reg' compensating for the ldil
156 * sign-extension when running in wide mode.
157 * WARNING!! neither 'value' nor 'reg' can be expressions
158 * containing '.'!!!! */
159 .macro load32 value, reg
160 ldil L%\value, \reg
161 ldo R%\value(\reg), \reg
162 .endm
163
164 .macro loadgp
165#ifdef CONFIG_64BIT
166 ldil L%__gp, %r27
167 ldo R%__gp(%r27), %r27
168#else
169 ldil L%$global$, %r27
170 ldo R%$global$(%r27), %r27
171#endif
172 .endm
173
174#define SAVE_SP(r, where) mfsp r, %r1 ! STREG %r1, where
175#define REST_SP(r, where) LDREG where, %r1 ! mtsp %r1, r
176#define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
177#define REST_CR(r, where) LDREG where, %r1 ! mtctl %r1, r
178
179 .macro save_general regs
180 STREG %r1, PT_GR1 (\regs)
181 STREG %r2, PT_GR2 (\regs)
182 STREG %r3, PT_GR3 (\regs)
183 STREG %r4, PT_GR4 (\regs)
184 STREG %r5, PT_GR5 (\regs)
185 STREG %r6, PT_GR6 (\regs)
186 STREG %r7, PT_GR7 (\regs)
187 STREG %r8, PT_GR8 (\regs)
188 STREG %r9, PT_GR9 (\regs)
189 STREG %r10, PT_GR10(\regs)
190 STREG %r11, PT_GR11(\regs)
191 STREG %r12, PT_GR12(\regs)
192 STREG %r13, PT_GR13(\regs)
193 STREG %r14, PT_GR14(\regs)
194 STREG %r15, PT_GR15(\regs)
195 STREG %r16, PT_GR16(\regs)
196 STREG %r17, PT_GR17(\regs)
197 STREG %r18, PT_GR18(\regs)
198 STREG %r19, PT_GR19(\regs)
199 STREG %r20, PT_GR20(\regs)
200 STREG %r21, PT_GR21(\regs)
201 STREG %r22, PT_GR22(\regs)
202 STREG %r23, PT_GR23(\regs)
203 STREG %r24, PT_GR24(\regs)
204 STREG %r25, PT_GR25(\regs)
205 /* r26 is saved in get_stack and used to preserve a value across virt_map */
206 STREG %r27, PT_GR27(\regs)
207 STREG %r28, PT_GR28(\regs)
208 /* r29 is saved in get_stack and used to point to saved registers */
209 /* r30 stack pointer saved in get_stack */
210 STREG %r31, PT_GR31(\regs)
211 .endm
212
213 .macro rest_general regs
214 /* r1 used as a temp in rest_stack and is restored there */
215 LDREG PT_GR2 (\regs), %r2
216 LDREG PT_GR3 (\regs), %r3
217 LDREG PT_GR4 (\regs), %r4
218 LDREG PT_GR5 (\regs), %r5
219 LDREG PT_GR6 (\regs), %r6
220 LDREG PT_GR7 (\regs), %r7
221 LDREG PT_GR8 (\regs), %r8
222 LDREG PT_GR9 (\regs), %r9
223 LDREG PT_GR10(\regs), %r10
224 LDREG PT_GR11(\regs), %r11
225 LDREG PT_GR12(\regs), %r12
226 LDREG PT_GR13(\regs), %r13
227 LDREG PT_GR14(\regs), %r14
228 LDREG PT_GR15(\regs), %r15
229 LDREG PT_GR16(\regs), %r16
230 LDREG PT_GR17(\regs), %r17
231 LDREG PT_GR18(\regs), %r18
232 LDREG PT_GR19(\regs), %r19
233 LDREG PT_GR20(\regs), %r20
234 LDREG PT_GR21(\regs), %r21
235 LDREG PT_GR22(\regs), %r22
236 LDREG PT_GR23(\regs), %r23
237 LDREG PT_GR24(\regs), %r24
238 LDREG PT_GR25(\regs), %r25
239 LDREG PT_GR26(\regs), %r26
240 LDREG PT_GR27(\regs), %r27
241 LDREG PT_GR28(\regs), %r28
242 /* r29 points to register save area, and is restored in rest_stack */
243 /* r30 stack pointer restored in rest_stack */
244 LDREG PT_GR31(\regs), %r31
245 .endm
246
247 .macro save_fp regs
248 fstd,ma %fr0, 8(\regs)
249 fstd,ma %fr1, 8(\regs)
250 fstd,ma %fr2, 8(\regs)
251 fstd,ma %fr3, 8(\regs)
252 fstd,ma %fr4, 8(\regs)
253 fstd,ma %fr5, 8(\regs)
254 fstd,ma %fr6, 8(\regs)
255 fstd,ma %fr7, 8(\regs)
256 fstd,ma %fr8, 8(\regs)
257 fstd,ma %fr9, 8(\regs)
258 fstd,ma %fr10, 8(\regs)
259 fstd,ma %fr11, 8(\regs)
260 fstd,ma %fr12, 8(\regs)
261 fstd,ma %fr13, 8(\regs)
262 fstd,ma %fr14, 8(\regs)
263 fstd,ma %fr15, 8(\regs)
264 fstd,ma %fr16, 8(\regs)
265 fstd,ma %fr17, 8(\regs)
266 fstd,ma %fr18, 8(\regs)
267 fstd,ma %fr19, 8(\regs)
268 fstd,ma %fr20, 8(\regs)
269 fstd,ma %fr21, 8(\regs)
270 fstd,ma %fr22, 8(\regs)
271 fstd,ma %fr23, 8(\regs)
272 fstd,ma %fr24, 8(\regs)
273 fstd,ma %fr25, 8(\regs)
274 fstd,ma %fr26, 8(\regs)
275 fstd,ma %fr27, 8(\regs)
276 fstd,ma %fr28, 8(\regs)
277 fstd,ma %fr29, 8(\regs)
278 fstd,ma %fr30, 8(\regs)
279 fstd %fr31, 0(\regs)
280 .endm
281
282 .macro rest_fp regs
283 fldd 0(\regs), %fr31
284 fldd,mb -8(\regs), %fr30
285 fldd,mb -8(\regs), %fr29
286 fldd,mb -8(\regs), %fr28
287 fldd,mb -8(\regs), %fr27
288 fldd,mb -8(\regs), %fr26
289 fldd,mb -8(\regs), %fr25
290 fldd,mb -8(\regs), %fr24
291 fldd,mb -8(\regs), %fr23
292 fldd,mb -8(\regs), %fr22
293 fldd,mb -8(\regs), %fr21
294 fldd,mb -8(\regs), %fr20
295 fldd,mb -8(\regs), %fr19
296 fldd,mb -8(\regs), %fr18
297 fldd,mb -8(\regs), %fr17
298 fldd,mb -8(\regs), %fr16
299 fldd,mb -8(\regs), %fr15
300 fldd,mb -8(\regs), %fr14
301 fldd,mb -8(\regs), %fr13
302 fldd,mb -8(\regs), %fr12
303 fldd,mb -8(\regs), %fr11
304 fldd,mb -8(\regs), %fr10
305 fldd,mb -8(\regs), %fr9
306 fldd,mb -8(\regs), %fr8
307 fldd,mb -8(\regs), %fr7
308 fldd,mb -8(\regs), %fr6
309 fldd,mb -8(\regs), %fr5
310 fldd,mb -8(\regs), %fr4
311 fldd,mb -8(\regs), %fr3
312 fldd,mb -8(\regs), %fr2
313 fldd,mb -8(\regs), %fr1
314 fldd,mb -8(\regs), %fr0
315 .endm
316
317 .macro callee_save_float
318 fstd,ma %fr12, 8(%r30)
319 fstd,ma %fr13, 8(%r30)
320 fstd,ma %fr14, 8(%r30)
321 fstd,ma %fr15, 8(%r30)
322 fstd,ma %fr16, 8(%r30)
323 fstd,ma %fr17, 8(%r30)
324 fstd,ma %fr18, 8(%r30)
325 fstd,ma %fr19, 8(%r30)
326 fstd,ma %fr20, 8(%r30)
327 fstd,ma %fr21, 8(%r30)
328 .endm
329
330 .macro callee_rest_float
331 fldd,mb -8(%r30), %fr21
332 fldd,mb -8(%r30), %fr20
333 fldd,mb -8(%r30), %fr19
334 fldd,mb -8(%r30), %fr18
335 fldd,mb -8(%r30), %fr17
336 fldd,mb -8(%r30), %fr16
337 fldd,mb -8(%r30), %fr15
338 fldd,mb -8(%r30), %fr14
339 fldd,mb -8(%r30), %fr13
340 fldd,mb -8(%r30), %fr12
341 .endm
342
343#ifdef CONFIG_64BIT
344 .macro callee_save
345 std,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
346 mfctl %cr27, %r3
347 std %r4, -136(%r30)
348 std %r5, -128(%r30)
349 std %r6, -120(%r30)
350 std %r7, -112(%r30)
351 std %r8, -104(%r30)
352 std %r9, -96(%r30)
353 std %r10, -88(%r30)
354 std %r11, -80(%r30)
355 std %r12, -72(%r30)
356 std %r13, -64(%r30)
357 std %r14, -56(%r30)
358 std %r15, -48(%r30)
359 std %r16, -40(%r30)
360 std %r17, -32(%r30)
361 std %r18, -24(%r30)
362 std %r3, -16(%r30)
363 .endm
364
365 .macro callee_rest
366 ldd -16(%r30), %r3
367 ldd -24(%r30), %r18
368 ldd -32(%r30), %r17
369 ldd -40(%r30), %r16
370 ldd -48(%r30), %r15
371 ldd -56(%r30), %r14
372 ldd -64(%r30), %r13
373 ldd -72(%r30), %r12
374 ldd -80(%r30), %r11
375 ldd -88(%r30), %r10
376 ldd -96(%r30), %r9
377 ldd -104(%r30), %r8
378 ldd -112(%r30), %r7
379 ldd -120(%r30), %r6
380 ldd -128(%r30), %r5
381 ldd -136(%r30), %r4
382 mtctl %r3, %cr27
383 ldd,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
384 .endm
385
386#else /* ! CONFIG_64BIT */
387
388 .macro callee_save
389 stw,ma %r3, CALLEE_REG_FRAME_SIZE(%r30)
390 mfctl %cr27, %r3
391 stw %r4, -124(%r30)
392 stw %r5, -120(%r30)
393 stw %r6, -116(%r30)
394 stw %r7, -112(%r30)
395 stw %r8, -108(%r30)
396 stw %r9, -104(%r30)
397 stw %r10, -100(%r30)
398 stw %r11, -96(%r30)
399 stw %r12, -92(%r30)
400 stw %r13, -88(%r30)
401 stw %r14, -84(%r30)
402 stw %r15, -80(%r30)
403 stw %r16, -76(%r30)
404 stw %r17, -72(%r30)
405 stw %r18, -68(%r30)
406 stw %r3, -64(%r30)
407 .endm
408
409 .macro callee_rest
410 ldw -64(%r30), %r3
411 ldw -68(%r30), %r18
412 ldw -72(%r30), %r17
413 ldw -76(%r30), %r16
414 ldw -80(%r30), %r15
415 ldw -84(%r30), %r14
416 ldw -88(%r30), %r13
417 ldw -92(%r30), %r12
418 ldw -96(%r30), %r11
419 ldw -100(%r30), %r10
420 ldw -104(%r30), %r9
421 ldw -108(%r30), %r8
422 ldw -112(%r30), %r7
423 ldw -116(%r30), %r6
424 ldw -120(%r30), %r5
425 ldw -124(%r30), %r4
426 mtctl %r3, %cr27
427 ldw,mb -CALLEE_REG_FRAME_SIZE(%r30), %r3
428 .endm
429#endif /* ! CONFIG_64BIT */
430
431 .macro save_specials regs
432
433 SAVE_SP (%sr0, PT_SR0 (\regs))
434 SAVE_SP (%sr1, PT_SR1 (\regs))
435 SAVE_SP (%sr2, PT_SR2 (\regs))
436 SAVE_SP (%sr3, PT_SR3 (\regs))
437 SAVE_SP (%sr4, PT_SR4 (\regs))
438 SAVE_SP (%sr5, PT_SR5 (\regs))
439 SAVE_SP (%sr6, PT_SR6 (\regs))
440 SAVE_SP (%sr7, PT_SR7 (\regs))
441
442 SAVE_CR (%cr17, PT_IASQ0(\regs))
443 mtctl %r0, %cr17
444 SAVE_CR (%cr17, PT_IASQ1(\regs))
445
446 SAVE_CR (%cr18, PT_IAOQ0(\regs))
447 mtctl %r0, %cr18
448 SAVE_CR (%cr18, PT_IAOQ1(\regs))
449
450#ifdef CONFIG_64BIT
451 /* cr11 (sar) is a funny one. 5 bits on PA1.1 and 6 bit on PA2.0
452 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
453 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
454 * we lose the 6th bit on a save/restore over interrupt.
455 */
456 mfctl,w %cr11, %r1
457 STREG %r1, PT_SAR (\regs)
458#else
459 SAVE_CR (%cr11, PT_SAR (\regs))
460#endif
461 SAVE_CR (%cr19, PT_IIR (\regs))
462
463 /*
464 * Code immediately following this macro (in intr_save) relies
465 * on r8 containing ipsw.
466 */
467 mfctl %cr22, %r8
468 STREG %r8, PT_PSW(\regs)
469 .endm
470
471 .macro rest_specials regs
472
473 REST_SP (%sr0, PT_SR0 (\regs))
474 REST_SP (%sr1, PT_SR1 (\regs))
475 REST_SP (%sr2, PT_SR2 (\regs))
476 REST_SP (%sr3, PT_SR3 (\regs))
477 REST_SP (%sr4, PT_SR4 (\regs))
478 REST_SP (%sr5, PT_SR5 (\regs))
479 REST_SP (%sr6, PT_SR6 (\regs))
480 REST_SP (%sr7, PT_SR7 (\regs))
481
482 REST_CR (%cr17, PT_IASQ0(\regs))
483 REST_CR (%cr17, PT_IASQ1(\regs))
484
485 REST_CR (%cr18, PT_IAOQ0(\regs))
486 REST_CR (%cr18, PT_IAOQ1(\regs))
487
488 REST_CR (%cr11, PT_SAR (\regs))
489
490 REST_CR (%cr22, PT_PSW (\regs))
491 .endm
492
493
494 /* First step to create a "relied upon translation"
495 * See PA 2.0 Arch. page F-4 and F-5.
496 *
497 * The ssm was originally necessary due to a "PCxT bug".
498 * But someone decided it needed to be added to the architecture
499 * and this "feature" went into rev3 of PA-RISC 1.1 Arch Manual.
500 * It's been carried forward into PA 2.0 Arch as well. :^(
501 *
502 * "ssm 0,%r0" is a NOP with side effects (prefetch barrier).
503 * rsm/ssm prevents the ifetch unit from speculatively fetching
504 * instructions past this line in the code stream.
505 * PA 2.0 processor will single step all insn in the same QUAD (4 insn).
506 */
507 .macro pcxt_ssm_bug
508 rsm PSW_SM_I,%r0
509 nop /* 1 */
510 nop /* 2 */
511 nop /* 3 */
512 nop /* 4 */
513 nop /* 5 */
514 nop /* 6 */
515 nop /* 7 */
516 .endm
517
518#endif /* __ASSEMBLY__ */
519#endif
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h
new file mode 100644
index 000000000000..57fcc4a5ebb4
--- /dev/null
+++ b/arch/parisc/include/asm/atomic.h
@@ -0,0 +1,348 @@
1/* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
2 * Copyright (C) 2006 Kyle McMartin <kyle@parisc-linux.org>
3 */
4
5#ifndef _ASM_PARISC_ATOMIC_H_
6#define _ASM_PARISC_ATOMIC_H_
7
8#include <linux/types.h>
9#include <asm/system.h>
10
11/*
12 * Atomic operations that C can't guarantee us. Useful for
13 * resource counting etc..
14 *
15 * And probably incredibly slow on parisc. OTOH, we don't
16 * have to write any serious assembly. prumpf
17 */
18
19#ifdef CONFIG_SMP
20#include <asm/spinlock.h>
21#include <asm/cache.h> /* we use L1_CACHE_BYTES */
22
23/* Use an array of spinlocks for our atomic_ts.
24 * Hash function to index into a different SPINLOCK.
25 * Since "a" is usually an address, use one spinlock per cacheline.
26 */
27# define ATOMIC_HASH_SIZE 4
28# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
29
30extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
31
32/* Can't use raw_spin_lock_irq because of #include problems, so
33 * this is the substitute */
34#define _atomic_spin_lock_irqsave(l,f) do { \
35 raw_spinlock_t *s = ATOMIC_HASH(l); \
36 local_irq_save(f); \
37 __raw_spin_lock(s); \
38} while(0)
39
40#define _atomic_spin_unlock_irqrestore(l,f) do { \
41 raw_spinlock_t *s = ATOMIC_HASH(l); \
42 __raw_spin_unlock(s); \
43 local_irq_restore(f); \
44} while(0)
45
46
47#else
48# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
49# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
50#endif
51
52/* This should get optimized out since it's never called.
53** Or get a link error if xchg is used "wrong".
54*/
55extern void __xchg_called_with_bad_pointer(void);
56
57
58/* __xchg32/64 defined in arch/parisc/lib/bitops.c */
59extern unsigned long __xchg8(char, char *);
60extern unsigned long __xchg32(int, int *);
61#ifdef CONFIG_64BIT
62extern unsigned long __xchg64(unsigned long, unsigned long *);
63#endif
64
65/* optimizer better get rid of switch since size is a constant */
66static __inline__ unsigned long
67__xchg(unsigned long x, __volatile__ void * ptr, int size)
68{
69 switch(size) {
70#ifdef CONFIG_64BIT
71 case 8: return __xchg64(x,(unsigned long *) ptr);
72#endif
73 case 4: return __xchg32((int) x, (int *) ptr);
74 case 1: return __xchg8((char) x, (char *) ptr);
75 }
76 __xchg_called_with_bad_pointer();
77 return x;
78}
79
80
81/*
82** REVISIT - Abandoned use of LDCW in xchg() for now:
83** o need to test sizeof(*ptr) to avoid clearing adjacent bytes
84** o and while we are at it, could CONFIG_64BIT code use LDCD too?
85**
86** if (__builtin_constant_p(x) && (x == NULL))
87** if (((unsigned long)p & 0xf) == 0)
88** return __ldcw(p);
89*/
90#define xchg(ptr,x) \
91 ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
92
93
94#define __HAVE_ARCH_CMPXCHG 1
95
96/* bug catcher for when unsupported size is used - won't link */
97extern void __cmpxchg_called_with_bad_pointer(void);
98
99/* __cmpxchg_u32/u64 defined in arch/parisc/lib/bitops.c */
100extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old, unsigned int new_);
101extern unsigned long __cmpxchg_u64(volatile unsigned long *ptr, unsigned long old, unsigned long new_);
102
103/* don't worry...optimizer will get rid of most of this */
104static __inline__ unsigned long
105__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
106{
107 switch(size) {
108#ifdef CONFIG_64BIT
109 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
110#endif
111 case 4: return __cmpxchg_u32((unsigned int *)ptr, (unsigned int) old, (unsigned int) new_);
112 }
113 __cmpxchg_called_with_bad_pointer();
114 return old;
115}
116
117#define cmpxchg(ptr,o,n) \
118 ({ \
119 __typeof__(*(ptr)) _o_ = (o); \
120 __typeof__(*(ptr)) _n_ = (n); \
121 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
122 (unsigned long)_n_, sizeof(*(ptr))); \
123 })
124
125#include <asm-generic/cmpxchg-local.h>
126
127static inline unsigned long __cmpxchg_local(volatile void *ptr,
128 unsigned long old,
129 unsigned long new_, int size)
130{
131 switch (size) {
132#ifdef CONFIG_64BIT
133 case 8: return __cmpxchg_u64((unsigned long *)ptr, old, new_);
134#endif
135 case 4: return __cmpxchg_u32(ptr, old, new_);
136 default:
137 return __cmpxchg_local_generic(ptr, old, new_, size);
138 }
139}
140
141/*
142 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
143 * them available.
144 */
145#define cmpxchg_local(ptr, o, n) \
146 ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
147 (unsigned long)(n), sizeof(*(ptr))))
148#ifdef CONFIG_64BIT
149#define cmpxchg64_local(ptr, o, n) \
150 ({ \
151 BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
152 cmpxchg_local((ptr), (o), (n)); \
153 })
154#else
155#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
156#endif
157
158/* Note that we need not lock read accesses - aligned word writes/reads
159 * are atomic, so a reader never sees unconsistent values.
160 *
161 * Cache-line alignment would conflict with, for example, linux/module.h
162 */
163
164typedef struct { volatile int counter; } atomic_t;
165
166/* It's possible to reduce all atomic operations to either
167 * __atomic_add_return, atomic_set and atomic_read (the latter
168 * is there only for consistency).
169 */
170
171static __inline__ int __atomic_add_return(int i, atomic_t *v)
172{
173 int ret;
174 unsigned long flags;
175 _atomic_spin_lock_irqsave(v, flags);
176
177 ret = (v->counter += i);
178
179 _atomic_spin_unlock_irqrestore(v, flags);
180 return ret;
181}
182
183static __inline__ void atomic_set(atomic_t *v, int i)
184{
185 unsigned long flags;
186 _atomic_spin_lock_irqsave(v, flags);
187
188 v->counter = i;
189
190 _atomic_spin_unlock_irqrestore(v, flags);
191}
192
193static __inline__ int atomic_read(const atomic_t *v)
194{
195 return v->counter;
196}
197
198/* exported interface */
199#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
200#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
201
202/**
203 * atomic_add_unless - add unless the number is a given value
204 * @v: pointer of type atomic_t
205 * @a: the amount to add to v...
206 * @u: ...unless v is equal to u.
207 *
208 * Atomically adds @a to @v, so long as it was not @u.
209 * Returns non-zero if @v was not @u, and zero otherwise.
210 */
211static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
212{
213 int c, old;
214 c = atomic_read(v);
215 for (;;) {
216 if (unlikely(c == (u)))
217 break;
218 old = atomic_cmpxchg((v), c, c + (a));
219 if (likely(old == c))
220 break;
221 c = old;
222 }
223 return c != (u);
224}
225
226#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
227
228#define atomic_add(i,v) ((void)(__atomic_add_return( ((int)i),(v))))
229#define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)i),(v))))
230#define atomic_inc(v) ((void)(__atomic_add_return( 1,(v))))
231#define atomic_dec(v) ((void)(__atomic_add_return( -1,(v))))
232
233#define atomic_add_return(i,v) (__atomic_add_return( ((int)i),(v)))
234#define atomic_sub_return(i,v) (__atomic_add_return(-((int)i),(v)))
235#define atomic_inc_return(v) (__atomic_add_return( 1,(v)))
236#define atomic_dec_return(v) (__atomic_add_return( -1,(v)))
237
238#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
239
240/*
241 * atomic_inc_and_test - increment and test
242 * @v: pointer of type atomic_t
243 *
244 * Atomically increments @v by 1
245 * and returns true if the result is zero, or false for all
246 * other cases.
247 */
248#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
249
250#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
251
252#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
253
254#define ATOMIC_INIT(i) ((atomic_t) { (i) })
255
256#define smp_mb__before_atomic_dec() smp_mb()
257#define smp_mb__after_atomic_dec() smp_mb()
258#define smp_mb__before_atomic_inc() smp_mb()
259#define smp_mb__after_atomic_inc() smp_mb()
260
261#ifdef CONFIG_64BIT
262
263typedef struct { volatile s64 counter; } atomic64_t;
264
265#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })
266
267static __inline__ int
268__atomic64_add_return(s64 i, atomic64_t *v)
269{
270 int ret;
271 unsigned long flags;
272 _atomic_spin_lock_irqsave(v, flags);
273
274 ret = (v->counter += i);
275
276 _atomic_spin_unlock_irqrestore(v, flags);
277 return ret;
278}
279
280static __inline__ void
281atomic64_set(atomic64_t *v, s64 i)
282{
283 unsigned long flags;
284 _atomic_spin_lock_irqsave(v, flags);
285
286 v->counter = i;
287
288 _atomic_spin_unlock_irqrestore(v, flags);
289}
290
291static __inline__ s64
292atomic64_read(const atomic64_t *v)
293{
294 return v->counter;
295}
296
297#define atomic64_add(i,v) ((void)(__atomic64_add_return( ((s64)i),(v))))
298#define atomic64_sub(i,v) ((void)(__atomic64_add_return(-((s64)i),(v))))
299#define atomic64_inc(v) ((void)(__atomic64_add_return( 1,(v))))
300#define atomic64_dec(v) ((void)(__atomic64_add_return( -1,(v))))
301
302#define atomic64_add_return(i,v) (__atomic64_add_return( ((s64)i),(v)))
303#define atomic64_sub_return(i,v) (__atomic64_add_return(-((s64)i),(v)))
304#define atomic64_inc_return(v) (__atomic64_add_return( 1,(v)))
305#define atomic64_dec_return(v) (__atomic64_add_return( -1,(v)))
306
307#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
308
309#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
310#define atomic64_dec_and_test(v) (atomic64_dec_return(v) == 0)
311#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i),(v)) == 0)
312
313/* exported interface */
314#define atomic64_cmpxchg(v, o, n) \
315 ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
316#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
317
318/**
319 * atomic64_add_unless - add unless the number is a given value
320 * @v: pointer of type atomic64_t
321 * @a: the amount to add to v...
322 * @u: ...unless v is equal to u.
323 *
324 * Atomically adds @a to @v, so long as it was not @u.
325 * Returns non-zero if @v was not @u, and zero otherwise.
326 */
327static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
328{
329 long c, old;
330 c = atomic64_read(v);
331 for (;;) {
332 if (unlikely(c == (u)))
333 break;
334 old = atomic64_cmpxchg((v), c, c + (a));
335 if (likely(old == c))
336 break;
337 c = old;
338 }
339 return c != (u);
340}
341
342#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
343
344#endif /* CONFIG_64BIT */
345
346#include <asm-generic/atomic.h>
347
348#endif /* _ASM_PARISC_ATOMIC_H_ */
diff --git a/arch/parisc/include/asm/auxvec.h b/arch/parisc/include/asm/auxvec.h
new file mode 100644
index 000000000000..9c3ac4b89dc9
--- /dev/null
+++ b/arch/parisc/include/asm/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef __ASMPARISC_AUXVEC_H
2#define __ASMPARISC_AUXVEC_H
3
4#endif
diff --git a/arch/parisc/include/asm/bitops.h b/arch/parisc/include/asm/bitops.h
new file mode 100644
index 000000000000..7a6ea10bd231
--- /dev/null
+++ b/arch/parisc/include/asm/bitops.h
@@ -0,0 +1,239 @@
1#ifndef _PARISC_BITOPS_H
2#define _PARISC_BITOPS_H
3
4#ifndef _LINUX_BITOPS_H
5#error only <linux/bitops.h> can be included directly
6#endif
7
8#include <linux/compiler.h>
9#include <asm/types.h> /* for BITS_PER_LONG/SHIFT_PER_LONG */
10#include <asm/byteorder.h>
11#include <asm/atomic.h>
12
13/*
14 * HP-PARISC specific bit operations
15 * for a detailed description of the functions please refer
16 * to include/asm-i386/bitops.h or kerneldoc
17 */
18
19#define CHOP_SHIFTCOUNT(x) (((unsigned long) (x)) & (BITS_PER_LONG - 1))
20
21
22#define smp_mb__before_clear_bit() smp_mb()
23#define smp_mb__after_clear_bit() smp_mb()
24
25/* See http://marc.theaimsgroup.com/?t=108826637900003 for discussion
26 * on use of volatile and __*_bit() (set/clear/change):
27 * *_bit() want use of volatile.
28 * __*_bit() are "relaxed" and don't use spinlock or volatile.
29 */
30
31static __inline__ void set_bit(int nr, volatile unsigned long * addr)
32{
33 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
34 unsigned long flags;
35
36 addr += (nr >> SHIFT_PER_LONG);
37 _atomic_spin_lock_irqsave(addr, flags);
38 *addr |= mask;
39 _atomic_spin_unlock_irqrestore(addr, flags);
40}
41
42static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
43{
44 unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr));
45 unsigned long flags;
46
47 addr += (nr >> SHIFT_PER_LONG);
48 _atomic_spin_lock_irqsave(addr, flags);
49 *addr &= mask;
50 _atomic_spin_unlock_irqrestore(addr, flags);
51}
52
53static __inline__ void change_bit(int nr, volatile unsigned long * addr)
54{
55 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
56 unsigned long flags;
57
58 addr += (nr >> SHIFT_PER_LONG);
59 _atomic_spin_lock_irqsave(addr, flags);
60 *addr ^= mask;
61 _atomic_spin_unlock_irqrestore(addr, flags);
62}
63
64static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
65{
66 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
67 unsigned long old;
68 unsigned long flags;
69 int set;
70
71 addr += (nr >> SHIFT_PER_LONG);
72 _atomic_spin_lock_irqsave(addr, flags);
73 old = *addr;
74 set = (old & mask) ? 1 : 0;
75 if (!set)
76 *addr = old | mask;
77 _atomic_spin_unlock_irqrestore(addr, flags);
78
79 return set;
80}
81
82static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
83{
84 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
85 unsigned long old;
86 unsigned long flags;
87 int set;
88
89 addr += (nr >> SHIFT_PER_LONG);
90 _atomic_spin_lock_irqsave(addr, flags);
91 old = *addr;
92 set = (old & mask) ? 1 : 0;
93 if (set)
94 *addr = old & ~mask;
95 _atomic_spin_unlock_irqrestore(addr, flags);
96
97 return set;
98}
99
100static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
101{
102 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr);
103 unsigned long oldbit;
104 unsigned long flags;
105
106 addr += (nr >> SHIFT_PER_LONG);
107 _atomic_spin_lock_irqsave(addr, flags);
108 oldbit = *addr;
109 *addr = oldbit ^ mask;
110 _atomic_spin_unlock_irqrestore(addr, flags);
111
112 return (oldbit & mask) ? 1 : 0;
113}
114
115#include <asm-generic/bitops/non-atomic.h>
116
117#ifdef __KERNEL__
118
119/**
120 * __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
121 * @word: The word to search
122 *
123 * __ffs() return is undefined if no bit is set.
124 *
125 * 32-bit fast __ffs by LaMont Jones "lamont At hp com".
126 * 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
127 * (with help from willy/jejb to get the semantics right)
128 *
129 * This algorithm avoids branches by making use of nullification.
130 * One side effect of "extr" instructions is it sets PSW[N] bit.
131 * How PSW[N] (nullify next insn) gets set is determined by the
132 * "condition" field (eg "<>" or "TR" below) in the extr* insn.
133 * Only the 1st and one of either the 2cd or 3rd insn will get executed.
134 * Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
135 * cycles for each mispredicted branch.
136 */
137
138static __inline__ unsigned long __ffs(unsigned long x)
139{
140 unsigned long ret;
141
142 __asm__(
143#ifdef CONFIG_64BIT
144 " ldi 63,%1\n"
145 " extrd,u,*<> %0,63,32,%%r0\n"
146 " extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
147 " addi -32,%1,%1\n"
148#else
149 " ldi 31,%1\n"
150#endif
151 " extru,<> %0,31,16,%%r0\n"
152 " extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */
153 " addi -16,%1,%1\n"
154 " extru,<> %0,31,8,%%r0\n"
155 " extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */
156 " addi -8,%1,%1\n"
157 " extru,<> %0,31,4,%%r0\n"
158 " extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */
159 " addi -4,%1,%1\n"
160 " extru,<> %0,31,2,%%r0\n"
161 " extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */
162 " addi -2,%1,%1\n"
163 " extru,= %0,31,1,%%r0\n" /* check last bit */
164 " addi -1,%1,%1\n"
165 : "+r" (x), "=r" (ret) );
166 return ret;
167}
168
169#include <asm-generic/bitops/ffz.h>
170
171/*
172 * ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
173 * This is defined the same way as the libc and compiler builtin
174 * ffs routines, therefore differs in spirit from the above ffz (man ffs).
175 */
176static __inline__ int ffs(int x)
177{
178 return x ? (__ffs((unsigned long)x) + 1) : 0;
179}
180
181/*
182 * fls: find last (most significant) bit set.
183 * fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
184 */
185
186static __inline__ int fls(int x)
187{
188 int ret;
189 if (!x)
190 return 0;
191
192 __asm__(
193 " ldi 1,%1\n"
194 " extru,<> %0,15,16,%%r0\n"
195 " zdep,TR %0,15,16,%0\n" /* xxxx0000 */
196 " addi 16,%1,%1\n"
197 " extru,<> %0,7,8,%%r0\n"
198 " zdep,TR %0,23,24,%0\n" /* xx000000 */
199 " addi 8,%1,%1\n"
200 " extru,<> %0,3,4,%%r0\n"
201 " zdep,TR %0,27,28,%0\n" /* x0000000 */
202 " addi 4,%1,%1\n"
203 " extru,<> %0,1,2,%%r0\n"
204 " zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */
205 " addi 2,%1,%1\n"
206 " extru,= %0,0,1,%%r0\n"
207 " addi 1,%1,%1\n" /* if y & 8, add 1 */
208 : "+r" (x), "=r" (ret) );
209
210 return ret;
211}
212
213#include <asm-generic/bitops/__fls.h>
214#include <asm-generic/bitops/fls64.h>
215#include <asm-generic/bitops/hweight.h>
216#include <asm-generic/bitops/lock.h>
217#include <asm-generic/bitops/sched.h>
218
219#endif /* __KERNEL__ */
220
221#include <asm-generic/bitops/find.h>
222
223#ifdef __KERNEL__
224
225#include <asm-generic/bitops/ext2-non-atomic.h>
226
227/* '3' is bits per byte */
228#define LE_BYTE_ADDR ((sizeof(unsigned long) - 1) << 3)
229
230#define ext2_set_bit_atomic(l,nr,addr) \
231 test_and_set_bit((nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
232#define ext2_clear_bit_atomic(l,nr,addr) \
233 test_and_clear_bit( (nr) ^ LE_BYTE_ADDR, (unsigned long *)addr)
234
235#endif /* __KERNEL__ */
236
237#include <asm-generic/bitops/minix-le.h>
238
239#endif /* _PARISC_BITOPS_H */
diff --git a/arch/parisc/include/asm/bug.h b/arch/parisc/include/asm/bug.h
new file mode 100644
index 000000000000..8cfc553fc837
--- /dev/null
+++ b/arch/parisc/include/asm/bug.h
@@ -0,0 +1,92 @@
1#ifndef _PARISC_BUG_H
2#define _PARISC_BUG_H
3
4/*
5 * Tell the user there is some problem.
6 * The offending file and line are encoded in the __bug_table section.
7 */
8
9#ifdef CONFIG_BUG
10#define HAVE_ARCH_BUG
11#define HAVE_ARCH_WARN_ON
12
13/* the break instruction is used as BUG() marker. */
14#define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
15#define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
16
17#if defined(CONFIG_64BIT)
18#define ASM_WORD_INSN ".dword\t"
19#else
20#define ASM_WORD_INSN ".word\t"
21#endif
22
23#ifdef CONFIG_DEBUG_BUGVERBOSE
24#define BUG() \
25 do { \
26 asm volatile("\n" \
27 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
28 "\t.pushsection __bug_table,\"a\"\n" \
29 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
30 "\t.short %c1, %c2\n" \
31 "\t.org 2b+%c3\n" \
32 "\t.popsection" \
33 : : "i" (__FILE__), "i" (__LINE__), \
34 "i" (0), "i" (sizeof(struct bug_entry)) ); \
35 for(;;) ; \
36 } while(0)
37
38#else
39#define BUG() \
40 do { \
41 asm volatile(PARISC_BUG_BREAK_ASM : : ); \
42 for(;;) ; \
43 } while(0)
44#endif
45
46#ifdef CONFIG_DEBUG_BUGVERBOSE
47#define __WARN() \
48 do { \
49 asm volatile("\n" \
50 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
51 "\t.pushsection __bug_table,\"a\"\n" \
52 "2:\t" ASM_WORD_INSN "1b, %c0\n" \
53 "\t.short %c1, %c2\n" \
54 "\t.org 2b+%c3\n" \
55 "\t.popsection" \
56 : : "i" (__FILE__), "i" (__LINE__), \
57 "i" (BUGFLAG_WARNING), \
58 "i" (sizeof(struct bug_entry)) ); \
59 } while(0)
60#else
61#define __WARN() \
62 do { \
63 asm volatile("\n" \
64 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
65 "\t.pushsection __bug_table,\"a\"\n" \
66 "2:\t" ASM_WORD_INSN "1b\n" \
67 "\t.short %c0\n" \
68 "\t.org 2b+%c1\n" \
69 "\t.popsection" \
70 : : "i" (BUGFLAG_WARNING), \
71 "i" (sizeof(struct bug_entry)) ); \
72 } while(0)
73#endif
74
75
76#define WARN_ON(x) ({ \
77 int __ret_warn_on = !!(x); \
78 if (__builtin_constant_p(__ret_warn_on)) { \
79 if (__ret_warn_on) \
80 __WARN(); \
81 } else { \
82 if (unlikely(__ret_warn_on)) \
83 __WARN(); \
84 } \
85 unlikely(__ret_warn_on); \
86})
87
88#endif
89
90#include <asm-generic/bug.h>
91#endif
92
diff --git a/arch/parisc/include/asm/bugs.h b/arch/parisc/include/asm/bugs.h
new file mode 100644
index 000000000000..9e6284342a5f
--- /dev/null
+++ b/arch/parisc/include/asm/bugs.h
@@ -0,0 +1,19 @@
1/*
2 * include/asm-parisc/bugs.h
3 *
4 * Copyright (C) 1999 Mike Shaver
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14#include <asm/processor.h>
15
16static inline void check_bugs(void)
17{
18// identify_cpu(&boot_cpu_data);
19}
diff --git a/arch/parisc/include/asm/byteorder.h b/arch/parisc/include/asm/byteorder.h
new file mode 100644
index 000000000000..db148313de5d
--- /dev/null
+++ b/arch/parisc/include/asm/byteorder.h
@@ -0,0 +1,82 @@
1#ifndef _PARISC_BYTEORDER_H
2#define _PARISC_BYTEORDER_H
3
4#include <asm/types.h>
5#include <linux/compiler.h>
6
7#ifdef __GNUC__
8
9static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
10{
11 __asm__("dep %0, 15, 8, %0\n\t" /* deposit 00ab -> 0bab */
12 "shd %%r0, %0, 8, %0" /* shift 000000ab -> 00ba */
13 : "=r" (x)
14 : "0" (x));
15 return x;
16}
17
18static __inline__ __attribute_const__ __u32 ___arch__swab24(__u32 x)
19{
20 __asm__("shd %0, %0, 8, %0\n\t" /* shift xabcxabc -> cxab */
21 "dep %0, 15, 8, %0\n\t" /* deposit cxab -> cbab */
22 "shd %%r0, %0, 8, %0" /* shift 0000cbab -> 0cba */
23 : "=r" (x)
24 : "0" (x));
25 return x;
26}
27
28static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
29{
30 unsigned int temp;
31 __asm__("shd %0, %0, 16, %1\n\t" /* shift abcdabcd -> cdab */
32 "dep %1, 15, 8, %1\n\t" /* deposit cdab -> cbab */
33 "shd %0, %1, 8, %0" /* shift abcdcbab -> dcba */
34 : "=r" (x), "=&r" (temp)
35 : "0" (x));
36 return x;
37}
38
39
40#if BITS_PER_LONG > 32
41/*
42** From "PA-RISC 2.0 Architecture", HP Professional Books.
43** See Appendix I page 8 , "Endian Byte Swapping".
44**
45** Pretty cool algorithm: (* == zero'd bits)
46** PERMH 01234567 -> 67452301 into %0
47** HSHL 67452301 -> 7*5*3*1* into %1
48** HSHR 67452301 -> *6*4*2*0 into %0
49** OR %0 | %1 -> 76543210 into %0 (all done!)
50*/
51static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x) {
52 __u64 temp;
53 __asm__("permh,3210 %0, %0\n\t"
54 "hshl %0, 8, %1\n\t"
55 "hshr,u %0, 8, %0\n\t"
56 "or %1, %0, %0"
57 : "=r" (x), "=&r" (temp)
58 : "0" (x));
59 return x;
60}
61#define __arch__swab64(x) ___arch__swab64(x)
62#define __BYTEORDER_HAS_U64__
63#elif !defined(__STRICT_ANSI__)
64static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 x)
65{
66 __u32 t1 = ___arch__swab32((__u32) x);
67 __u32 t2 = ___arch__swab32((__u32) (x >> 32));
68 return (((__u64) t1 << 32) | t2);
69}
70#define __arch__swab64(x) ___arch__swab64(x)
71#define __BYTEORDER_HAS_U64__
72#endif
73
74#define __arch__swab16(x) ___arch__swab16(x)
75#define __arch__swab24(x) ___arch__swab24(x)
76#define __arch__swab32(x) ___arch__swab32(x)
77
78#endif /* __GNUC__ */
79
80#include <linux/byteorder/big_endian.h>
81
82#endif /* _PARISC_BYTEORDER_H */
diff --git a/arch/parisc/include/asm/cache.h b/arch/parisc/include/asm/cache.h
new file mode 100644
index 000000000000..32c2cca74345
--- /dev/null
+++ b/arch/parisc/include/asm/cache.h
@@ -0,0 +1,60 @@
1/*
2 * include/asm-parisc/cache.h
3 */
4
5#ifndef __ARCH_PARISC_CACHE_H
6#define __ARCH_PARISC_CACHE_H
7
8
9/*
10 * PA 2.0 processors have 64-byte cachelines; PA 1.1 processors have
11 * 32-byte cachelines. The default configuration is not for SMP anyway,
12 * so if you're building for SMP, you should select the appropriate
13 * processor type. There is a potential livelock danger when running
14 * a machine with this value set too small, but it's more probable you'll
15 * just ruin performance.
16 */
17#ifdef CONFIG_PA20
18#define L1_CACHE_BYTES 64
19#define L1_CACHE_SHIFT 6
20#else
21#define L1_CACHE_BYTES 32
22#define L1_CACHE_SHIFT 5
23#endif
24
25#ifndef __ASSEMBLY__
26
27#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
28
29#define SMP_CACHE_BYTES L1_CACHE_BYTES
30
31#define __read_mostly __attribute__((__section__(".data.read_mostly")))
32
33void parisc_cache_init(void); /* initializes cache-flushing */
34void disable_sr_hashing_asm(int); /* low level support for above */
35void disable_sr_hashing(void); /* turns off space register hashing */
36void free_sid(unsigned long);
37unsigned long alloc_sid(void);
38
39struct seq_file;
40extern void show_cache_info(struct seq_file *m);
41
42extern int split_tlb;
43extern int dcache_stride;
44extern int icache_stride;
45extern struct pdc_cache_info cache_info;
46void parisc_setup_cache_timing(void);
47
48#define pdtlb(addr) asm volatile("pdtlb 0(%%sr1,%0)" : : "r" (addr));
49#define pitlb(addr) asm volatile("pitlb 0(%%sr1,%0)" : : "r" (addr));
50#define pdtlb_kernel(addr) asm volatile("pdtlb 0(%0)" : : "r" (addr));
51
52#endif /* ! __ASSEMBLY__ */
53
54/* Classes of processor wrt: disabling space register hashing */
55
56#define SRHASH_PCXST 0 /* pcxs, pcxt, pcxt_ */
57#define SRHASH_PCXL 1 /* pcxl */
58#define SRHASH_PA20 2 /* pcxu, pcxu_, pcxw, pcxw_ */
59
60#endif
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
new file mode 100644
index 000000000000..b7ca6dc7fddc
--- /dev/null
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -0,0 +1,121 @@
1#ifndef _PARISC_CACHEFLUSH_H
2#define _PARISC_CACHEFLUSH_H
3
4#include <linux/mm.h>
5
6/* The usual comment is "Caches aren't brain-dead on the <architecture>".
7 * Unfortunately, that doesn't apply to PA-RISC. */
8
9/* Internal implementation */
10void flush_data_cache_local(void *); /* flushes local data-cache only */
11void flush_instruction_cache_local(void *); /* flushes local code-cache only */
12#ifdef CONFIG_SMP
13void flush_data_cache(void); /* flushes data-cache only (all processors) */
14void flush_instruction_cache(void); /* flushes i-cache only (all processors) */
15#else
16#define flush_data_cache() flush_data_cache_local(NULL)
17#define flush_instruction_cache() flush_instruction_cache_local(NULL)
18#endif
19
20#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
21
22void flush_user_icache_range_asm(unsigned long, unsigned long);
23void flush_kernel_icache_range_asm(unsigned long, unsigned long);
24void flush_user_dcache_range_asm(unsigned long, unsigned long);
25void flush_kernel_dcache_range_asm(unsigned long, unsigned long);
26void flush_kernel_dcache_page_asm(void *);
27void flush_kernel_icache_page(void *);
28void flush_user_dcache_page(unsigned long);
29void flush_user_icache_page(unsigned long);
30void flush_user_dcache_range(unsigned long, unsigned long);
31void flush_user_icache_range(unsigned long, unsigned long);
32
33/* Cache flush operations */
34
35void flush_cache_all_local(void);
36void flush_cache_all(void);
37void flush_cache_mm(struct mm_struct *mm);
38
39#define flush_kernel_dcache_range(start,size) \
40 flush_kernel_dcache_range_asm((start), (start)+(size));
41
42#define flush_cache_vmap(start, end) flush_cache_all()
43#define flush_cache_vunmap(start, end) flush_cache_all()
44
45extern void flush_dcache_page(struct page *page);
46
47#define flush_dcache_mmap_lock(mapping) \
48 spin_lock_irq(&(mapping)->tree_lock)
49#define flush_dcache_mmap_unlock(mapping) \
50 spin_unlock_irq(&(mapping)->tree_lock)
51
52#define flush_icache_page(vma,page) do { \
53 flush_kernel_dcache_page(page); \
54 flush_kernel_icache_page(page_address(page)); \
55} while (0)
56
57#define flush_icache_range(s,e) do { \
58 flush_kernel_dcache_range_asm(s,e); \
59 flush_kernel_icache_range_asm(s,e); \
60} while (0)
61
62#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
63do { \
64 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
65 memcpy(dst, src, len); \
66 flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \
67} while (0)
68
69#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
70do { \
71 flush_cache_page(vma, vaddr, page_to_pfn(page)); \
72 memcpy(dst, src, len); \
73} while (0)
74
75void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn);
76void flush_cache_range(struct vm_area_struct *vma,
77 unsigned long start, unsigned long end);
78
79#define ARCH_HAS_FLUSH_ANON_PAGE
80static inline void
81flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
82{
83 if (PageAnon(page))
84 flush_user_dcache_page(vmaddr);
85}
86
87#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
88void flush_kernel_dcache_page_addr(void *addr);
89static inline void flush_kernel_dcache_page(struct page *page)
90{
91 flush_kernel_dcache_page_addr(page_address(page));
92}
93
94#ifdef CONFIG_DEBUG_RODATA
95void mark_rodata_ro(void);
96#endif
97
98#ifdef CONFIG_PA8X00
99/* Only pa8800, pa8900 needs this */
100#define ARCH_HAS_KMAP
101
102void kunmap_parisc(void *addr);
103
104static inline void *kmap(struct page *page)
105{
106 might_sleep();
107 return page_address(page);
108}
109
110#define kunmap(page) kunmap_parisc(page_address(page))
111
112#define kmap_atomic(page, idx) page_address(page)
113
114#define kunmap_atomic(addr, idx) kunmap_parisc(addr)
115
116#define kmap_atomic_pfn(pfn, idx) page_address(pfn_to_page(pfn))
117#define kmap_atomic_to_page(ptr) virt_to_page(ptr)
118#endif
119
120#endif /* _PARISC_CACHEFLUSH_H */
121
diff --git a/arch/parisc/include/asm/checksum.h b/arch/parisc/include/asm/checksum.h
new file mode 100644
index 000000000000..e9639ccc3fce
--- /dev/null
+++ b/arch/parisc/include/asm/checksum.h
@@ -0,0 +1,210 @@
1#ifndef _PARISC_CHECKSUM_H
2#define _PARISC_CHECKSUM_H
3
4#include <linux/in6.h>
5
6/*
7 * computes the checksum of a memory block at buff, length len,
8 * and adds in "sum" (32-bit)
9 *
10 * returns a 32-bit number suitable for feeding into itself
11 * or csum_tcpudp_magic
12 *
13 * this function must be called with even lengths, except
14 * for the last fragment, which may be odd
15 *
16 * it's best to have buff aligned on a 32-bit boundary
17 */
18extern __wsum csum_partial(const void *, int, __wsum);
19
20/*
21 * The same as csum_partial, but copies from src while it checksums.
22 *
23 * Here even more important to align src and dst on a 32-bit (or even
24 * better 64-bit) boundary
25 */
26extern __wsum csum_partial_copy_nocheck(const void *, void *, int, __wsum);
27
28/*
29 * this is a new version of the above that records errors it finds in *errp,
30 * but continues and zeros the rest of the buffer.
31 */
32extern __wsum csum_partial_copy_from_user(const void __user *src,
33 void *dst, int len, __wsum sum, int *errp);
34
35/*
36 * Optimized for IP headers, which always checksum on 4 octet boundaries.
37 *
38 * Written by Randolph Chung <tausq@debian.org>, and then mucked with by
39 * LaMont Jones <lamont@debian.org>
40 */
41static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
42{
43 unsigned int sum;
44
45 __asm__ __volatile__ (
46" ldws,ma 4(%1), %0\n"
47" addib,<= -4, %2, 2f\n"
48"\n"
49" ldws 4(%1), %%r20\n"
50" ldws 8(%1), %%r21\n"
51" add %0, %%r20, %0\n"
52" ldws,ma 12(%1), %%r19\n"
53" addc %0, %%r21, %0\n"
54" addc %0, %%r19, %0\n"
55"1: ldws,ma 4(%1), %%r19\n"
56" addib,< 0, %2, 1b\n"
57" addc %0, %%r19, %0\n"
58"\n"
59" extru %0, 31, 16, %%r20\n"
60" extru %0, 15, 16, %%r21\n"
61" addc %%r20, %%r21, %0\n"
62" extru %0, 15, 16, %%r21\n"
63" add %0, %%r21, %0\n"
64" subi -1, %0, %0\n"
65"2:\n"
66 : "=r" (sum), "=r" (iph), "=r" (ihl)
67 : "1" (iph), "2" (ihl)
68 : "r19", "r20", "r21", "memory");
69
70 return (__force __sum16)sum;
71}
72
73/*
74 * Fold a partial checksum
75 */
76static inline __sum16 csum_fold(__wsum csum)
77{
78 u32 sum = (__force u32)csum;
79 /* add the swapped two 16-bit halves of sum,
80 a possible carry from adding the two 16-bit halves,
81 will carry from the lower half into the upper half,
82 giving us the correct sum in the upper half. */
83 sum += (sum << 16) + (sum >> 16);
84 return (__force __sum16)(~sum >> 16);
85}
86
87static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
88 unsigned short len,
89 unsigned short proto,
90 __wsum sum)
91{
92 __asm__(
93 " add %1, %0, %0\n"
94 " addc %2, %0, %0\n"
95 " addc %3, %0, %0\n"
96 " addc %%r0, %0, %0\n"
97 : "=r" (sum)
98 : "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum));
99 return sum;
100}
101
102/*
103 * computes the checksum of the TCP/UDP pseudo-header
104 * returns a 16-bit checksum, already complemented
105 */
106static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
107 unsigned short len,
108 unsigned short proto,
109 __wsum sum)
110{
111 return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
112}
113
114/*
115 * this routine is used for miscellaneous IP-like checksums, mainly
116 * in icmp.c
117 */
118static inline __sum16 ip_compute_csum(const void *buf, int len)
119{
120 return csum_fold (csum_partial(buf, len, 0));
121}
122
123
124#define _HAVE_ARCH_IPV6_CSUM
125static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
126 const struct in6_addr *daddr,
127 __u32 len, unsigned short proto,
128 __wsum sum)
129{
130 __asm__ __volatile__ (
131
132#if BITS_PER_LONG > 32
133
134 /*
135 ** We can execute two loads and two adds per cycle on PA 8000.
136 ** But add insn's get serialized waiting for the carry bit.
137 ** Try to keep 4 registers with "live" values ahead of the ALU.
138 */
139
140" ldd,ma 8(%1), %%r19\n" /* get 1st saddr word */
141" ldd,ma 8(%2), %%r20\n" /* get 1st daddr word */
142" add %8, %3, %3\n"/* add 16-bit proto + len */
143" add %%r19, %0, %0\n"
144" ldd,ma 8(%1), %%r21\n" /* 2cd saddr */
145" ldd,ma 8(%2), %%r22\n" /* 2cd daddr */
146" add,dc %%r20, %0, %0\n"
147" add,dc %%r21, %0, %0\n"
148" add,dc %%r22, %0, %0\n"
149" add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */
150" extrd,u %0, 31, 32, %%r19\n" /* copy upper half down */
151" depdi 0, 31, 32, %0\n" /* clear upper half */
152" add %%r19, %0, %0\n" /* fold into 32-bits */
153" addc 0, %0, %0\n" /* add carry */
154
155#else
156
157 /*
158 ** For PA 1.x, the insn order doesn't matter as much.
159 ** Insn stream is serialized on the carry bit here too.
160 ** result from the previous operation (eg r0 + x)
161 */
162
163" ldw,ma 4(%1), %%r19\n" /* get 1st saddr word */
164" ldw,ma 4(%2), %%r20\n" /* get 1st daddr word */
165" add %8, %3, %3\n" /* add 16-bit proto + len */
166" add %%r19, %0, %0\n"
167" ldw,ma 4(%1), %%r21\n" /* 2cd saddr */
168" addc %%r20, %0, %0\n"
169" ldw,ma 4(%2), %%r22\n" /* 2cd daddr */
170" addc %%r21, %0, %0\n"
171" ldw,ma 4(%1), %%r19\n" /* 3rd saddr */
172" addc %%r22, %0, %0\n"
173" ldw,ma 4(%2), %%r20\n" /* 3rd daddr */
174" addc %%r19, %0, %0\n"
175" ldw,ma 4(%1), %%r21\n" /* 4th saddr */
176" addc %%r20, %0, %0\n"
177" ldw,ma 4(%2), %%r22\n" /* 4th daddr */
178" addc %%r21, %0, %0\n"
179" addc %%r22, %0, %0\n"
180" addc %3, %0, %0\n" /* fold in proto+len, catch carry */
181
182#endif
183 : "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len)
184 : "0" (sum), "1" (saddr), "2" (daddr), "3" (len), "r" (proto)
185 : "r19", "r20", "r21", "r22");
186 return csum_fold(sum);
187}
188
189/*
190 * Copy and checksum to user
191 */
192#define HAVE_CSUM_COPY_USER
193static __inline__ __wsum csum_and_copy_to_user(const void *src,
194 void __user *dst,
195 int len, __wsum sum,
196 int *err_ptr)
197{
198 /* code stolen from include/asm-mips64 */
199 sum = csum_partial(src, len, sum);
200
201 if (copy_to_user(dst, src, len)) {
202 *err_ptr = -EFAULT;
203 return (__force __wsum)-1;
204 }
205
206 return sum;
207}
208
209#endif
210
diff --git a/arch/parisc/include/asm/compat.h b/arch/parisc/include/asm/compat.h
new file mode 100644
index 000000000000..7f32611a7a5e
--- /dev/null
+++ b/arch/parisc/include/asm/compat.h
@@ -0,0 +1,165 @@
1#ifndef _ASM_PARISC_COMPAT_H
2#define _ASM_PARISC_COMPAT_H
3/*
4 * Architecture specific compatibility types
5 */
6#include <linux/types.h>
7#include <linux/sched.h>
8#include <linux/thread_info.h>
9
10#define COMPAT_USER_HZ 100
11
12typedef u32 compat_size_t;
13typedef s32 compat_ssize_t;
14typedef s32 compat_time_t;
15typedef s32 compat_clock_t;
16typedef s32 compat_pid_t;
17typedef u32 __compat_uid_t;
18typedef u32 __compat_gid_t;
19typedef u32 __compat_uid32_t;
20typedef u32 __compat_gid32_t;
21typedef u16 compat_mode_t;
22typedef u32 compat_ino_t;
23typedef u32 compat_dev_t;
24typedef s32 compat_off_t;
25typedef s64 compat_loff_t;
26typedef u16 compat_nlink_t;
27typedef u16 compat_ipc_pid_t;
28typedef s32 compat_daddr_t;
29typedef u32 compat_caddr_t;
30typedef s32 compat_timer_t;
31
32typedef s32 compat_int_t;
33typedef s32 compat_long_t;
34typedef s64 compat_s64;
35typedef u32 compat_uint_t;
36typedef u32 compat_ulong_t;
37typedef u64 compat_u64;
38
39struct compat_timespec {
40 compat_time_t tv_sec;
41 s32 tv_nsec;
42};
43
44struct compat_timeval {
45 compat_time_t tv_sec;
46 s32 tv_usec;
47};
48
49struct compat_stat {
50 compat_dev_t st_dev; /* dev_t is 32 bits on parisc */
51 compat_ino_t st_ino; /* 32 bits */
52 compat_mode_t st_mode; /* 16 bits */
53 compat_nlink_t st_nlink; /* 16 bits */
54 u16 st_reserved1; /* old st_uid */
55 u16 st_reserved2; /* old st_gid */
56 compat_dev_t st_rdev;
57 compat_off_t st_size;
58 compat_time_t st_atime;
59 u32 st_atime_nsec;
60 compat_time_t st_mtime;
61 u32 st_mtime_nsec;
62 compat_time_t st_ctime;
63 u32 st_ctime_nsec;
64 s32 st_blksize;
65 s32 st_blocks;
66 u32 __unused1; /* ACL stuff */
67 compat_dev_t __unused2; /* network */
68 compat_ino_t __unused3; /* network */
69 u32 __unused4; /* cnodes */
70 u16 __unused5; /* netsite */
71 short st_fstype;
72 compat_dev_t st_realdev;
73 u16 st_basemode;
74 u16 st_spareshort;
75 __compat_uid32_t st_uid;
76 __compat_gid32_t st_gid;
77 u32 st_spare4[3];
78};
79
80struct compat_flock {
81 short l_type;
82 short l_whence;
83 compat_off_t l_start;
84 compat_off_t l_len;
85 compat_pid_t l_pid;
86};
87
88struct compat_flock64 {
89 short l_type;
90 short l_whence;
91 compat_loff_t l_start;
92 compat_loff_t l_len;
93 compat_pid_t l_pid;
94};
95
96struct compat_statfs {
97 s32 f_type;
98 s32 f_bsize;
99 s32 f_blocks;
100 s32 f_bfree;
101 s32 f_bavail;
102 s32 f_files;
103 s32 f_ffree;
104 __kernel_fsid_t f_fsid;
105 s32 f_namelen;
106 s32 f_frsize;
107 s32 f_spare[5];
108};
109
110struct compat_sigcontext {
111 compat_int_t sc_flags;
112 compat_int_t sc_gr[32]; /* PSW in sc_gr[0] */
113 u64 sc_fr[32];
114 compat_int_t sc_iasq[2];
115 compat_int_t sc_iaoq[2];
116 compat_int_t sc_sar; /* cr11 */
117};
118
119#define COMPAT_RLIM_INFINITY 0xffffffff
120
121typedef u32 compat_old_sigset_t; /* at least 32 bits */
122
123#define _COMPAT_NSIG 64
124#define _COMPAT_NSIG_BPW 32
125
126typedef u32 compat_sigset_word;
127
128#define COMPAT_OFF_T_MAX 0x7fffffff
129#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL
130
131/*
132 * A pointer passed in from user mode. This should not
133 * be used for syscall parameters, just declare them
134 * as pointers because the syscall entry code will have
135 * appropriately converted them already.
136 */
137typedef u32 compat_uptr_t;
138
139static inline void __user *compat_ptr(compat_uptr_t uptr)
140{
141 return (void __user *)(unsigned long)uptr;
142}
143
144static inline compat_uptr_t ptr_to_compat(void __user *uptr)
145{
146 return (u32)(unsigned long)uptr;
147}
148
149static __inline__ void __user *compat_alloc_user_space(long len)
150{
151 struct pt_regs *regs = &current->thread.regs;
152 return (void __user *)regs->gr[30];
153}
154
155static inline int __is_compat_task(struct task_struct *t)
156{
157 return test_ti_thread_flag(task_thread_info(t), TIF_32BIT);
158}
159
160static inline int is_compat_task(void)
161{
162 return __is_compat_task(current);
163}
164
165#endif /* _ASM_PARISC_COMPAT_H */
diff --git a/arch/parisc/include/asm/compat_rt_sigframe.h b/arch/parisc/include/asm/compat_rt_sigframe.h
new file mode 100644
index 000000000000..81bec28bdc48
--- /dev/null
+++ b/arch/parisc/include/asm/compat_rt_sigframe.h
@@ -0,0 +1,50 @@
1#include<linux/compat.h>
2#include<linux/compat_siginfo.h>
3#include<asm/compat_ucontext.h>
4
5#ifndef _ASM_PARISC_COMPAT_RT_SIGFRAME_H
6#define _ASM_PARISC_COMPAT_RT_SIGFRAME_H
7
8/* In a deft move of uber-hackery, we decide to carry the top half of all
9 * 64-bit registers in a non-portable, non-ABI, hidden structure.
10 * Userspace can read the hidden structure if it *wants* but is never
11 * guaranteed to be in the same place. Infact the uc_sigmask from the
12 * ucontext_t structure may push the hidden register file downards
13 */
14struct compat_regfile {
15 /* Upper half of all the 64-bit registers that were truncated
16 on a copy to a 32-bit userspace */
17 compat_int_t rf_gr[32];
18 compat_int_t rf_iasq[2];
19 compat_int_t rf_iaoq[2];
20 compat_int_t rf_sar;
21};
22
23#define COMPAT_SIGRETURN_TRAMP 4
24#define COMPAT_SIGRESTARTBLOCK_TRAMP 5
25#define COMPAT_TRAMP_SIZE (COMPAT_SIGRETURN_TRAMP + COMPAT_SIGRESTARTBLOCK_TRAMP)
26
27struct compat_rt_sigframe {
28 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
29 Secondary to that it must protect the ERESTART_RESTARTBLOCK
30 trampoline we left on the stack (we were bad and didn't
31 change sp so we could run really fast.) */
32 compat_uint_t tramp[COMPAT_TRAMP_SIZE];
33 compat_siginfo_t info;
34 struct compat_ucontext uc;
35 /* Hidden location of truncated registers, *must* be last. */
36 struct compat_regfile regs;
37};
38
39/*
40 * The 32-bit ABI wants at least 48 bytes for a function call frame:
41 * 16 bytes for arg0-arg3, and 32 bytes for magic (the only part of
42 * which Linux/parisc uses is sp-20 for the saved return pointer...)
43 * Then, the stack pointer must be rounded to a cache line (64 bytes).
44 */
45#define SIGFRAME32 64
46#define FUNCTIONCALLFRAME32 48
47#define PARISC_RT_SIGFRAME_SIZE32 \
48 (((sizeof(struct compat_rt_sigframe) + FUNCTIONCALLFRAME32) + SIGFRAME32) & -SIGFRAME32)
49
50#endif
diff --git a/arch/parisc/include/asm/compat_signal.h b/arch/parisc/include/asm/compat_signal.h
new file mode 100644
index 000000000000..6ad02c360b21
--- /dev/null
+++ b/arch/parisc/include/asm/compat_signal.h
@@ -0,0 +1,2 @@
1/* Use generic */
2#include <asm-generic/compat_signal.h>
diff --git a/arch/parisc/include/asm/compat_ucontext.h b/arch/parisc/include/asm/compat_ucontext.h
new file mode 100644
index 000000000000..2f7292afde3c
--- /dev/null
+++ b/arch/parisc/include/asm/compat_ucontext.h
@@ -0,0 +1,17 @@
1#ifndef _ASM_PARISC_COMPAT_UCONTEXT_H
2#define _ASM_PARISC_COMPAT_UCONTEXT_H
3
4#include <linux/compat.h>
5
6/* 32-bit ucontext as seen from an 64-bit kernel */
7struct compat_ucontext {
8 compat_uint_t uc_flags;
9 compat_uptr_t uc_link;
10 compat_stack_t uc_stack; /* struct compat_sigaltstack (12 bytes)*/
11 /* FIXME: Pad out to get uc_mcontext to start at an 8-byte aligned boundary */
12 compat_uint_t pad[1];
13 struct compat_sigcontext uc_mcontext;
14 compat_sigset_t uc_sigmask; /* mask last for extensibility */
15};
16
17#endif /* !_ASM_PARISC_COMPAT_UCONTEXT_H */
diff --git a/arch/parisc/include/asm/cputime.h b/arch/parisc/include/asm/cputime.h
new file mode 100644
index 000000000000..dcdf2fbd7e72
--- /dev/null
+++ b/arch/parisc/include/asm/cputime.h
@@ -0,0 +1,6 @@
1#ifndef __PARISC_CPUTIME_H
2#define __PARISC_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __PARISC_CPUTIME_H */
diff --git a/arch/parisc/include/asm/current.h b/arch/parisc/include/asm/current.h
new file mode 100644
index 000000000000..0fb9338e3bf2
--- /dev/null
+++ b/arch/parisc/include/asm/current.h
@@ -0,0 +1,15 @@
1#ifndef _PARISC_CURRENT_H
2#define _PARISC_CURRENT_H
3
4#include <linux/thread_info.h>
5
6struct task_struct;
7
8static inline struct task_struct * get_current(void)
9{
10 return current_thread_info()->task;
11}
12
13#define current get_current()
14
15#endif /* !(_PARISC_CURRENT_H) */
diff --git a/arch/parisc/include/asm/delay.h b/arch/parisc/include/asm/delay.h
new file mode 100644
index 000000000000..7a75e984674b
--- /dev/null
+++ b/arch/parisc/include/asm/delay.h
@@ -0,0 +1,43 @@
1#ifndef _PARISC_DELAY_H
2#define _PARISC_DELAY_H
3
4#include <asm/system.h> /* for mfctl() */
5#include <asm/processor.h> /* for boot_cpu_data */
6
7
8/*
9 * Copyright (C) 1993 Linus Torvalds
10 *
11 * Delay routines
12 */
13
14static __inline__ void __delay(unsigned long loops) {
15 asm volatile(
16 " .balignl 64,0x34000034\n"
17 " addib,UV -1,%0,.\n"
18 " nop\n"
19 : "=r" (loops) : "0" (loops));
20}
21
22static __inline__ void __cr16_delay(unsigned long clocks) {
23 unsigned long start;
24
25 /*
26 * Note: Due to unsigned math, cr16 rollovers shouldn't be
27 * a problem here. However, on 32 bit, we need to make sure
28 * we don't pass in too big a value. The current default
29 * value of MAX_UDELAY_MS should help prevent this.
30 */
31
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
34 ;
35}
36
37static __inline__ void __udelay(unsigned long usecs) {
38 __cr16_delay(usecs * ((unsigned long)boot_cpu_data.cpu_hz / 1000000UL));
39}
40
41#define udelay(n) __udelay(n)
42
43#endif /* defined(_PARISC_DELAY_H) */
diff --git a/arch/parisc/include/asm/device.h b/arch/parisc/include/asm/device.h
new file mode 100644
index 000000000000..d8f9872b0e2d
--- /dev/null
+++ b/arch/parisc/include/asm/device.h
@@ -0,0 +1,7 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/parisc/include/asm/div64.h b/arch/parisc/include/asm/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/arch/parisc/include/asm/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/arch/parisc/include/asm/dma-mapping.h b/arch/parisc/include/asm/dma-mapping.h
new file mode 100644
index 000000000000..53af696f23d2
--- /dev/null
+++ b/arch/parisc/include/asm/dma-mapping.h
@@ -0,0 +1,253 @@
1#ifndef _PARISC_DMA_MAPPING_H
2#define _PARISC_DMA_MAPPING_H
3
4#include <linux/mm.h>
5#include <asm/cacheflush.h>
6#include <asm/scatterlist.h>
7
8/* See Documentation/DMA-mapping.txt */
9struct hppa_dma_ops {
10 int (*dma_supported)(struct device *dev, u64 mask);
11 void *(*alloc_consistent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
12 void *(*alloc_noncoherent)(struct device *dev, size_t size, dma_addr_t *iova, gfp_t flag);
13 void (*free_consistent)(struct device *dev, size_t size, void *vaddr, dma_addr_t iova);
14 dma_addr_t (*map_single)(struct device *dev, void *addr, size_t size, enum dma_data_direction direction);
15 void (*unmap_single)(struct device *dev, dma_addr_t iova, size_t size, enum dma_data_direction direction);
16 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction);
17 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nhwents, enum dma_data_direction direction);
18 void (*dma_sync_single_for_cpu)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
19 void (*dma_sync_single_for_device)(struct device *dev, dma_addr_t iova, unsigned long offset, size_t size, enum dma_data_direction direction);
20 void (*dma_sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
21 void (*dma_sync_sg_for_device)(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction);
22};
23
24/*
25** We could live without the hppa_dma_ops indirection if we didn't want
26** to support 4 different coherent dma models with one binary (they will
27** someday be loadable modules):
28** I/O MMU consistent method dma_sync behavior
29** ============= ====================== =======================
30** a) PA-7x00LC uncachable host memory flush/purge
31** b) U2/Uturn cachable host memory NOP
32** c) Ike/Astro cachable host memory NOP
33** d) EPIC/SAGA memory on EPIC/SAGA flush/reset DMA channel
34**
35** PA-7[13]00LC processors have a GSC bus interface and no I/O MMU.
36**
37** Systems (eg PCX-T workstations) that don't fall into the above
38** categories will need to modify the needed drivers to perform
39** flush/purge and allocate "regular" cacheable pages for everything.
40*/
41
42#ifdef CONFIG_PA11
43extern struct hppa_dma_ops pcxl_dma_ops;
44extern struct hppa_dma_ops pcx_dma_ops;
45#endif
46
47extern struct hppa_dma_ops *hppa_dma_ops;
48
49static inline void *
50dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
51 gfp_t flag)
52{
53 return hppa_dma_ops->alloc_consistent(dev, size, dma_handle, flag);
54}
55
56static inline void *
57dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
58 gfp_t flag)
59{
60 return hppa_dma_ops->alloc_noncoherent(dev, size, dma_handle, flag);
61}
62
63static inline void
64dma_free_coherent(struct device *dev, size_t size,
65 void *vaddr, dma_addr_t dma_handle)
66{
67 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
68}
69
70static inline void
71dma_free_noncoherent(struct device *dev, size_t size,
72 void *vaddr, dma_addr_t dma_handle)
73{
74 hppa_dma_ops->free_consistent(dev, size, vaddr, dma_handle);
75}
76
77static inline dma_addr_t
78dma_map_single(struct device *dev, void *ptr, size_t size,
79 enum dma_data_direction direction)
80{
81 return hppa_dma_ops->map_single(dev, ptr, size, direction);
82}
83
84static inline void
85dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
86 enum dma_data_direction direction)
87{
88 hppa_dma_ops->unmap_single(dev, dma_addr, size, direction);
89}
90
91static inline int
92dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
93 enum dma_data_direction direction)
94{
95 return hppa_dma_ops->map_sg(dev, sg, nents, direction);
96}
97
98static inline void
99dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
100 enum dma_data_direction direction)
101{
102 hppa_dma_ops->unmap_sg(dev, sg, nhwentries, direction);
103}
104
105static inline dma_addr_t
106dma_map_page(struct device *dev, struct page *page, unsigned long offset,
107 size_t size, enum dma_data_direction direction)
108{
109 return dma_map_single(dev, (page_address(page) + (offset)), size, direction);
110}
111
112static inline void
113dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
114 enum dma_data_direction direction)
115{
116 dma_unmap_single(dev, dma_address, size, direction);
117}
118
119
120static inline void
121dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
122 enum dma_data_direction direction)
123{
124 if(hppa_dma_ops->dma_sync_single_for_cpu)
125 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, 0, size, direction);
126}
127
128static inline void
129dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
130 enum dma_data_direction direction)
131{
132 if(hppa_dma_ops->dma_sync_single_for_device)
133 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, 0, size, direction);
134}
135
136static inline void
137dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
138 unsigned long offset, size_t size,
139 enum dma_data_direction direction)
140{
141 if(hppa_dma_ops->dma_sync_single_for_cpu)
142 hppa_dma_ops->dma_sync_single_for_cpu(dev, dma_handle, offset, size, direction);
143}
144
145static inline void
146dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
147 unsigned long offset, size_t size,
148 enum dma_data_direction direction)
149{
150 if(hppa_dma_ops->dma_sync_single_for_device)
151 hppa_dma_ops->dma_sync_single_for_device(dev, dma_handle, offset, size, direction);
152}
153
154static inline void
155dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
156 enum dma_data_direction direction)
157{
158 if(hppa_dma_ops->dma_sync_sg_for_cpu)
159 hppa_dma_ops->dma_sync_sg_for_cpu(dev, sg, nelems, direction);
160}
161
162static inline void
163dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
164 enum dma_data_direction direction)
165{
166 if(hppa_dma_ops->dma_sync_sg_for_device)
167 hppa_dma_ops->dma_sync_sg_for_device(dev, sg, nelems, direction);
168}
169
170static inline int
171dma_supported(struct device *dev, u64 mask)
172{
173 return hppa_dma_ops->dma_supported(dev, mask);
174}
175
176static inline int
177dma_set_mask(struct device *dev, u64 mask)
178{
179 if(!dev->dma_mask || !dma_supported(dev, mask))
180 return -EIO;
181
182 *dev->dma_mask = mask;
183
184 return 0;
185}
186
187static inline int
188dma_get_cache_alignment(void)
189{
190 return dcache_stride;
191}
192
193static inline int
194dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
195{
196 return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
197}
198
199static inline void
200dma_cache_sync(struct device *dev, void *vaddr, size_t size,
201 enum dma_data_direction direction)
202{
203 if(hppa_dma_ops->dma_sync_single_for_cpu)
204 flush_kernel_dcache_range((unsigned long)vaddr, size);
205}
206
207static inline void *
208parisc_walk_tree(struct device *dev)
209{
210 struct device *otherdev;
211 if(likely(dev->platform_data != NULL))
212 return dev->platform_data;
213 /* OK, just traverse the bus to find it */
214 for(otherdev = dev->parent; otherdev;
215 otherdev = otherdev->parent) {
216 if(otherdev->platform_data) {
217 dev->platform_data = otherdev->platform_data;
218 break;
219 }
220 }
221 BUG_ON(!dev->platform_data);
222 return dev->platform_data;
223}
224
225#define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu);
226
227
228#ifdef CONFIG_IOMMU_CCIO
229struct parisc_device;
230struct ioc;
231void * ccio_get_iommu(const struct parisc_device *dev);
232int ccio_request_resource(const struct parisc_device *dev,
233 struct resource *res);
234int ccio_allocate_resource(const struct parisc_device *dev,
235 struct resource *res, unsigned long size,
236 unsigned long min, unsigned long max, unsigned long align);
237#else /* !CONFIG_IOMMU_CCIO */
238#define ccio_get_iommu(dev) NULL
239#define ccio_request_resource(dev, res) insert_resource(&iomem_resource, res)
240#define ccio_allocate_resource(dev, res, size, min, max, align) \
241 allocate_resource(&iomem_resource, res, size, min, max, \
242 align, NULL, NULL)
243#endif /* !CONFIG_IOMMU_CCIO */
244
245#ifdef CONFIG_IOMMU_SBA
246struct parisc_device;
247void * sba_get_iommu(struct parisc_device *dev);
248#endif
249
250/* At the moment, we panic on error for IOMMU resource exaustion */
251#define dma_mapping_error(dev, x) 0
252
253#endif
diff --git a/arch/parisc/include/asm/dma.h b/arch/parisc/include/asm/dma.h
new file mode 100644
index 000000000000..31ad0f05af3d
--- /dev/null
+++ b/arch/parisc/include/asm/dma.h
@@ -0,0 +1,186 @@
1/* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 * (c) Copyright 2000, Grant Grundler
7 */
8
9#ifndef _ASM_DMA_H
10#define _ASM_DMA_H
11
12#include <asm/io.h> /* need byte IO */
13#include <asm/system.h>
14
15#define dma_outb outb
16#define dma_inb inb
17
18/*
19** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
20** (or rather not merge) DMAs into manageable chunks.
21** On parisc, this is more of the software/tuning constraint
22** rather than the HW. I/O MMU allocation algorithms can be
23** faster with smaller sizes (to some degree).
24*/
25#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE)
26
27/* The maximum address that we can perform a DMA transfer to on this platform
28** New dynamic DMA interfaces should obsolete this....
29*/
30#define MAX_DMA_ADDRESS (~0UL)
31
32/*
33** We don't have DMA channels... well V-class does but the
34** Dynamic DMA Mapping interface will support them... right? :^)
35** Note: this is not relevant right now for PA-RISC, but we cannot
36** leave this as undefined because some things (e.g. sound)
37** won't compile :-(
38*/
39#define MAX_DMA_CHANNELS 8
40#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
41#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
42#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
43
44#define DMA_AUTOINIT 0x10
45
46/* 8237 DMA controllers */
47#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */
48#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
49
50/* DMA controller registers */
51#define DMA1_CMD_REG 0x08 /* command register (w) */
52#define DMA1_STAT_REG 0x08 /* status register (r) */
53#define DMA1_REQ_REG 0x09 /* request register (w) */
54#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */
55#define DMA1_MODE_REG 0x0B /* mode register (w) */
56#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */
57#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */
58#define DMA1_RESET_REG 0x0D /* Master Clear (w) */
59#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */
60#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */
61#define DMA1_EXT_MODE_REG (0x400 | DMA1_MODE_REG)
62
63#define DMA2_CMD_REG 0xD0 /* command register (w) */
64#define DMA2_STAT_REG 0xD0 /* status register (r) */
65#define DMA2_REQ_REG 0xD2 /* request register (w) */
66#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */
67#define DMA2_MODE_REG 0xD6 /* mode register (w) */
68#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */
69#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */
70#define DMA2_RESET_REG 0xDA /* Master Clear (w) */
71#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */
72#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */
73#define DMA2_EXT_MODE_REG (0x400 | DMA2_MODE_REG)
74
75static __inline__ unsigned long claim_dma_lock(void)
76{
77 return 0;
78}
79
80static __inline__ void release_dma_lock(unsigned long flags)
81{
82}
83
84
85/* Get DMA residue count. After a DMA transfer, this
86 * should return zero. Reading this while a DMA transfer is
87 * still in progress will return unpredictable results.
88 * If called before the channel has been used, it may return 1.
89 * Otherwise, it returns the number of _bytes_ left to transfer.
90 *
91 * Assumes DMA flip-flop is clear.
92 */
93static __inline__ int get_dma_residue(unsigned int dmanr)
94{
95 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
96 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
97
98 /* using short to get 16-bit wrap around */
99 unsigned short count;
100
101 count = 1 + dma_inb(io_port);
102 count += dma_inb(io_port) << 8;
103
104 return (dmanr<=3)? count : (count<<1);
105}
106
107/* enable/disable a specific DMA channel */
108static __inline__ void enable_dma(unsigned int dmanr)
109{
110#ifdef CONFIG_SUPERIO
111 if (dmanr<=3)
112 dma_outb(dmanr, DMA1_MASK_REG);
113 else
114 dma_outb(dmanr & 3, DMA2_MASK_REG);
115#endif
116}
117
118static __inline__ void disable_dma(unsigned int dmanr)
119{
120#ifdef CONFIG_SUPERIO
121 if (dmanr<=3)
122 dma_outb(dmanr | 4, DMA1_MASK_REG);
123 else
124 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
125#endif
126}
127
128/* reserve a DMA channel */
129#define request_dma(dmanr, device_id) (0)
130
131/* Clear the 'DMA Pointer Flip Flop'.
132 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
133 * Use this once to initialize the FF to a known state.
134 * After that, keep track of it. :-)
135 * --- In order to do that, the DMA routines below should ---
136 * --- only be used while holding the DMA lock ! ---
137 */
138static __inline__ void clear_dma_ff(unsigned int dmanr)
139{
140}
141
142/* set mode (above) for a specific DMA channel */
143static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
144{
145}
146
147/* Set only the page register bits of the transfer address.
148 * This is used for successive transfers when we know the contents of
149 * the lower 16 bits of the DMA current address register, but a 64k boundary
150 * may have been crossed.
151 */
152static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
153{
154}
155
156
157/* Set transfer address & page bits for specific DMA channel.
158 * Assumes dma flipflop is clear.
159 */
160static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
161{
162}
163
164
165/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
166 * a specific DMA channel.
167 * You must ensure the parameters are valid.
168 * NOTE: from a manual: "the number of transfers is one more
169 * than the initial word count"! This is taken into account.
170 * Assumes dma flip-flop is clear.
171 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
172 */
173static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
174{
175}
176
177
178#define free_dma(dmanr)
179
180#ifdef CONFIG_PCI
181extern int isa_dma_bridge_buggy;
182#else
183#define isa_dma_bridge_buggy (0)
184#endif
185
186#endif /* _ASM_DMA_H */
diff --git a/arch/parisc/include/asm/eisa_bus.h b/arch/parisc/include/asm/eisa_bus.h
new file mode 100644
index 000000000000..201085f83dd5
--- /dev/null
+++ b/arch/parisc/include/asm/eisa_bus.h
@@ -0,0 +1,23 @@
1/*
2 * eisa_bus.h interface between the eisa BA driver and the bus enumerator
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_H
14#define ASM_EISA_H
15
16extern void eisa_make_irq_level(int num);
17extern void eisa_make_irq_edge(int num);
18extern int eisa_enumerator(unsigned long eeprom_addr,
19 struct resource *io_parent,
20 struct resource *mem_parent);
21extern int eisa_eeprom_init(unsigned long addr);
22
23#endif
diff --git a/arch/parisc/include/asm/eisa_eeprom.h b/arch/parisc/include/asm/eisa_eeprom.h
new file mode 100644
index 000000000000..9c9da980402a
--- /dev/null
+++ b/arch/parisc/include/asm/eisa_eeprom.h
@@ -0,0 +1,153 @@
1/*
2 * eisa_eeprom.h - provide support for EISA adapters in PA-RISC machines
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Copyright (c) 2001, 2002 Daniel Engstrom <5116@telia.com>
10 *
11 */
12
13#ifndef ASM_EISA_EEPROM_H
14#define ASM_EISA_EEPROM_H
15
16extern void __iomem *eisa_eeprom_addr;
17
18#define HPEE_MAX_LENGTH 0x2000 /* maximum eeprom length */
19
20#define HPEE_SLOT_INFO(slot) (20+(48*slot))
21
22struct eeprom_header
23{
24
25 u_int32_t num_writes; /* number of writes */
26 u_int8_t flags; /* flags, usage? */
27 u_int8_t ver_maj;
28 u_int8_t ver_min;
29 u_int8_t num_slots; /* number of EISA slots in system */
30 u_int16_t csum; /* checksum, I don't know how to calulate this */
31 u_int8_t pad[10];
32} __attribute__ ((packed));
33
34
35struct eeprom_eisa_slot_info
36{
37 u_int32_t eisa_slot_id;
38 u_int32_t config_data_offset;
39 u_int32_t num_writes;
40 u_int16_t csum;
41 u_int16_t num_functions;
42 u_int16_t config_data_length;
43
44 /* bits 0..3 are the duplicate slot id */
45#define HPEE_SLOT_INFO_EMBEDDED 0x10
46#define HPEE_SLOT_INFO_VIRTUAL 0x20
47#define HPEE_SLOT_INFO_NO_READID 0x40
48#define HPEE_SLOT_INFO_DUPLICATE 0x80
49 u_int8_t slot_info;
50
51#define HPEE_SLOT_FEATURES_ENABLE 0x01
52#define HPEE_SLOT_FEATURES_IOCHK 0x02
53#define HPEE_SLOT_FEATURES_CFG_INCOMPLETE 0x80
54 u_int8_t slot_features;
55
56 u_int8_t ver_min;
57 u_int8_t ver_maj;
58
59#define HPEE_FUNCTION_INFO_HAVE_TYPE 0x01
60#define HPEE_FUNCTION_INFO_HAVE_MEMORY 0x02
61#define HPEE_FUNCTION_INFO_HAVE_IRQ 0x04
62#define HPEE_FUNCTION_INFO_HAVE_DMA 0x08
63#define HPEE_FUNCTION_INFO_HAVE_PORT 0x10
64#define HPEE_FUNCTION_INFO_HAVE_PORT_INIT 0x20
65/* I think there are two slighty different
66 * versions of the function_info field
67 * one int the fixed header and one optional
68 * in the parsed slot data area */
69#define HPEE_FUNCTION_INFO_HAVE_FUNCTION 0x01
70#define HPEE_FUNCTION_INFO_F_DISABLED 0x80
71#define HPEE_FUNCTION_INFO_CFG_FREE_FORM 0x40
72 u_int8_t function_info;
73
74#define HPEE_FLAG_BOARD_IS_ISA 0x01 /* flag and minor version for isa board */
75 u_int8_t flags;
76 u_int8_t pad[24];
77} __attribute__ ((packed));
78
79
80#define HPEE_MEMORY_MAX_ENT 9
81/* memory descriptor: byte 0 */
82#define HPEE_MEMORY_WRITABLE 0x01
83#define HPEE_MEMORY_CACHABLE 0x02
84#define HPEE_MEMORY_TYPE_MASK 0x18
85#define HPEE_MEMORY_TYPE_SYS 0x00
86#define HPEE_MEMORY_TYPE_EXP 0x08
87#define HPEE_MEMORY_TYPE_VIR 0x10
88#define HPEE_MEMORY_TYPE_OTH 0x18
89#define HPEE_MEMORY_SHARED 0x20
90#define HPEE_MEMORY_MORE 0x80
91
92/* memory descriptor: byte 1 */
93#define HPEE_MEMORY_WIDTH_MASK 0x03
94#define HPEE_MEMORY_WIDTH_BYTE 0x00
95#define HPEE_MEMORY_WIDTH_WORD 0x01
96#define HPEE_MEMORY_WIDTH_DWORD 0x02
97#define HPEE_MEMORY_DECODE_MASK 0x0c
98#define HPEE_MEMORY_DECODE_20BITS 0x00
99#define HPEE_MEMORY_DECODE_24BITS 0x04
100#define HPEE_MEMORY_DECODE_32BITS 0x08
101/* byte 2 and 3 are a 16bit LE value
102 * containging the memory size in kilobytes */
103/* byte 4,5,6 are a 24bit LE value
104 * containing the memory base address */
105
106
107#define HPEE_IRQ_MAX_ENT 7
108/* Interrupt entry: byte 0 */
109#define HPEE_IRQ_CHANNEL_MASK 0xf
110#define HPEE_IRQ_TRIG_LEVEL 0x20
111#define HPEE_IRQ_MORE 0x80
112/* byte 1 seems to be unused */
113
114#define HPEE_DMA_MAX_ENT 4
115
116/* dma entry: byte 0 */
117#define HPEE_DMA_CHANNEL_MASK 7
118#define HPEE_DMA_SIZE_MASK 0xc
119#define HPEE_DMA_SIZE_BYTE 0x0
120#define HPEE_DMA_SIZE_WORD 0x4
121#define HPEE_DMA_SIZE_DWORD 0x8
122#define HPEE_DMA_SHARED 0x40
123#define HPEE_DMA_MORE 0x80
124
125/* dma entry: byte 1 */
126#define HPEE_DMA_TIMING_MASK 0x30
127#define HPEE_DMA_TIMING_ISA 0x0
128#define HPEE_DMA_TIMING_TYPEA 0x10
129#define HPEE_DMA_TIMING_TYPEB 0x20
130#define HPEE_DMA_TIMING_TYPEC 0x30
131
132#define HPEE_PORT_MAX_ENT 20
133/* port entry byte 0 */
134#define HPEE_PORT_SIZE_MASK 0x1f
135#define HPEE_PORT_SHARED 0x40
136#define HPEE_PORT_MORE 0x80
137/* byte 1 and 2 is a 16bit LE value
138 * conating the start port number */
139
140#define HPEE_PORT_INIT_MAX_LEN 60 /* in bytes here */
141/* port init entry byte 0 */
142#define HPEE_PORT_INIT_WIDTH_MASK 0x3
143#define HPEE_PORT_INIT_WIDTH_BYTE 0x0
144#define HPEE_PORT_INIT_WIDTH_WORD 0x1
145#define HPEE_PORT_INIT_WIDTH_DWORD 0x2
146#define HPEE_PORT_INIT_MASK 0x4
147#define HPEE_PORT_INIT_MORE 0x80
148
149#define HPEE_SELECTION_MAX_ENT 26
150
151#define HPEE_TYPE_MAX_LEN 80
152
153#endif
diff --git a/arch/parisc/include/asm/elf.h b/arch/parisc/include/asm/elf.h
new file mode 100644
index 000000000000..7fa675799e6d
--- /dev/null
+++ b/arch/parisc/include/asm/elf.h
@@ -0,0 +1,342 @@
1#ifndef __ASMPARISC_ELF_H
2#define __ASMPARISC_ELF_H
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9
10#define EM_PARISC 15
11
12/* HPPA specific definitions. */
13
14/* Legal values for e_flags field of Elf32_Ehdr. */
15
16#define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
17#define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
18#define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
19#define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
20#define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
21 prediction. */
22#define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
23#define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
24
25/* Defined values for `e_flags & EF_PARISC_ARCH' are: */
26
27#define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
28#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
29#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
30
31/* Additional section indices. */
32
33#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
34 symbols in ANSI C. */
35#define SHN_PARISC_HUGE_COMMON 0xff01 /* Common blocks in huge model. */
36
37/* Legal values for sh_type field of Elf32_Shdr. */
38
39#define SHT_PARISC_EXT 0x70000000 /* Contains product specific ext. */
40#define SHT_PARISC_UNWIND 0x70000001 /* Unwind information. */
41#define SHT_PARISC_DOC 0x70000002 /* Debug info for optimized code. */
42
43/* Legal values for sh_flags field of Elf32_Shdr. */
44
45#define SHF_PARISC_SHORT 0x20000000 /* Section with short addressing. */
46#define SHF_PARISC_HUGE 0x40000000 /* Section far from gp. */
47#define SHF_PARISC_SBP 0x80000000 /* Static branch prediction code. */
48
49/* Legal values for ST_TYPE subfield of st_info (symbol type). */
50
51#define STT_PARISC_MILLICODE 13 /* Millicode function entry point. */
52
53#define STT_HP_OPAQUE (STT_LOOS + 0x1)
54#define STT_HP_STUB (STT_LOOS + 0x2)
55
56/* HPPA relocs. */
57
58#define R_PARISC_NONE 0 /* No reloc. */
59#define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
60#define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
61#define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
62#define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
63#define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
64#define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
65#define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
66#define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
67#define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
68#define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
69#define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
70#define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
71#define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
72#define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
73#define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
74#define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
75#define R_PARISC_SECREL32 41 /* 32 bits section rel. address. */
76#define R_PARISC_SEGBASE 48 /* No relocation, set segment base. */
77#define R_PARISC_SEGREL32 49 /* 32 bits segment rel. address. */
78#define R_PARISC_PLTOFF21L 50 /* PLT rel. address, left 21 bits. */
79#define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
80#define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
81#define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
82#define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
83#define R_PARISC_FPTR64 64 /* 64 bits function address. */
84#define R_PARISC_PLABEL32 65 /* 32 bits function address. */
85#define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
86#define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
87#define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
88#define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
89#define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
90#define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
91#define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
92#define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
93#define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
94#define R_PARISC_DIR14DR 84 /* 14 bits of eff. address. */
95#define R_PARISC_DIR16F 85 /* 16 bits of eff. address. */
96#define R_PARISC_DIR16WF 86 /* 16 bits of eff. address. */
97#define R_PARISC_DIR16DF 87 /* 16 bits of eff. address. */
98#define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
99#define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
100#define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
101#define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
102#define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
103#define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
104#define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
105#define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
106#define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
107#define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
108#define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
109#define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
110#define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
111#define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
112#define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
113#define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
114#define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
115#define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
116#define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
117#define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
118#define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
119#define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
120#define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
121#define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
122#define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
123#define R_PARISC_LORESERVE 128
124#define R_PARISC_COPY 128 /* Copy relocation. */
125#define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
126#define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
127#define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
128#define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
129#define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
130#define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
131#define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
132#define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
133#define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
134#define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
135#define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
136#define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
137#define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
138#define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
139#define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
140#define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
141#define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
142#define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
143#define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
144#define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
145#define R_PARISC_HIRESERVE 255
146
147#define PA_PLABEL_FDESC 0x02 /* bit set if PLABEL points to
148 * a function descriptor, not
149 * an address */
150
151/* The following are PA function descriptors
152 *
153 * addr: the absolute address of the function
154 * gp: either the data pointer (r27) for non-PIC code or the
155 * the PLT pointer (r19) for PIC code */
156
157/* Format for the Elf32 Function descriptor */
158typedef struct elf32_fdesc {
159 __u32 addr;
160 __u32 gp;
161} Elf32_Fdesc;
162
163/* Format for the Elf64 Function descriptor */
164typedef struct elf64_fdesc {
165 __u64 dummy[2]; /* FIXME: nothing uses these, why waste
166 * the space */
167 __u64 addr;
168 __u64 gp;
169} Elf64_Fdesc;
170
171/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr. */
172
173#define PT_HP_TLS (PT_LOOS + 0x0)
174#define PT_HP_CORE_NONE (PT_LOOS + 0x1)
175#define PT_HP_CORE_VERSION (PT_LOOS + 0x2)
176#define PT_HP_CORE_KERNEL (PT_LOOS + 0x3)
177#define PT_HP_CORE_COMM (PT_LOOS + 0x4)
178#define PT_HP_CORE_PROC (PT_LOOS + 0x5)
179#define PT_HP_CORE_LOADABLE (PT_LOOS + 0x6)
180#define PT_HP_CORE_STACK (PT_LOOS + 0x7)
181#define PT_HP_CORE_SHM (PT_LOOS + 0x8)
182#define PT_HP_CORE_MMF (PT_LOOS + 0x9)
183#define PT_HP_PARALLEL (PT_LOOS + 0x10)
184#define PT_HP_FASTBIND (PT_LOOS + 0x11)
185#define PT_HP_OPT_ANNOT (PT_LOOS + 0x12)
186#define PT_HP_HSL_ANNOT (PT_LOOS + 0x13)
187#define PT_HP_STACK (PT_LOOS + 0x14)
188
189#define PT_PARISC_ARCHEXT 0x70000000
190#define PT_PARISC_UNWIND 0x70000001
191
192/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr. */
193
194#define PF_PARISC_SBP 0x08000000
195
196#define PF_HP_PAGE_SIZE 0x00100000
197#define PF_HP_FAR_SHARED 0x00200000
198#define PF_HP_NEAR_SHARED 0x00400000
199#define PF_HP_CODE 0x01000000
200#define PF_HP_MODIFY 0x02000000
201#define PF_HP_LAZYSWAP 0x04000000
202#define PF_HP_SBP 0x08000000
203
204/*
205 * The following definitions are those for 32-bit ELF binaries on a 32-bit
206 * kernel and for 64-bit binaries on a 64-bit kernel. To run 32-bit binaries
207 * on a 64-bit kernel, arch/parisc/kernel/binfmt_elf32.c defines these
208 * macros appropriately and then #includes binfmt_elf.c, which then includes
209 * this file.
210 */
211#ifndef ELF_CLASS
212
213/*
214 * This is used to ensure we don't load something for the wrong architecture.
215 *
216 * Note that this header file is used by default in fs/binfmt_elf.c. So
217 * the following macros are for the default case. However, for the 64
218 * bit kernel we also support 32 bit parisc binaries. To do that
219 * arch/parisc/kernel/binfmt_elf32.c defines its own set of these
220 * macros, and then it includes fs/binfmt_elf.c to provide an alternate
221 * elf binary handler for 32 bit binaries (on the 64 bit kernel).
222 */
223#ifdef CONFIG_64BIT
224#define ELF_CLASS ELFCLASS64
225#else
226#define ELF_CLASS ELFCLASS32
227#endif
228
229typedef unsigned long elf_greg_t;
230
231/*
232 * This yields a string that ld.so will use to load implementation
233 * specific libraries for optimization. This is more specific in
234 * intent than poking at uname or /proc/cpuinfo.
235 */
236
237#define ELF_PLATFORM ("PARISC\0")
238
239#define SET_PERSONALITY(ex) \
240 current->personality = PER_LINUX; \
241 current->thread.map_base = DEFAULT_MAP_BASE; \
242 current->thread.task_size = DEFAULT_TASK_SIZE \
243
244/*
245 * Fill in general registers in a core dump. This saves pretty
246 * much the same registers as hp-ux, although in a different order.
247 * Registers marked # below are not currently saved in pt_regs, so
248 * we use their current values here.
249 *
250 * gr0..gr31
251 * sr0..sr7
252 * iaoq0..iaoq1
253 * iasq0..iasq1
254 * cr11 (sar)
255 * cr19 (iir)
256 * cr20 (isr)
257 * cr21 (ior)
258 * # cr22 (ipsw)
259 * # cr0 (recovery counter)
260 * # cr24..cr31 (temporary registers)
261 * # cr8,9,12,13 (protection IDs)
262 * # cr10 (scr/ccr)
263 * # cr15 (ext int enable mask)
264 *
265 */
266
267#define ELF_CORE_COPY_REGS(dst, pt) \
268 memset(dst, 0, sizeof(dst)); /* don't leak any "random" bits */ \
269 memcpy(dst + 0, pt->gr, 32 * sizeof(elf_greg_t)); \
270 memcpy(dst + 32, pt->sr, 8 * sizeof(elf_greg_t)); \
271 memcpy(dst + 40, pt->iaoq, 2 * sizeof(elf_greg_t)); \
272 memcpy(dst + 42, pt->iasq, 2 * sizeof(elf_greg_t)); \
273 dst[44] = pt->sar; dst[45] = pt->iir; \
274 dst[46] = pt->isr; dst[47] = pt->ior; \
275 dst[48] = mfctl(22); dst[49] = mfctl(0); \
276 dst[50] = mfctl(24); dst[51] = mfctl(25); \
277 dst[52] = mfctl(26); dst[53] = mfctl(27); \
278 dst[54] = mfctl(28); dst[55] = mfctl(29); \
279 dst[56] = mfctl(30); dst[57] = mfctl(31); \
280 dst[58] = mfctl( 8); dst[59] = mfctl( 9); \
281 dst[60] = mfctl(12); dst[61] = mfctl(13); \
282 dst[62] = mfctl(10); dst[63] = mfctl(15);
283
284#endif /* ! ELF_CLASS */
285
286#define ELF_NGREG 80 /* We only need 64 at present, but leave space
287 for expansion. */
288typedef elf_greg_t elf_gregset_t[ELF_NGREG];
289
290#define ELF_NFPREG 32
291typedef double elf_fpreg_t;
292typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
293
294struct task_struct;
295
296extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
297#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
298
299struct pt_regs; /* forward declaration... */
300
301
302#define elf_check_arch(x) ((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELF_CLASS)
303
304/*
305 * These are used to set parameters in the core dumps.
306 */
307#define ELF_DATA ELFDATA2MSB
308#define ELF_ARCH EM_PARISC
309#define ELF_OSABI ELFOSABI_LINUX
310
311/* %r23 is set by ld.so to a pointer to a function which might be
312 registered using atexit. This provides a means for the dynamic
313 linker to call DT_FINI functions for shared libraries that have
314 been loaded before the code runs.
315
316 So that we can use the same startup file with static executables,
317 we start programs with a value of 0 to indicate that there is no
318 such function. */
319#define ELF_PLAT_INIT(_r, load_addr) _r->gr[23] = 0
320
321#define USE_ELF_CORE_DUMP
322#define ELF_EXEC_PAGESIZE 4096
323
324/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
325 use of this is to invoke "./ld.so someprog" to test out a new version of
326 the loader. We need to make sure that it is out of the way of the program
327 that it will "exec", and that there is sufficient room for the brk.
328
329 (2 * TASK_SIZE / 3) turns into something undefined when run through a
330 32 bit preprocessor and in some cases results in the kernel trying to map
331 ld.so to the kernel virtual base. Use a sane value instead. /Jes
332 */
333
334#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x01000000)
335
336/* This yields a mask that user programs can use to figure out what
337 instruction set this CPU supports. This could be done in user space,
338 but it's not easy, and we've already done it here. */
339
340#define ELF_HWCAP 0
341
342#endif
diff --git a/arch/parisc/include/asm/emergency-restart.h b/arch/parisc/include/asm/emergency-restart.h
new file mode 100644
index 000000000000..108d8c48e42e
--- /dev/null
+++ b/arch/parisc/include/asm/emergency-restart.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/parisc/include/asm/errno.h b/arch/parisc/include/asm/errno.h
new file mode 100644
index 000000000000..e2f3ddc796be
--- /dev/null
+++ b/arch/parisc/include/asm/errno.h
@@ -0,0 +1,124 @@
1#ifndef _PARISC_ERRNO_H
2#define _PARISC_ERRNO_H
3
4#include <asm-generic/errno-base.h>
5
6#define ENOMSG 35 /* No message of desired type */
7#define EIDRM 36 /* Identifier removed */
8#define ECHRNG 37 /* Channel number out of range */
9#define EL2NSYNC 38 /* Level 2 not synchronized */
10#define EL3HLT 39 /* Level 3 halted */
11#define EL3RST 40 /* Level 3 reset */
12#define ELNRNG 41 /* Link number out of range */
13#define EUNATCH 42 /* Protocol driver not attached */
14#define ENOCSI 43 /* No CSI structure available */
15#define EL2HLT 44 /* Level 2 halted */
16#define EDEADLK 45 /* Resource deadlock would occur */
17#define EDEADLOCK EDEADLK
18#define ENOLCK 46 /* No record locks available */
19#define EILSEQ 47 /* Illegal byte sequence */
20
21#define ENONET 50 /* Machine is not on the network */
22#define ENODATA 51 /* No data available */
23#define ETIME 52 /* Timer expired */
24#define ENOSR 53 /* Out of streams resources */
25#define ENOSTR 54 /* Device not a stream */
26#define ENOPKG 55 /* Package not installed */
27
28#define ENOLINK 57 /* Link has been severed */
29#define EADV 58 /* Advertise error */
30#define ESRMNT 59 /* Srmount error */
31#define ECOMM 60 /* Communication error on send */
32#define EPROTO 61 /* Protocol error */
33
34#define EMULTIHOP 64 /* Multihop attempted */
35
36#define EDOTDOT 66 /* RFS specific error */
37#define EBADMSG 67 /* Not a data message */
38#define EUSERS 68 /* Too many users */
39#define EDQUOT 69 /* Quota exceeded */
40#define ESTALE 70 /* Stale NFS file handle */
41#define EREMOTE 71 /* Object is remote */
42#define EOVERFLOW 72 /* Value too large for defined data type */
43
44/* these errnos are defined by Linux but not HPUX. */
45
46#define EBADE 160 /* Invalid exchange */
47#define EBADR 161 /* Invalid request descriptor */
48#define EXFULL 162 /* Exchange full */
49#define ENOANO 163 /* No anode */
50#define EBADRQC 164 /* Invalid request code */
51#define EBADSLT 165 /* Invalid slot */
52#define EBFONT 166 /* Bad font file format */
53#define ENOTUNIQ 167 /* Name not unique on network */
54#define EBADFD 168 /* File descriptor in bad state */
55#define EREMCHG 169 /* Remote address changed */
56#define ELIBACC 170 /* Can not access a needed shared library */
57#define ELIBBAD 171 /* Accessing a corrupted shared library */
58#define ELIBSCN 172 /* .lib section in a.out corrupted */
59#define ELIBMAX 173 /* Attempting to link in too many shared libraries */
60#define ELIBEXEC 174 /* Cannot exec a shared library directly */
61#define ERESTART 175 /* Interrupted system call should be restarted */
62#define ESTRPIPE 176 /* Streams pipe error */
63#define EUCLEAN 177 /* Structure needs cleaning */
64#define ENOTNAM 178 /* Not a XENIX named type file */
65#define ENAVAIL 179 /* No XENIX semaphores available */
66#define EISNAM 180 /* Is a named type file */
67#define EREMOTEIO 181 /* Remote I/O error */
68#define ENOMEDIUM 182 /* No medium found */
69#define EMEDIUMTYPE 183 /* Wrong medium type */
70#define ENOKEY 184 /* Required key not available */
71#define EKEYEXPIRED 185 /* Key has expired */
72#define EKEYREVOKED 186 /* Key has been revoked */
73#define EKEYREJECTED 187 /* Key was rejected by service */
74
75/* We now return you to your regularly scheduled HPUX. */
76
77#define ENOSYM 215 /* symbol does not exist in executable */
78#define ENOTSOCK 216 /* Socket operation on non-socket */
79#define EDESTADDRREQ 217 /* Destination address required */
80#define EMSGSIZE 218 /* Message too long */
81#define EPROTOTYPE 219 /* Protocol wrong type for socket */
82#define ENOPROTOOPT 220 /* Protocol not available */
83#define EPROTONOSUPPORT 221 /* Protocol not supported */
84#define ESOCKTNOSUPPORT 222 /* Socket type not supported */
85#define EOPNOTSUPP 223 /* Operation not supported on transport endpoint */
86#define EPFNOSUPPORT 224 /* Protocol family not supported */
87#define EAFNOSUPPORT 225 /* Address family not supported by protocol */
88#define EADDRINUSE 226 /* Address already in use */
89#define EADDRNOTAVAIL 227 /* Cannot assign requested address */
90#define ENETDOWN 228 /* Network is down */
91#define ENETUNREACH 229 /* Network is unreachable */
92#define ENETRESET 230 /* Network dropped connection because of reset */
93#define ECONNABORTED 231 /* Software caused connection abort */
94#define ECONNRESET 232 /* Connection reset by peer */
95#define ENOBUFS 233 /* No buffer space available */
96#define EISCONN 234 /* Transport endpoint is already connected */
97#define ENOTCONN 235 /* Transport endpoint is not connected */
98#define ESHUTDOWN 236 /* Cannot send after transport endpoint shutdown */
99#define ETOOMANYREFS 237 /* Too many references: cannot splice */
100#define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
101#define ETIMEDOUT 238 /* Connection timed out */
102#define ECONNREFUSED 239 /* Connection refused */
103#define EREMOTERELEASE 240 /* Remote peer released connection */
104#define EHOSTDOWN 241 /* Host is down */
105#define EHOSTUNREACH 242 /* No route to host */
106
107#define EALREADY 244 /* Operation already in progress */
108#define EINPROGRESS 245 /* Operation now in progress */
109#define EWOULDBLOCK 246 /* Operation would block (Linux returns EAGAIN) */
110#define ENOTEMPTY 247 /* Directory not empty */
111#define ENAMETOOLONG 248 /* File name too long */
112#define ELOOP 249 /* Too many symbolic links encountered */
113#define ENOSYS 251 /* Function not implemented */
114
115#define ENOTSUP 252 /* Function not implemented (POSIX.4 / HPUX) */
116#define ECANCELLED 253 /* aio request was canceled before complete (POSIX.4 / HPUX) */
117#define ECANCELED ECANCELLED /* SuSv3 and Solaris wants one 'L' */
118
119/* for robust mutexes */
120#define EOWNERDEAD 254 /* Owner died */
121#define ENOTRECOVERABLE 255 /* State not recoverable */
122
123
124#endif
diff --git a/arch/parisc/include/asm/fb.h b/arch/parisc/include/asm/fb.h
new file mode 100644
index 000000000000..4d503a023ab2
--- /dev/null
+++ b/arch/parisc/include/asm/fb.h
@@ -0,0 +1,19 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/arch/parisc/include/asm/fcntl.h b/arch/parisc/include/asm/fcntl.h
new file mode 100644
index 000000000000..1e1c824764ee
--- /dev/null
+++ b/arch/parisc/include/asm/fcntl.h
@@ -0,0 +1,39 @@
1#ifndef _PARISC_FCNTL_H
2#define _PARISC_FCNTL_H
3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_APPEND 000000010
7#define O_BLKSEEK 000000100 /* HPUX only */
8#define O_CREAT 000000400 /* not fcntl */
9#define O_EXCL 000002000 /* not fcntl */
10#define O_LARGEFILE 000004000
11#define O_SYNC 000100000
12#define O_NONBLOCK 000200004 /* HPUX has separate NDELAY & NONBLOCK */
13#define O_NOCTTY 000400000 /* not fcntl */
14#define O_DSYNC 001000000 /* HPUX only */
15#define O_RSYNC 002000000 /* HPUX only */
16#define O_NOATIME 004000000
17#define O_CLOEXEC 010000000 /* set close_on_exec */
18
19#define O_DIRECTORY 000010000 /* must be a directory */
20#define O_NOFOLLOW 000000200 /* don't follow links */
21#define O_INVISIBLE 004000000 /* invisible I/O, for DMAPI/XDSM */
22
23#define F_GETLK64 8
24#define F_SETLK64 9
25#define F_SETLKW64 10
26
27#define F_GETOWN 11 /* for sockets. */
28#define F_SETOWN 12 /* for sockets. */
29#define F_SETSIG 13 /* for sockets. */
30#define F_GETSIG 14 /* for sockets. */
31
32/* for posix fcntl() and lockf() */
33#define F_RDLCK 01
34#define F_WRLCK 02
35#define F_UNLCK 03
36
37#include <asm-generic/fcntl.h>
38
39#endif
diff --git a/arch/parisc/include/asm/fixmap.h b/arch/parisc/include/asm/fixmap.h
new file mode 100644
index 000000000000..de3fe3a18229
--- /dev/null
+++ b/arch/parisc/include/asm/fixmap.h
@@ -0,0 +1,30 @@
1#ifndef _ASM_FIXMAP_H
2#define _ASM_FIXMAP_H
3
4/*
5 * This file defines the locations of the fixed mappings on parisc.
6 *
7 * All of the values in this file are machine virtual addresses.
8 *
9 * All of the values in this file must be <4GB (because of assembly
10 * loading restrictions). If you place this region anywhere above
11 * __PAGE_OFFSET, you must adjust the memory map accordingly */
12
13/* The alias region is used in kernel space to do copy/clear to or
14 * from areas congruently mapped with user space. It is 8MB large
15 * and must be 16MB aligned */
16#define TMPALIAS_MAP_START ((__PAGE_OFFSET) - 16*1024*1024)
17/* This is the kernel area for all maps (vmalloc, dma etc.) most
18 * usually, it extends up to TMPALIAS_MAP_START. Virtual addresses
19 * 0..GATEWAY_PAGE_SIZE are reserved for the gateway page */
20#define KERNEL_MAP_START (GATEWAY_PAGE_SIZE)
21#define KERNEL_MAP_END (TMPALIAS_MAP_START)
22
23#ifndef __ASSEMBLY__
24extern void *vmalloc_start;
25#define PCXL_DMA_MAP_SIZE (8*1024*1024)
26#define VMALLOC_START ((unsigned long)vmalloc_start)
27#define VMALLOC_END (KERNEL_MAP_END)
28#endif /*__ASSEMBLY__*/
29
30#endif /*_ASM_FIXMAP_H*/
diff --git a/arch/parisc/include/asm/floppy.h b/arch/parisc/include/asm/floppy.h
new file mode 100644
index 000000000000..4ca69f558fae
--- /dev/null
+++ b/arch/parisc/include/asm/floppy.h
@@ -0,0 +1,271 @@
1/* Architecture specific parts of the Floppy driver
2 *
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Copyright (C) 2000 Matthew Wilcox (willy a debian . org)
5 * Copyright (C) 2000 Dave Kennedy
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef __ASM_PARISC_FLOPPY_H
22#define __ASM_PARISC_FLOPPY_H
23
24#include <linux/vmalloc.h>
25
26
27/*
28 * The DMA channel used by the floppy controller cannot access data at
29 * addresses >= 16MB
30 *
31 * Went back to the 1MB limit, as some people had problems with the floppy
32 * driver otherwise. It doesn't matter much for performance anyway, as most
33 * floppy accesses go through the track buffer.
34 */
35#define _CROSS_64KB(a,s,vdma) \
36(!vdma && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
37
38#define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1)
39
40
41#define SW fd_routine[use_virtual_dma&1]
42#define CSW fd_routine[can_use_virtual_dma & 1]
43
44
45#define fd_inb(port) readb(port)
46#define fd_outb(value, port) writeb(value, port)
47
48#define fd_request_dma() CSW._request_dma(FLOPPY_DMA,"floppy")
49#define fd_free_dma() CSW._free_dma(FLOPPY_DMA)
50#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
51#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
52#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
53#define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
54#define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
55#define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
56
57#define FLOPPY_CAN_FALLBACK_ON_NODMA
58
59static int virtual_dma_count=0;
60static int virtual_dma_residue=0;
61static char *virtual_dma_addr=0;
62static int virtual_dma_mode=0;
63static int doing_pdma=0;
64
65static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
66{
67 register unsigned char st;
68
69#undef TRACE_FLPY_INT
70
71#ifdef TRACE_FLPY_INT
72 static int calls=0;
73 static int bytes=0;
74 static int dma_wait=0;
75#endif
76 if (!doing_pdma) {
77 floppy_interrupt(irq, dev_id, regs);
78 return;
79 }
80
81#ifdef TRACE_FLPY_INT
82 if(!calls)
83 bytes = virtual_dma_count;
84#endif
85
86 {
87 register int lcount;
88 register char *lptr = virtual_dma_addr;
89
90 for (lcount = virtual_dma_count; lcount; lcount--) {
91 st = fd_inb(virtual_dma_port+4) & 0xa0 ;
92 if (st != 0xa0)
93 break;
94 if (virtual_dma_mode) {
95 fd_outb(*lptr, virtual_dma_port+5);
96 } else {
97 *lptr = fd_inb(virtual_dma_port+5);
98 }
99 lptr++;
100 }
101 virtual_dma_count = lcount;
102 virtual_dma_addr = lptr;
103 st = fd_inb(virtual_dma_port+4);
104 }
105
106#ifdef TRACE_FLPY_INT
107 calls++;
108#endif
109 if (st == 0x20)
110 return;
111 if (!(st & 0x20)) {
112 virtual_dma_residue += virtual_dma_count;
113 virtual_dma_count = 0;
114#ifdef TRACE_FLPY_INT
115 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
116 virtual_dma_count, virtual_dma_residue, calls, bytes,
117 dma_wait);
118 calls = 0;
119 dma_wait=0;
120#endif
121 doing_pdma = 0;
122 floppy_interrupt(irq, dev_id, regs);
123 return;
124 }
125#ifdef TRACE_FLPY_INT
126 if (!virtual_dma_count)
127 dma_wait++;
128#endif
129}
130
131static void fd_disable_dma(void)
132{
133 if(! (can_use_virtual_dma & 1))
134 disable_dma(FLOPPY_DMA);
135 doing_pdma = 0;
136 virtual_dma_residue += virtual_dma_count;
137 virtual_dma_count=0;
138}
139
140static int vdma_request_dma(unsigned int dmanr, const char * device_id)
141{
142 return 0;
143}
144
145static void vdma_nop(unsigned int dummy)
146{
147}
148
149
150static int vdma_get_dma_residue(unsigned int dummy)
151{
152 return virtual_dma_count + virtual_dma_residue;
153}
154
155
156static int fd_request_irq(void)
157{
158 if(can_use_virtual_dma)
159 return request_irq(FLOPPY_IRQ, floppy_hardint,
160 IRQF_DISABLED, "floppy", NULL);
161 else
162 return request_irq(FLOPPY_IRQ, floppy_interrupt,
163 IRQF_DISABLED, "floppy", NULL);
164}
165
166static unsigned long dma_mem_alloc(unsigned long size)
167{
168 return __get_dma_pages(GFP_KERNEL, get_order(size));
169}
170
171
172static unsigned long vdma_mem_alloc(unsigned long size)
173{
174 return (unsigned long) vmalloc(size);
175
176}
177
178#define nodma_mem_alloc(size) vdma_mem_alloc(size)
179
180static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
181{
182 if((unsigned int) addr >= (unsigned int) high_memory)
183 return vfree((void *)addr);
184 else
185 free_pages(addr, get_order(size));
186}
187
188#define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size)
189
190static void _fd_chose_dma_mode(char *addr, unsigned long size)
191{
192 if(can_use_virtual_dma == 2) {
193 if((unsigned int) addr >= (unsigned int) high_memory ||
194 virt_to_bus(addr) >= 0x1000000 ||
195 _CROSS_64KB(addr, size, 0))
196 use_virtual_dma = 1;
197 else
198 use_virtual_dma = 0;
199 } else {
200 use_virtual_dma = can_use_virtual_dma & 1;
201 }
202}
203
204#define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
205
206
207static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
208{
209 doing_pdma = 1;
210 virtual_dma_port = io;
211 virtual_dma_mode = (mode == DMA_MODE_WRITE);
212 virtual_dma_addr = addr;
213 virtual_dma_count = size;
214 virtual_dma_residue = 0;
215 return 0;
216}
217
218static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
219{
220#ifdef FLOPPY_SANITY_CHECK
221 if (CROSS_64KB(addr, size)) {
222 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
223 return -1;
224 }
225#endif
226 /* actual, physical DMA */
227 doing_pdma = 0;
228 clear_dma_ff(FLOPPY_DMA);
229 set_dma_mode(FLOPPY_DMA,mode);
230 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
231 set_dma_count(FLOPPY_DMA,size);
232 enable_dma(FLOPPY_DMA);
233 return 0;
234}
235
236static struct fd_routine_l {
237 int (*_request_dma)(unsigned int dmanr, const char * device_id);
238 void (*_free_dma)(unsigned int dmanr);
239 int (*_get_dma_residue)(unsigned int dummy);
240 unsigned long (*_dma_mem_alloc) (unsigned long size);
241 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
242} fd_routine[] = {
243 {
244 request_dma,
245 free_dma,
246 get_dma_residue,
247 dma_mem_alloc,
248 hard_dma_setup
249 },
250 {
251 vdma_request_dma,
252 vdma_nop,
253 vdma_get_dma_residue,
254 vdma_mem_alloc,
255 vdma_dma_setup
256 }
257};
258
259
260static int FDC1 = 0x3f0; /* Lies. Floppy controller is memory mapped, not io mapped */
261static int FDC2 = -1;
262
263#define FLOPPY0_TYPE 0
264#define FLOPPY1_TYPE 0
265
266#define N_FDC 1
267#define N_DRIVE 8
268
269#define EXTRA_FLOPPY_PARAMS
270
271#endif /* __ASM_PARISC_FLOPPY_H */
diff --git a/arch/parisc/include/asm/futex.h b/arch/parisc/include/asm/futex.h
new file mode 100644
index 000000000000..0c705c3a55ef
--- /dev/null
+++ b/arch/parisc/include/asm/futex.h
@@ -0,0 +1,77 @@
1#ifndef _ASM_PARISC_FUTEX_H
2#define _ASM_PARISC_FUTEX_H
3
4#ifdef __KERNEL__
5
6#include <linux/futex.h>
7#include <linux/uaccess.h>
8#include <asm/errno.h>
9
10static inline int
11futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
12{
13 int op = (encoded_op >> 28) & 7;
14 int cmp = (encoded_op >> 24) & 15;
15 int oparg = (encoded_op << 8) >> 20;
16 int cmparg = (encoded_op << 20) >> 20;
17 int oldval = 0, ret;
18 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
19 oparg = 1 << oparg;
20
21 if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
22 return -EFAULT;
23
24 pagefault_disable();
25
26 switch (op) {
27 case FUTEX_OP_SET:
28 case FUTEX_OP_ADD:
29 case FUTEX_OP_OR:
30 case FUTEX_OP_ANDN:
31 case FUTEX_OP_XOR:
32 default:
33 ret = -ENOSYS;
34 }
35
36 pagefault_enable();
37
38 if (!ret) {
39 switch (cmp) {
40 case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
41 case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
42 case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
43 case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
44 case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
45 case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
46 default: ret = -ENOSYS;
47 }
48 }
49 return ret;
50}
51
52/* Non-atomic version */
53static inline int
54futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
55{
56 int err = 0;
57 int uval;
58
59 /* futex.c wants to do a cmpxchg_inatomic on kernel NULL, which is
60 * our gateway page, and causes no end of trouble...
61 */
62 if (segment_eq(KERNEL_DS, get_fs()) && !uaddr)
63 return -EFAULT;
64
65 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
66 return -EFAULT;
67
68 err = get_user(uval, uaddr);
69 if (err) return -EFAULT;
70 if (uval == oldval)
71 err = put_user(newval, uaddr);
72 if (err) return -EFAULT;
73 return uval;
74}
75
76#endif /*__KERNEL__*/
77#endif /*_ASM_PARISC_FUTEX_H*/
diff --git a/arch/parisc/include/asm/grfioctl.h b/arch/parisc/include/asm/grfioctl.h
new file mode 100644
index 000000000000..671e06042b40
--- /dev/null
+++ b/arch/parisc/include/asm/grfioctl.h
@@ -0,0 +1,113 @@
1/* Architecture specific parts of HP's STI (framebuffer) driver.
2 * Structures are HP-UX compatible for XFree86 usage.
3 *
4 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Copyright (C) 2001 Helge Deller (deller a parisc-linux org)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#ifndef __ASM_PARISC_GRFIOCTL_H
23#define __ASM_PARISC_GRFIOCTL_H
24
25/* upper 32 bits of graphics id (HP/UX identifier) */
26
27#define GRFGATOR 8
28#define S9000_ID_S300 9
29#define GRFBOBCAT 9
30#define GRFCATSEYE 9
31#define S9000_ID_98720 10
32#define GRFRBOX 10
33#define S9000_ID_98550 11
34#define GRFFIREEYE 11
35#define S9000_ID_A1096A 12
36#define GRFHYPERION 12
37#define S9000_ID_FRI 13
38#define S9000_ID_98730 14
39#define GRFDAVINCI 14
40#define S9000_ID_98705 0x26C08070 /* Tigershark */
41#define S9000_ID_98736 0x26D148AB
42#define S9000_ID_A1659A 0x26D1482A /* CRX 8 plane color (=ELK) */
43#define S9000_ID_ELK S9000_ID_A1659A
44#define S9000_ID_A1439A 0x26D148EE /* CRX24 = CRX+ (24-plane color) */
45#define S9000_ID_A1924A 0x26D1488C /* GRX gray-scale */
46#define S9000_ID_ELM S9000_ID_A1924A
47#define S9000_ID_98765 0x27480DEF
48#define S9000_ID_ELK_768 0x27482101
49#define S9000_ID_STINGER 0x27A4A402
50#define S9000_ID_TIMBER 0x27F12392 /* Bushmaster (710) Graphics */
51#define S9000_ID_TOMCAT 0x27FCCB6D /* dual-headed ELK (Dual CRX) */
52#define S9000_ID_ARTIST 0x2B4DED6D /* Artist (Gecko/712 & 715) onboard Graphics */
53#define S9000_ID_HCRX 0x2BCB015A /* Hyperdrive/Hyperbowl (A4071A) Graphics */
54#define CRX24_OVERLAY_PLANES 0x920825AA /* Overlay planes on CRX24 */
55
56#define CRT_ID_ELK_1024 S9000_ID_ELK_768 /* Elk 1024x768 CRX */
57#define CRT_ID_ELK_1280 S9000_ID_A1659A /* Elk 1280x1024 CRX */
58#define CRT_ID_ELK_1024DB 0x27849CA5 /* Elk 1024x768 double buffer */
59#define CRT_ID_ELK_GS S9000_ID_A1924A /* Elk 1280x1024 GreyScale */
60#define CRT_ID_CRX24 S9000_ID_A1439A /* Piranha */
61#define CRT_ID_VISUALIZE_EG 0x2D08C0A7 /* Graffiti, A4450A (built-in B132+/B160L) */
62#define CRT_ID_THUNDER 0x2F23E5FC /* Thunder 1 VISUALIZE 48*/
63#define CRT_ID_THUNDER2 0x2F8D570E /* Thunder 2 VISUALIZE 48 XP*/
64#define CRT_ID_HCRX S9000_ID_HCRX /* Hyperdrive HCRX */
65#define CRT_ID_CRX48Z S9000_ID_STINGER /* Stinger */
66#define CRT_ID_DUAL_CRX S9000_ID_TOMCAT /* Tomcat */
67#define CRT_ID_PVRX S9000_ID_98705 /* Tigershark */
68#define CRT_ID_TIMBER S9000_ID_TIMBER /* Timber (710 builtin) */
69#define CRT_ID_TVRX S9000_ID_98765 /* TVRX (gto/falcon) */
70#define CRT_ID_ARTIST S9000_ID_ARTIST /* Artist */
71#define CRT_ID_SUMMIT 0x2FC1066B /* Summit FX2, FX4, FX6 ... */
72#define CRT_ID_LEGO 0x35ACDA30 /* Lego FX5, FX10 ... */
73#define CRT_ID_PINNACLE 0x35ACDA16 /* Pinnacle FXe */
74
75/* structure for ioctl(GCDESCRIBE) */
76
77#define gaddr_t unsigned long /* FIXME: PA2.0 (64bit) portable ? */
78
79struct grf_fbinfo {
80 unsigned int id; /* upper 32 bits of graphics id */
81 unsigned int mapsize; /* mapped size of framebuffer */
82 unsigned int dwidth, dlength;/* x and y sizes */
83 unsigned int width, length; /* total x and total y size */
84 unsigned int xlen; /* x pitch size */
85 unsigned int bpp, bppu; /* bits per pixel and used bpp */
86 unsigned int npl, nplbytes; /* # of planes and bytes per plane */
87 char name[32]; /* name of the device (from ROM) */
88 unsigned int attr; /* attributes */
89 gaddr_t fbbase, regbase;/* framebuffer and register base addr */
90 gaddr_t regions[6]; /* region bases */
91};
92
93#define GCID _IOR('G', 0, int)
94#define GCON _IO('G', 1)
95#define GCOFF _IO('G', 2)
96#define GCAON _IO('G', 3)
97#define GCAOFF _IO('G', 4)
98#define GCMAP _IOWR('G', 5, int)
99#define GCUNMAP _IOWR('G', 6, int)
100#define GCMAP_HPUX _IO('G', 5)
101#define GCUNMAP_HPUX _IO('G', 6)
102#define GCLOCK _IO('G', 7)
103#define GCUNLOCK _IO('G', 8)
104#define GCLOCK_MINIMUM _IO('G', 9)
105#define GCUNLOCK_MINIMUM _IO('G', 10)
106#define GCSTATIC_CMAP _IO('G', 11)
107#define GCVARIABLE_CMAP _IO('G', 12)
108#define GCTERM _IOWR('G',20,int) /* multi-headed Tomcat */
109#define GCDESCRIBE _IOR('G', 21, struct grf_fbinfo)
110#define GCFASTLOCK _IO('G', 26)
111
112#endif /* __ASM_PARISC_GRFIOCTL_H */
113
diff --git a/arch/parisc/include/asm/hardirq.h b/arch/parisc/include/asm/hardirq.h
new file mode 100644
index 000000000000..ce93133d5112
--- /dev/null
+++ b/arch/parisc/include/asm/hardirq.h
@@ -0,0 +1,29 @@
1/* hardirq.h: PA-RISC hard IRQ support.
2 *
3 * Copyright (C) 2001 Matthew Wilcox <matthew@wil.cx>
4 *
5 * The locking is really quite interesting. There's a cpu-local
6 * count of how many interrupts are being handled, and a global
7 * lock. An interrupt can only be serviced if the global lock
8 * is free. You can't be sure no more interrupts are being
9 * serviced until you've acquired the lock and then checked
10 * all the per-cpu interrupt counts are all zero. It's a specialised
11 * br_lock, and that's exactly how Sparc does it. We don't because
12 * it's more locking for us. This way is lock-free in the interrupt path.
13 */
14
15#ifndef _PARISC_HARDIRQ_H
16#define _PARISC_HARDIRQ_H
17
18#include <linux/threads.h>
19#include <linux/irq.h>
20
21typedef struct {
22 unsigned long __softirq_pending; /* set_bit is used on this */
23} ____cacheline_aligned irq_cpustat_t;
24
25#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
26
27void ack_bad_irq(unsigned int irq);
28
29#endif /* _PARISC_HARDIRQ_H */
diff --git a/arch/parisc/include/asm/hardware.h b/arch/parisc/include/asm/hardware.h
new file mode 100644
index 000000000000..4e9626836bab
--- /dev/null
+++ b/arch/parisc/include/asm/hardware.h
@@ -0,0 +1,127 @@
1#ifndef _PARISC_HARDWARE_H
2#define _PARISC_HARDWARE_H
3
4#include <linux/mod_devicetable.h>
5#include <asm/pdc.h>
6
7#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
8#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
9#define HVERSION_REV_ANY_ID PA_HVERSION_REV_ANY_ID
10#define SVERSION_ANY_ID PA_SVERSION_ANY_ID
11
12struct hp_hardware {
13 unsigned short hw_type:5; /* HPHW_xxx */
14 unsigned short hversion;
15 unsigned long sversion:28;
16 unsigned short opt;
17 const char name[80]; /* The hardware description */
18};
19
20struct parisc_device;
21
22enum cpu_type {
23 pcx = 0, /* pa7000 pa 1.0 */
24 pcxs = 1, /* pa7000 pa 1.1a */
25 pcxt = 2, /* pa7100 pa 1.1b */
26 pcxt_ = 3, /* pa7200 (t') pa 1.1c */
27 pcxl = 4, /* pa7100lc pa 1.1d */
28 pcxl2 = 5, /* pa7300lc pa 1.1e */
29 pcxu = 6, /* pa8000 pa 2.0 */
30 pcxu_ = 7, /* pa8200 (u+) pa 2.0 */
31 pcxw = 8, /* pa8500 pa 2.0 */
32 pcxw_ = 9, /* pa8600 (w+) pa 2.0 */
33 pcxw2 = 10, /* pa8700 pa 2.0 */
34 mako = 11, /* pa8800 pa 2.0 */
35 mako2 = 12 /* pa8900 pa 2.0 */
36};
37
38extern const char * const cpu_name_version[][2]; /* mapping from enum cpu_type to strings */
39
40struct parisc_driver;
41
42struct io_module {
43 volatile uint32_t nothing; /* reg 0 */
44 volatile uint32_t io_eim;
45 volatile uint32_t io_dc_adata;
46 volatile uint32_t io_ii_cdata;
47 volatile uint32_t io_dma_link; /* reg 4 */
48 volatile uint32_t io_dma_command;
49 volatile uint32_t io_dma_address;
50 volatile uint32_t io_dma_count;
51 volatile uint32_t io_flex; /* reg 8 */
52 volatile uint32_t io_spa_address;
53 volatile uint32_t reserved1[2];
54 volatile uint32_t io_command; /* reg 12 */
55 volatile uint32_t io_status;
56 volatile uint32_t io_control;
57 volatile uint32_t io_data;
58 volatile uint32_t reserved2; /* reg 16 */
59 volatile uint32_t chain_addr;
60 volatile uint32_t sub_mask_clr;
61 volatile uint32_t reserved3[13];
62 volatile uint32_t undefined[480];
63 volatile uint32_t unpriv[512];
64};
65
66struct bc_module {
67 volatile uint32_t unused1[12];
68 volatile uint32_t io_command;
69 volatile uint32_t io_status;
70 volatile uint32_t io_control;
71 volatile uint32_t unused2[1];
72 volatile uint32_t io_err_resp;
73 volatile uint32_t io_err_info;
74 volatile uint32_t io_err_req;
75 volatile uint32_t unused3[11];
76 volatile uint32_t io_io_low;
77 volatile uint32_t io_io_high;
78};
79
80#define HPHW_NPROC 0
81#define HPHW_MEMORY 1
82#define HPHW_B_DMA 2
83#define HPHW_OBSOLETE 3
84#define HPHW_A_DMA 4
85#define HPHW_A_DIRECT 5
86#define HPHW_OTHER 6
87#define HPHW_BCPORT 7
88#define HPHW_CIO 8
89#define HPHW_CONSOLE 9
90#define HPHW_FIO 10
91#define HPHW_BA 11
92#define HPHW_IOA 12
93#define HPHW_BRIDGE 13
94#define HPHW_FABRIC 14
95#define HPHW_MC 15
96#define HPHW_FAULTY 31
97
98
99/* hardware.c: */
100extern const char *parisc_hardware_description(struct parisc_device_id *id);
101extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
102
103struct pci_dev;
104
105/* drivers.c: */
106extern struct parisc_device *alloc_pa_dev(unsigned long hpa,
107 struct hardware_path *path);
108extern int register_parisc_device(struct parisc_device *dev);
109extern int register_parisc_driver(struct parisc_driver *driver);
110extern int count_parisc_driver(struct parisc_driver *driver);
111extern int unregister_parisc_driver(struct parisc_driver *driver);
112extern void walk_central_bus(void);
113extern const struct parisc_device *find_pa_parent_type(const struct parisc_device *, int);
114extern void print_parisc_devices(void);
115extern char *print_pa_hwpath(struct parisc_device *dev, char *path);
116extern char *print_pci_hwpath(struct pci_dev *dev, char *path);
117extern void get_pci_node_path(struct pci_dev *dev, struct hardware_path *path);
118extern void init_parisc_bus(void);
119extern struct device *hwpath_to_device(struct hardware_path *modpath);
120extern void device_to_hwpath(struct device *dev, struct hardware_path *path);
121
122
123/* inventory.c: */
124extern void do_memory_inventory(void);
125extern void do_device_inventory(void);
126
127#endif /* _PARISC_HARDWARE_H */
diff --git a/arch/parisc/include/asm/hw_irq.h b/arch/parisc/include/asm/hw_irq.h
new file mode 100644
index 000000000000..6707f7df3921
--- /dev/null
+++ b/arch/parisc/include/asm/hw_irq.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_HW_IRQ_H
2#define _ASM_HW_IRQ_H
3
4/*
5 * linux/include/asm/hw_irq.h
6 */
7
8#endif
diff --git a/arch/parisc/include/asm/ide.h b/arch/parisc/include/asm/ide.h
new file mode 100644
index 000000000000..81700a2321cf
--- /dev/null
+++ b/arch/parisc/include/asm/ide.h
@@ -0,0 +1,57 @@
1/*
2 * linux/include/asm-parisc/ide.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 */
6
7/*
8 * This file contains the PARISC architecture specific IDE code.
9 */
10
11#ifndef __ASM_PARISC_IDE_H
12#define __ASM_PARISC_IDE_H
13
14#ifdef __KERNEL__
15
16/* Generic I/O and MEMIO string operations. */
17
18#define __ide_insw insw
19#define __ide_insl insl
20#define __ide_outsw outsw
21#define __ide_outsl outsl
22
23static __inline__ void __ide_mm_insw(void __iomem *port, void *addr, u32 count)
24{
25 while (count--) {
26 *(u16 *)addr = __raw_readw(port);
27 addr += 2;
28 }
29}
30
31static __inline__ void __ide_mm_insl(void __iomem *port, void *addr, u32 count)
32{
33 while (count--) {
34 *(u32 *)addr = __raw_readl(port);
35 addr += 4;
36 }
37}
38
39static __inline__ void __ide_mm_outsw(void __iomem *port, void *addr, u32 count)
40{
41 while (count--) {
42 __raw_writew(*(u16 *)addr, port);
43 addr += 2;
44 }
45}
46
47static __inline__ void __ide_mm_outsl(void __iomem *port, void *addr, u32 count)
48{
49 while (count--) {
50 __raw_writel(*(u32 *)addr, port);
51 addr += 4;
52 }
53}
54
55#endif /* __KERNEL__ */
56
57#endif /* __ASM_PARISC_IDE_H */
diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h
new file mode 100644
index 000000000000..55ddb1842107
--- /dev/null
+++ b/arch/parisc/include/asm/io.h
@@ -0,0 +1,293 @@
1#ifndef _ASM_IO_H
2#define _ASM_IO_H
3
4#include <linux/types.h>
5#include <asm/pgtable.h>
6
7extern unsigned long parisc_vmerge_boundary;
8extern unsigned long parisc_vmerge_max_size;
9
10#define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary
11#define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size
12
13#define virt_to_phys(a) ((unsigned long)__pa(a))
14#define phys_to_virt(a) __va(a)
15#define virt_to_bus virt_to_phys
16#define bus_to_virt phys_to_virt
17
18static inline unsigned long isa_bus_to_virt(unsigned long addr) {
19 BUG();
20 return 0;
21}
22
23static inline unsigned long isa_virt_to_bus(void *addr) {
24 BUG();
25 return 0;
26}
27
28/*
29 * Memory mapped I/O
30 *
31 * readX()/writeX() do byteswapping and take an ioremapped address
32 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
33 * gsc_*() don't byteswap and operate on physical addresses;
34 * eg dev->hpa or 0xfee00000.
35 */
36
37static inline unsigned char gsc_readb(unsigned long addr)
38{
39 long flags;
40 unsigned char ret;
41
42 __asm__ __volatile__(
43 " rsm 2,%0\n"
44 " ldbx 0(%2),%1\n"
45 " mtsm %0\n"
46 : "=&r" (flags), "=r" (ret) : "r" (addr) );
47
48 return ret;
49}
50
51static inline unsigned short gsc_readw(unsigned long addr)
52{
53 long flags;
54 unsigned short ret;
55
56 __asm__ __volatile__(
57 " rsm 2,%0\n"
58 " ldhx 0(%2),%1\n"
59 " mtsm %0\n"
60 : "=&r" (flags), "=r" (ret) : "r" (addr) );
61
62 return ret;
63}
64
65static inline unsigned int gsc_readl(unsigned long addr)
66{
67 u32 ret;
68
69 __asm__ __volatile__(
70 " ldwax 0(%1),%0\n"
71 : "=r" (ret) : "r" (addr) );
72
73 return ret;
74}
75
76static inline unsigned long long gsc_readq(unsigned long addr)
77{
78 unsigned long long ret;
79
80#ifdef CONFIG_64BIT
81 __asm__ __volatile__(
82 " ldda 0(%1),%0\n"
83 : "=r" (ret) : "r" (addr) );
84#else
85 /* two reads may have side effects.. */
86 ret = ((u64) gsc_readl(addr)) << 32;
87 ret |= gsc_readl(addr+4);
88#endif
89 return ret;
90}
91
92static inline void gsc_writeb(unsigned char val, unsigned long addr)
93{
94 long flags;
95 __asm__ __volatile__(
96 " rsm 2,%0\n"
97 " stbs %1,0(%2)\n"
98 " mtsm %0\n"
99 : "=&r" (flags) : "r" (val), "r" (addr) );
100}
101
102static inline void gsc_writew(unsigned short val, unsigned long addr)
103{
104 long flags;
105 __asm__ __volatile__(
106 " rsm 2,%0\n"
107 " sths %1,0(%2)\n"
108 " mtsm %0\n"
109 : "=&r" (flags) : "r" (val), "r" (addr) );
110}
111
112static inline void gsc_writel(unsigned int val, unsigned long addr)
113{
114 __asm__ __volatile__(
115 " stwas %0,0(%1)\n"
116 : : "r" (val), "r" (addr) );
117}
118
119static inline void gsc_writeq(unsigned long long val, unsigned long addr)
120{
121#ifdef CONFIG_64BIT
122 __asm__ __volatile__(
123 " stda %0,0(%1)\n"
124 : : "r" (val), "r" (addr) );
125#else
126 /* two writes may have side effects.. */
127 gsc_writel(val >> 32, addr);
128 gsc_writel(val, addr+4);
129#endif
130}
131
132/*
133 * The standard PCI ioremap interfaces
134 */
135
136extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
137
138/* Most machines react poorly to I/O-space being cacheable... Instead let's
139 * define ioremap() in terms of ioremap_nocache().
140 */
141static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
142{
143 return __ioremap(offset, size, _PAGE_NO_CACHE);
144}
145#define ioremap_nocache(off, sz) ioremap((off), (sz))
146
147extern void iounmap(const volatile void __iomem *addr);
148
149static inline unsigned char __raw_readb(const volatile void __iomem *addr)
150{
151 return (*(volatile unsigned char __force *) (addr));
152}
153static inline unsigned short __raw_readw(const volatile void __iomem *addr)
154{
155 return *(volatile unsigned short __force *) addr;
156}
157static inline unsigned int __raw_readl(const volatile void __iomem *addr)
158{
159 return *(volatile unsigned int __force *) addr;
160}
161static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
162{
163 return *(volatile unsigned long long __force *) addr;
164}
165
166static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
167{
168 *(volatile unsigned char __force *) addr = b;
169}
170static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
171{
172 *(volatile unsigned short __force *) addr = b;
173}
174static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
175{
176 *(volatile unsigned int __force *) addr = b;
177}
178static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
179{
180 *(volatile unsigned long long __force *) addr = b;
181}
182
183/* readb can never be const, so use __fswab instead of le*_to_cpu */
184#define readb(addr) __raw_readb(addr)
185#define readw(addr) __fswab16(__raw_readw(addr))
186#define readl(addr) __fswab32(__raw_readl(addr))
187#define readq(addr) __fswab64(__raw_readq(addr))
188#define writeb(b, addr) __raw_writeb(b, addr)
189#define writew(b, addr) __raw_writew(cpu_to_le16(b), addr)
190#define writel(b, addr) __raw_writel(cpu_to_le32(b), addr)
191#define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr)
192
193#define readb_relaxed(addr) readb(addr)
194#define readw_relaxed(addr) readw(addr)
195#define readl_relaxed(addr) readl(addr)
196#define readq_relaxed(addr) readq(addr)
197
198#define mmiowb() do { } while (0)
199
200void memset_io(volatile void __iomem *addr, unsigned char val, int count);
201void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
202void memcpy_toio(volatile void __iomem *dst, const void *src, int count);
203
204/* Port-space IO */
205
206#define inb_p inb
207#define inw_p inw
208#define inl_p inl
209#define outb_p outb
210#define outw_p outw
211#define outl_p outl
212
213extern unsigned char eisa_in8(unsigned short port);
214extern unsigned short eisa_in16(unsigned short port);
215extern unsigned int eisa_in32(unsigned short port);
216extern void eisa_out8(unsigned char data, unsigned short port);
217extern void eisa_out16(unsigned short data, unsigned short port);
218extern void eisa_out32(unsigned int data, unsigned short port);
219
220#if defined(CONFIG_PCI)
221extern unsigned char inb(int addr);
222extern unsigned short inw(int addr);
223extern unsigned int inl(int addr);
224
225extern void outb(unsigned char b, int addr);
226extern void outw(unsigned short b, int addr);
227extern void outl(unsigned int b, int addr);
228#elif defined(CONFIG_EISA)
229#define inb eisa_in8
230#define inw eisa_in16
231#define inl eisa_in32
232#define outb eisa_out8
233#define outw eisa_out16
234#define outl eisa_out32
235#else
236static inline char inb(unsigned long addr)
237{
238 BUG();
239 return -1;
240}
241
242static inline short inw(unsigned long addr)
243{
244 BUG();
245 return -1;
246}
247
248static inline int inl(unsigned long addr)
249{
250 BUG();
251 return -1;
252}
253
254#define outb(x, y) BUG()
255#define outw(x, y) BUG()
256#define outl(x, y) BUG()
257#endif
258
259/*
260 * String versions of in/out ops:
261 */
262extern void insb (unsigned long port, void *dst, unsigned long count);
263extern void insw (unsigned long port, void *dst, unsigned long count);
264extern void insl (unsigned long port, void *dst, unsigned long count);
265extern void outsb (unsigned long port, const void *src, unsigned long count);
266extern void outsw (unsigned long port, const void *src, unsigned long count);
267extern void outsl (unsigned long port, const void *src, unsigned long count);
268
269
270/* IO Port space is : BBiiii where BB is HBA number. */
271#define IO_SPACE_LIMIT 0x00ffffff
272
273/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
274 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
275 * mode (essentially just sign extending. This macro takes in a 32
276 * bit I/O address (still with the leading f) and outputs the correct
277 * value for either 32 or 64 bit mode */
278#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))
279
280#include <asm-generic/iomap.h>
281
282/*
283 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
284 * access
285 */
286#define xlate_dev_mem_ptr(p) __va(p)
287
288/*
289 * Convert a virtual cached pointer to an uncached pointer
290 */
291#define xlate_dev_kmem_ptr(p) p
292
293#endif
diff --git a/arch/parisc/include/asm/ioctl.h b/arch/parisc/include/asm/ioctl.h
new file mode 100644
index 000000000000..ec8efa02beda
--- /dev/null
+++ b/arch/parisc/include/asm/ioctl.h
@@ -0,0 +1,44 @@
1/*
2 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
3 * Copyright (C) 1999,2003 Matthew Wilcox < willy at debian . org >
4 * portions from "linux/ioctl.h for Linux" by H.H. Bergman.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21
22#ifndef _ASM_PARISC_IOCTL_H
23#define _ASM_PARISC_IOCTL_H
24
25/* ioctl command encoding: 32 bits total, command in lower 16 bits,
26 * size of the parameter structure in the lower 14 bits of the
27 * upper 16 bits.
28 * Encoding the size of the parameter structure in the ioctl request
29 * is useful for catching programs compiled with old versions
30 * and to avoid overwriting user space outside the user buffer area.
31 * The highest 2 bits are reserved for indicating the ``access mode''.
32 * NOTE: This limits the max parameter size to 16kB -1 !
33 */
34
35/*
36 * Direction bits.
37 */
38#define _IOC_NONE 0U
39#define _IOC_WRITE 2U
40#define _IOC_READ 1U
41
42#include <asm-generic/ioctl.h>
43
44#endif /* _ASM_PARISC_IOCTL_H */
diff --git a/arch/parisc/include/asm/ioctls.h b/arch/parisc/include/asm/ioctls.h
new file mode 100644
index 000000000000..6747fad07a3e
--- /dev/null
+++ b/arch/parisc/include/asm/ioctls.h
@@ -0,0 +1,90 @@
1#ifndef __ARCH_PARISC_IOCTLS_H__
2#define __ARCH_PARISC_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS _IOR('T', 16, struct termios) /* TCGETATTR */
9#define TCSETS _IOW('T', 17, struct termios) /* TCSETATTR */
10#define TCSETSW _IOW('T', 18, struct termios) /* TCSETATTRD */
11#define TCSETSF _IOW('T', 19, struct termios) /* TCSETATTRF */
12#define TCGETA _IOR('T', 1, struct termio)
13#define TCSETA _IOW('T', 2, struct termio)
14#define TCSETAW _IOW('T', 3, struct termio)
15#define TCSETAF _IOW('T', 4, struct termio)
16#define TCSBRK _IO('T', 5)
17#define TCXONC _IO('T', 6)
18#define TCFLSH _IO('T', 7)
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP _IOR('T', 30, int)
23#define TIOCSPGRP _IOW('T', 29, int)
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID _IOR('T', 20, int) /* Return the session ID of FD */
49#define TCGETS2 _IOR('T',0x2A, struct termios2)
50#define TCSETS2 _IOW('T',0x2B, struct termios2)
51#define TCSETSW2 _IOW('T',0x2C, struct termios2)
52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
55
56#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
57#define FIOCLEX 0x5451
58#define FIOASYNC 0x5452
59#define TIOCSERCONFIG 0x5453
60#define TIOCSERGWILD 0x5454
61#define TIOCSERSWILD 0x5455
62#define TIOCGLCKTRMIOS 0x5456
63#define TIOCSLCKTRMIOS 0x5457
64#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
65#define TIOCSERGETLSR 0x5459 /* Get line status register */
66#define TIOCSERGETMULTI 0x545A /* Get multiport config */
67#define TIOCSERSETMULTI 0x545B /* Set multiport config */
68
69#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
70#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
71#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */
72#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */
73#define FIOQSIZE 0x5460 /* Get exact space used by quota */
74
75#define TIOCSTART 0x5461
76#define TIOCSTOP 0x5462
77#define TIOCSLTC 0x5462
78
79/* Used for packet mode */
80#define TIOCPKT_DATA 0
81#define TIOCPKT_FLUSHREAD 1
82#define TIOCPKT_FLUSHWRITE 2
83#define TIOCPKT_STOP 4
84#define TIOCPKT_START 8
85#define TIOCPKT_NOSTOP 16
86#define TIOCPKT_DOSTOP 32
87
88#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
89
90#endif /* _ASM_PARISC_IOCTLS_H */
diff --git a/arch/parisc/include/asm/ipcbuf.h b/arch/parisc/include/asm/ipcbuf.h
new file mode 100644
index 000000000000..bd956c425785
--- /dev/null
+++ b/arch/parisc/include/asm/ipcbuf.h
@@ -0,0 +1,27 @@
1#ifndef __PARISC_IPCBUF_H__
2#define __PARISC_IPCBUF_H__
3
4/*
5 * The ipc64_perm structure for PA-RISC is almost identical to
6 * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the kernel.
7 * 'seq' has been changed from long to int so that it's the same size
8 * on 64-bit kernels as on 32-bit ones.
9 */
10
11struct ipc64_perm
12{
13 key_t key;
14 uid_t uid;
15 gid_t gid;
16 uid_t cuid;
17 gid_t cgid;
18 unsigned short int __pad1;
19 mode_t mode;
20 unsigned short int __pad2;
21 unsigned short int seq;
22 unsigned int __pad3;
23 unsigned long long int __unused1;
24 unsigned long long int __unused2;
25};
26
27#endif /* __PARISC_IPCBUF_H__ */
diff --git a/arch/parisc/include/asm/irq.h b/arch/parisc/include/asm/irq.h
new file mode 100644
index 000000000000..399c81981ed5
--- /dev/null
+++ b/arch/parisc/include/asm/irq.h
@@ -0,0 +1,57 @@
1/*
2 * include/asm-parisc/irq.h
3 *
4 * Copyright 2005 Matthew Wilcox <matthew@wil.cx>
5 */
6
7#ifndef _ASM_PARISC_IRQ_H
8#define _ASM_PARISC_IRQ_H
9
10#include <linux/cpumask.h>
11#include <asm/types.h>
12
13#define NO_IRQ (-1)
14
15#ifdef CONFIG_GSC
16#define GSC_IRQ_BASE 16
17#define GSC_IRQ_MAX 63
18#define CPU_IRQ_BASE 64
19#else
20#define CPU_IRQ_BASE 16
21#endif
22
23#define TIMER_IRQ (CPU_IRQ_BASE + 0)
24#define IPI_IRQ (CPU_IRQ_BASE + 1)
25#define CPU_IRQ_MAX (CPU_IRQ_BASE + (BITS_PER_LONG - 1))
26
27#define NR_IRQS (CPU_IRQ_MAX + 1)
28
29static __inline__ int irq_canonicalize(int irq)
30{
31 return (irq == 2) ? 9 : irq;
32}
33
34struct irq_chip;
35
36/*
37 * Some useful "we don't have to do anything here" handlers. Should
38 * probably be provided by the generic code.
39 */
40void no_ack_irq(unsigned int irq);
41void no_end_irq(unsigned int irq);
42void cpu_ack_irq(unsigned int irq);
43void cpu_end_irq(unsigned int irq);
44
45extern int txn_alloc_irq(unsigned int nbits);
46extern int txn_claim_irq(int);
47extern unsigned int txn_alloc_data(unsigned int);
48extern unsigned long txn_alloc_addr(unsigned int);
49extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
50
51extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
52extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
53
54/* soft power switch support (power.c) */
55extern struct tasklet_struct power_tasklet;
56
57#endif /* _ASM_PARISC_IRQ_H */
diff --git a/arch/parisc/include/asm/irq_regs.h b/arch/parisc/include/asm/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/arch/parisc/include/asm/irq_regs.h
@@ -0,0 +1 @@
#include <asm-generic/irq_regs.h>
diff --git a/arch/parisc/include/asm/kdebug.h b/arch/parisc/include/asm/kdebug.h
new file mode 100644
index 000000000000..6ece1b037665
--- /dev/null
+++ b/arch/parisc/include/asm/kdebug.h
@@ -0,0 +1 @@
#include <asm-generic/kdebug.h>
diff --git a/arch/parisc/include/asm/kmap_types.h b/arch/parisc/include/asm/kmap_types.h
new file mode 100644
index 000000000000..806aae3c5338
--- /dev/null
+++ b/arch/parisc/include/asm/kmap_types.h
@@ -0,0 +1,30 @@
1#ifndef _ASM_KMAP_TYPES_H
2#define _ASM_KMAP_TYPES_H
3
4
5#ifdef CONFIG_DEBUG_HIGHMEM
6# define D(n) __KM_FENCE_##n ,
7#else
8# define D(n)
9#endif
10
11enum km_type {
12D(0) KM_BOUNCE_READ,
13D(1) KM_SKB_SUNRPC_DATA,
14D(2) KM_SKB_DATA_SOFTIRQ,
15D(3) KM_USER0,
16D(4) KM_USER1,
17D(5) KM_BIO_SRC_IRQ,
18D(6) KM_BIO_DST_IRQ,
19D(7) KM_PTE0,
20D(8) KM_PTE1,
21D(9) KM_IRQ0,
22D(10) KM_IRQ1,
23D(11) KM_SOFTIRQ0,
24D(12) KM_SOFTIRQ1,
25D(13) KM_TYPE_NR
26};
27
28#undef D
29
30#endif
diff --git a/arch/parisc/include/asm/led.h b/arch/parisc/include/asm/led.h
new file mode 100644
index 000000000000..c3405ab9d60a
--- /dev/null
+++ b/arch/parisc/include/asm/led.h
@@ -0,0 +1,42 @@
1#ifndef LED_H
2#define LED_H
3
4#define LED7 0x80 /* top (or furthest right) LED */
5#define LED6 0x40
6#define LED5 0x20
7#define LED4 0x10
8#define LED3 0x08
9#define LED2 0x04
10#define LED1 0x02
11#define LED0 0x01 /* bottom (or furthest left) LED */
12
13#define LED_LAN_TX LED0 /* for LAN transmit activity */
14#define LED_LAN_RCV LED1 /* for LAN receive activity */
15#define LED_DISK_IO LED2 /* for disk activity */
16#define LED_HEARTBEAT LED3 /* heartbeat */
17
18/* values for pdc_chassis_lcd_info_ret_block.model: */
19#define DISPLAY_MODEL_LCD 0 /* KittyHawk LED or LCD */
20#define DISPLAY_MODEL_NONE 1 /* no LED or LCD */
21#define DISPLAY_MODEL_LASI 2 /* LASI style 8 bit LED */
22#define DISPLAY_MODEL_OLD_ASP 0x7F /* faked: ASP style 8 x 1 bit LED (only very old ASP versions) */
23
24#define LED_CMD_REG_NONE 0 /* NULL == no addr for the cmd register */
25
26/* register_led_driver() */
27int __init register_led_driver(int model, unsigned long cmd_reg, unsigned long data_reg);
28
29/* registers the LED regions for procfs */
30void __init register_led_regions(void);
31
32#ifdef CONFIG_CHASSIS_LCD_LED
33/* writes a string to the LCD display (if possible on this h/w) */
34int lcd_print(const char *str);
35#else
36#define lcd_print(str)
37#endif
38
39/* main LED initialization function (uses PDC) */
40int __init led_init(void);
41
42#endif /* LED_H */
diff --git a/arch/parisc/include/asm/linkage.h b/arch/parisc/include/asm/linkage.h
new file mode 100644
index 000000000000..0b19a7242d0c
--- /dev/null
+++ b/arch/parisc/include/asm/linkage.h
@@ -0,0 +1,31 @@
1#ifndef __ASM_PARISC_LINKAGE_H
2#define __ASM_PARISC_LINKAGE_H
3
4#ifndef __ALIGN
5#define __ALIGN .align 4
6#define __ALIGN_STR ".align 4"
7#endif
8
9/*
10 * In parisc assembly a semicolon marks a comment while a
11 * exclamation mark is used to separate independent lines.
12 */
13#ifdef __ASSEMBLY__
14
15#define ENTRY(name) \
16 .export name !\
17 ALIGN !\
18name:
19
20#ifdef CONFIG_64BIT
21#define ENDPROC(name) \
22 END(name)
23#else
24#define ENDPROC(name) \
25 .type name, @function !\
26 END(name)
27#endif
28
29#endif /* __ASSEMBLY__ */
30
31#endif /* __ASM_PARISC_LINKAGE_H */
diff --git a/arch/parisc/include/asm/local.h b/arch/parisc/include/asm/local.h
new file mode 100644
index 000000000000..c11c530f74d0
--- /dev/null
+++ b/arch/parisc/include/asm/local.h
@@ -0,0 +1 @@
#include <asm-generic/local.h>
diff --git a/arch/parisc/include/asm/machdep.h b/arch/parisc/include/asm/machdep.h
new file mode 100644
index 000000000000..a231c97d703e
--- /dev/null
+++ b/arch/parisc/include/asm/machdep.h
@@ -0,0 +1,16 @@
1#ifndef _PARISC_MACHDEP_H
2#define _PARISC_MACHDEP_H
3
4#include <linux/notifier.h>
5
6#define MACH_RESTART 1
7#define MACH_HALT 2
8#define MACH_POWER_ON 3
9#define MACH_POWER_OFF 4
10
11extern struct notifier_block *mach_notifier;
12extern void pa7300lc_init(void);
13
14extern void (*cpu_lpmc)(int, struct pt_regs *);
15
16#endif
diff --git a/arch/parisc/include/asm/mc146818rtc.h b/arch/parisc/include/asm/mc146818rtc.h
new file mode 100644
index 000000000000..adf41631449f
--- /dev/null
+++ b/arch/parisc/include/asm/mc146818rtc.h
@@ -0,0 +1,9 @@
1/*
2 * Machine dependent access functions for RTC registers.
3 */
4#ifndef _ASM_MC146818RTC_H
5#define _ASM_MC146818RTC_H
6
7/* empty include file to satisfy the include in genrtc.c */
8
9#endif /* _ASM_MC146818RTC_H */
diff --git a/arch/parisc/include/asm/mckinley.h b/arch/parisc/include/asm/mckinley.h
new file mode 100644
index 000000000000..d1ea6f12915e
--- /dev/null
+++ b/arch/parisc/include/asm/mckinley.h
@@ -0,0 +1,9 @@
1#ifndef ASM_PARISC_MCKINLEY_H
2#define ASM_PARISC_MCKINLEY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_mckinley_root;
7
8#endif /*__KERNEL__*/
9#endif /*ASM_PARISC_MCKINLEY_H*/
diff --git a/arch/parisc/include/asm/mman.h b/arch/parisc/include/asm/mman.h
new file mode 100644
index 000000000000..defe752cc996
--- /dev/null
+++ b/arch/parisc/include/asm/mman.h
@@ -0,0 +1,61 @@
1#ifndef __PARISC_MMAN_H__
2#define __PARISC_MMAN_H__
3
4#define PROT_READ 0x1 /* page can be read */
5#define PROT_WRITE 0x2 /* page can be written */
6#define PROT_EXEC 0x4 /* page can be executed */
7#define PROT_SEM 0x8 /* page may be used for atomic ops */
8#define PROT_NONE 0x0 /* page can not be accessed */
9#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
10#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
11
12#define MAP_SHARED 0x01 /* Share changes */
13#define MAP_PRIVATE 0x02 /* Changes are private */
14#define MAP_TYPE 0x03 /* Mask for type of mapping */
15#define MAP_FIXED 0x04 /* Interpret addr exactly */
16#define MAP_ANONYMOUS 0x10 /* don't use a file */
17
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22#define MAP_GROWSDOWN 0x8000 /* stack-like segment */
23#define MAP_POPULATE 0x10000 /* populate (prefault) pagetables */
24#define MAP_NONBLOCK 0x20000 /* do not block on IO */
25
26#define MS_SYNC 1 /* synchronous memory sync */
27#define MS_ASYNC 2 /* sync memory asynchronously */
28#define MS_INVALIDATE 4 /* invalidate the caches */
29
30#define MCL_CURRENT 1 /* lock all current mappings */
31#define MCL_FUTURE 2 /* lock all future mappings */
32
33#define MADV_NORMAL 0 /* no further special treatment */
34#define MADV_RANDOM 1 /* expect random page references */
35#define MADV_SEQUENTIAL 2 /* expect sequential page references */
36#define MADV_WILLNEED 3 /* will need these pages */
37#define MADV_DONTNEED 4 /* don't need these pages */
38#define MADV_SPACEAVAIL 5 /* insure that resources are reserved */
39#define MADV_VPS_PURGE 6 /* Purge pages from VM page cache */
40#define MADV_VPS_INHERIT 7 /* Inherit parents page size */
41
42/* common/generic parameters */
43#define MADV_REMOVE 9 /* remove these pages & resources */
44#define MADV_DONTFORK 10 /* don't inherit across fork */
45#define MADV_DOFORK 11 /* do inherit across fork */
46
47/* The range 12-64 is reserved for page size specification. */
48#define MADV_4K_PAGES 12 /* Use 4K pages */
49#define MADV_16K_PAGES 14 /* Use 16K pages */
50#define MADV_64K_PAGES 16 /* Use 64K pages */
51#define MADV_256K_PAGES 18 /* Use 256K pages */
52#define MADV_1M_PAGES 20 /* Use 1 Megabyte pages */
53#define MADV_4M_PAGES 22 /* Use 4 Megabyte pages */
54#define MADV_16M_PAGES 24 /* Use 16 Megabyte pages */
55#define MADV_64M_PAGES 26 /* Use 64 Megabyte pages */
56
57/* compatibility flags */
58#define MAP_FILE 0
59#define MAP_VARIABLE 0
60
61#endif /* __PARISC_MMAN_H__ */
diff --git a/arch/parisc/include/asm/mmu.h b/arch/parisc/include/asm/mmu.h
new file mode 100644
index 000000000000..6a310cf8b734
--- /dev/null
+++ b/arch/parisc/include/asm/mmu.h
@@ -0,0 +1,7 @@
1#ifndef _PARISC_MMU_H_
2#define _PARISC_MMU_H_
3
4/* On parisc, we store the space id here */
5typedef unsigned long mm_context_t;
6
7#endif /* _PARISC_MMU_H_ */
diff --git a/arch/parisc/include/asm/mmu_context.h b/arch/parisc/include/asm/mmu_context.h
new file mode 100644
index 000000000000..85856c74ad1d
--- /dev/null
+++ b/arch/parisc/include/asm/mmu_context.h
@@ -0,0 +1,75 @@
1#ifndef __PARISC_MMU_CONTEXT_H
2#define __PARISC_MMU_CONTEXT_H
3
4#include <linux/mm.h>
5#include <linux/sched.h>
6#include <asm/atomic.h>
7#include <asm/pgalloc.h>
8#include <asm/pgtable.h>
9#include <asm-generic/mm_hooks.h>
10
11static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
12{
13}
14
15/* on PA-RISC, we actually have enough contexts to justify an allocator
16 * for them. prumpf */
17
18extern unsigned long alloc_sid(void);
19extern void free_sid(unsigned long);
20
21static inline int
22init_new_context(struct task_struct *tsk, struct mm_struct *mm)
23{
24 BUG_ON(atomic_read(&mm->mm_users) != 1);
25
26 mm->context = alloc_sid();
27 return 0;
28}
29
30static inline void
31destroy_context(struct mm_struct *mm)
32{
33 free_sid(mm->context);
34 mm->context = 0;
35}
36
37static inline void load_context(mm_context_t context)
38{
39 mtsp(context, 3);
40#if SPACEID_SHIFT == 0
41 mtctl(context << 1,8);
42#else
43 mtctl(context >> (SPACEID_SHIFT - 1),8);
44#endif
45}
46
47static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
48{
49
50 if (prev != next) {
51 mtctl(__pa(next->pgd), 25);
52 load_context(next->context);
53 }
54}
55
56#define deactivate_mm(tsk,mm) do { } while (0)
57
58static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
59{
60 /*
61 * Activate_mm is our one chance to allocate a space id
62 * for a new mm created in the exec path. There's also
63 * some lazy tlb stuff, which is currently dead code, but
64 * we only allocate a space id if one hasn't been allocated
65 * already, so we should be OK.
66 */
67
68 BUG_ON(next == &init_mm); /* Should never happen */
69
70 if (next->context == 0)
71 next->context = alloc_sid();
72
73 switch_mm(prev,next,current);
74}
75#endif
diff --git a/arch/parisc/include/asm/mmzone.h b/arch/parisc/include/asm/mmzone.h
new file mode 100644
index 000000000000..9608d2cf214a
--- /dev/null
+++ b/arch/parisc/include/asm/mmzone.h
@@ -0,0 +1,73 @@
1#ifndef _PARISC_MMZONE_H
2#define _PARISC_MMZONE_H
3
4#ifdef CONFIG_DISCONTIGMEM
5
6#define MAX_PHYSMEM_RANGES 8 /* Fix the size for now (current known max is 3) */
7extern int npmem_ranges;
8
9struct node_map_data {
10 pg_data_t pg_data;
11};
12
13extern struct node_map_data node_data[];
14
15#define NODE_DATA(nid) (&node_data[nid].pg_data)
16
17#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn)
18#define node_end_pfn(nid) \
19({ \
20 pg_data_t *__pgdat = NODE_DATA(nid); \
21 __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \
22})
23
24/* We have these possible memory map layouts:
25 * Astro: 0-3.75, 67.75-68, 4-64
26 * zx1: 0-1, 257-260, 4-256
27 * Stretch (N-class): 0-2, 4-32, 34-xxx
28 */
29
30/* Since each 1GB can only belong to one region (node), we can create
31 * an index table for pfn to nid lookup; each entry in pfnnid_map
32 * represents 1GB, and contains the node that the memory belongs to. */
33
34#define PFNNID_SHIFT (30 - PAGE_SHIFT)
35#define PFNNID_MAP_MAX 512 /* support 512GB */
36extern unsigned char pfnnid_map[PFNNID_MAP_MAX];
37
38#ifndef CONFIG_64BIT
39#define pfn_is_io(pfn) ((pfn & (0xf0000000UL >> PAGE_SHIFT)) == (0xf0000000UL >> PAGE_SHIFT))
40#else
41/* io can be 0xf0f0f0f0f0xxxxxx or 0xfffffffff0000000 */
42#define pfn_is_io(pfn) ((pfn & (0xf000000000000000UL >> PAGE_SHIFT)) == (0xf000000000000000UL >> PAGE_SHIFT))
43#endif
44
45static inline int pfn_to_nid(unsigned long pfn)
46{
47 unsigned int i;
48 unsigned char r;
49
50 if (unlikely(pfn_is_io(pfn)))
51 return 0;
52
53 i = pfn >> PFNNID_SHIFT;
54 BUG_ON(i >= sizeof(pfnnid_map) / sizeof(pfnnid_map[0]));
55 r = pfnnid_map[i];
56 BUG_ON(r == 0xff);
57
58 return (int)r;
59}
60
61static inline int pfn_valid(int pfn)
62{
63 int nid = pfn_to_nid(pfn);
64
65 if (nid >= 0)
66 return (pfn < node_end_pfn(nid));
67 return 0;
68}
69
70#else /* !CONFIG_DISCONTIGMEM */
71#define MAX_PHYSMEM_RANGES 1
72#endif
73#endif /* _PARISC_MMZONE_H */
diff --git a/arch/parisc/include/asm/module.h b/arch/parisc/include/asm/module.h
new file mode 100644
index 000000000000..c2cb49e934c1
--- /dev/null
+++ b/arch/parisc/include/asm/module.h
@@ -0,0 +1,32 @@
1#ifndef _ASM_PARISC_MODULE_H
2#define _ASM_PARISC_MODULE_H
3/*
4 * This file contains the parisc architecture specific module code.
5 */
6#ifdef CONFIG_64BIT
7#define Elf_Shdr Elf64_Shdr
8#define Elf_Sym Elf64_Sym
9#define Elf_Ehdr Elf64_Ehdr
10#define Elf_Addr Elf64_Addr
11#define Elf_Rela Elf64_Rela
12#else
13#define Elf_Shdr Elf32_Shdr
14#define Elf_Sym Elf32_Sym
15#define Elf_Ehdr Elf32_Ehdr
16#define Elf_Addr Elf32_Addr
17#define Elf_Rela Elf32_Rela
18#endif
19
20struct unwind_table;
21
22struct mod_arch_specific
23{
24 unsigned long got_offset, got_count, got_max;
25 unsigned long fdesc_offset, fdesc_count, fdesc_max;
26 unsigned long stub_offset, stub_count, stub_max;
27 unsigned long init_stub_offset, init_stub_count, init_stub_max;
28 int unwind_section;
29 struct unwind_table *unwind;
30};
31
32#endif /* _ASM_PARISC_MODULE_H */
diff --git a/arch/parisc/include/asm/msgbuf.h b/arch/parisc/include/asm/msgbuf.h
new file mode 100644
index 000000000000..fe88f2649418
--- /dev/null
+++ b/arch/parisc/include/asm/msgbuf.h
@@ -0,0 +1,37 @@
1#ifndef _PARISC_MSGBUF_H
2#define _PARISC_MSGBUF_H
3
4/*
5 * The msqid64_ds structure for parisc architecture, copied from sparc.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t msg_stime; /* last msgsnd time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t msg_rtime; /* last msgrcv time */
24#ifndef CONFIG_64BIT
25 unsigned int __pad3;
26#endif
27 __kernel_time_t msg_ctime; /* last change time */
28 unsigned int msg_cbytes; /* current number of bytes on queue */
29 unsigned int msg_qnum; /* number of messages in queue */
30 unsigned int msg_qbytes; /* max number of bytes on queue */
31 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
32 __kernel_pid_t msg_lrpid; /* last receive pid */
33 unsigned int __unused1;
34 unsigned int __unused2;
35};
36
37#endif /* _PARISC_MSGBUF_H */
diff --git a/arch/parisc/include/asm/mutex.h b/arch/parisc/include/asm/mutex.h
new file mode 100644
index 000000000000..458c1f7fbc18
--- /dev/null
+++ b/arch/parisc/include/asm/mutex.h
@@ -0,0 +1,9 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/parisc/include/asm/page.h b/arch/parisc/include/asm/page.h
new file mode 100644
index 000000000000..c3941f09a878
--- /dev/null
+++ b/arch/parisc/include/asm/page.h
@@ -0,0 +1,173 @@
1#ifndef _PARISC_PAGE_H
2#define _PARISC_PAGE_H
3
4#include <linux/const.h>
5
6#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
7# define PAGE_SHIFT 12
8#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
9# define PAGE_SHIFT 14
10#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
11# define PAGE_SHIFT 16
12#else
13# error "unknown default kernel page size"
14#endif
15#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
16#define PAGE_MASK (~(PAGE_SIZE-1))
17
18
19#ifndef __ASSEMBLY__
20
21#include <asm/types.h>
22#include <asm/cache.h>
23
24#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
25#define copy_page(to,from) copy_user_page_asm((void *)(to), (void *)(from))
26
27struct page;
28
29void copy_user_page_asm(void *to, void *from);
30void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
31 struct page *pg);
32void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
33
34/*
35 * These are used to make use of C type-checking..
36 */
37#define STRICT_MM_TYPECHECKS
38#ifdef STRICT_MM_TYPECHECKS
39typedef struct { unsigned long pte;
40#if !defined(CONFIG_64BIT)
41 unsigned long future_flags;
42 /* XXX: it's possible to remove future_flags and change BITS_PER_PTE_ENTRY
43 to 2, but then strangely the identical 32bit kernel boots on a
44 c3000(pa20), but not any longer on a 715(pa11).
45 Still investigating... HelgeD.
46 */
47#endif
48} pte_t; /* either 32 or 64bit */
49
50/* NOTE: even on 64 bits, these entries are __u32 because we allocate
51 * the pmd and pgd in ZONE_DMA (i.e. under 4GB) */
52typedef struct { __u32 pmd; } pmd_t;
53typedef struct { __u32 pgd; } pgd_t;
54typedef struct { unsigned long pgprot; } pgprot_t;
55
56#define pte_val(x) ((x).pte)
57/* These do not work lvalues, so make sure we don't use them as such. */
58#define pmd_val(x) ((x).pmd + 0)
59#define pgd_val(x) ((x).pgd + 0)
60#define pgprot_val(x) ((x).pgprot)
61
62#define __pte(x) ((pte_t) { (x) } )
63#define __pmd(x) ((pmd_t) { (x) } )
64#define __pgd(x) ((pgd_t) { (x) } )
65#define __pgprot(x) ((pgprot_t) { (x) } )
66
67#define __pmd_val_set(x,n) (x).pmd = (n)
68#define __pgd_val_set(x,n) (x).pgd = (n)
69
70#else
71/*
72 * .. while these make it easier on the compiler
73 */
74typedef unsigned long pte_t;
75typedef __u32 pmd_t;
76typedef __u32 pgd_t;
77typedef unsigned long pgprot_t;
78
79#define pte_val(x) (x)
80#define pmd_val(x) (x)
81#define pgd_val(x) (x)
82#define pgprot_val(x) (x)
83
84#define __pte(x) (x)
85#define __pmd(x) (x)
86#define __pgd(x) (x)
87#define __pgprot(x) (x)
88
89#define __pmd_val_set(x,n) (x) = (n)
90#define __pgd_val_set(x,n) (x) = (n)
91
92#endif /* STRICT_MM_TYPECHECKS */
93
94typedef struct page *pgtable_t;
95
96typedef struct __physmem_range {
97 unsigned long start_pfn;
98 unsigned long pages; /* PAGE_SIZE pages */
99} physmem_range_t;
100
101extern physmem_range_t pmem_ranges[];
102extern int npmem_ranges;
103
104#endif /* !__ASSEMBLY__ */
105
106/* WARNING: The definitions below must match exactly to sizeof(pte_t)
107 * etc
108 */
109#ifdef CONFIG_64BIT
110#define BITS_PER_PTE_ENTRY 3
111#define BITS_PER_PMD_ENTRY 2
112#define BITS_PER_PGD_ENTRY 2
113#else
114#define BITS_PER_PTE_ENTRY 3
115#define BITS_PER_PMD_ENTRY 2
116#define BITS_PER_PGD_ENTRY BITS_PER_PMD_ENTRY
117#endif
118#define PGD_ENTRY_SIZE (1UL << BITS_PER_PGD_ENTRY)
119#define PMD_ENTRY_SIZE (1UL << BITS_PER_PMD_ENTRY)
120#define PTE_ENTRY_SIZE (1UL << BITS_PER_PTE_ENTRY)
121
122#define LINUX_GATEWAY_SPACE 0
123
124/* This governs the relationship between virtual and physical addresses.
125 * If you alter it, make sure to take care of our various fixed mapping
126 * segments in fixmap.h */
127#ifdef CONFIG_64BIT
128#define __PAGE_OFFSET (0x40000000) /* 1GB */
129#else
130#define __PAGE_OFFSET (0x10000000) /* 256MB */
131#endif
132
133#define PAGE_OFFSET ((unsigned long)__PAGE_OFFSET)
134
135/* The size of the gateway page (we leave lots of room for expansion) */
136#define GATEWAY_PAGE_SIZE 0x4000
137
138/* The start of the actual kernel binary---used in vmlinux.lds.S
139 * Leave some space after __PAGE_OFFSET for detecting kernel null
140 * ptr derefs */
141#define KERNEL_BINARY_TEXT_START (__PAGE_OFFSET + 0x100000)
142
143/* These macros don't work for 64-bit C code -- don't allow in C at all */
144#ifdef __ASSEMBLY__
145# define PA(x) ((x)-__PAGE_OFFSET)
146# define VA(x) ((x)+__PAGE_OFFSET)
147#endif
148#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
149#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
150
151#ifndef CONFIG_DISCONTIGMEM
152#define pfn_valid(pfn) ((pfn) < max_mapnr)
153#endif /* CONFIG_DISCONTIGMEM */
154
155#ifdef CONFIG_HUGETLB_PAGE
156#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */
157#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
158#define HPAGE_MASK (~(HPAGE_SIZE - 1))
159#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
160#endif
161
162#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
163
164#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
165#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
166
167#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
168 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
169
170#include <asm-generic/memory_model.h>
171#include <asm-generic/page.h>
172
173#endif /* _PARISC_PAGE_H */
diff --git a/arch/parisc/include/asm/param.h b/arch/parisc/include/asm/param.h
new file mode 100644
index 000000000000..32e03d877858
--- /dev/null
+++ b/arch/parisc/include/asm/param.h
@@ -0,0 +1,22 @@
1#ifndef _ASMPARISC_PARAM_H
2#define _ASMPARISC_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ
6#define USER_HZ 100 /* some user API use "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* like times() */
8#endif
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif
diff --git a/arch/parisc/include/asm/parisc-device.h b/arch/parisc/include/asm/parisc-device.h
new file mode 100644
index 000000000000..7aa13f2add7a
--- /dev/null
+++ b/arch/parisc/include/asm/parisc-device.h
@@ -0,0 +1,64 @@
1#ifndef _ASM_PARISC_PARISC_DEVICE_H_
2#define _ASM_PARISC_PARISC_DEVICE_H_
3
4#include <linux/device.h>
5
6struct parisc_device {
7 struct resource hpa; /* Hard Physical Address */
8 struct parisc_device_id id;
9 struct parisc_driver *driver; /* Driver for this device */
10 char name[80]; /* The hardware description */
11 int irq;
12 int aux_irq; /* Some devices have a second IRQ */
13
14 char hw_path; /* The module number on this bus */
15 unsigned int num_addrs; /* some devices have additional address ranges. */
16 unsigned long *addr; /* which will be stored here */
17
18#ifdef CONFIG_64BIT
19 /* parms for pdc_pat_cell_module() call */
20 unsigned long pcell_loc; /* Physical Cell location */
21 unsigned long mod_index; /* PAT specific - Misc Module info */
22
23 /* generic info returned from pdc_pat_cell_module() */
24 unsigned long mod_info; /* PAT specific - Misc Module info */
25 unsigned long pmod_loc; /* physical Module location */
26#endif
27 u64 dma_mask; /* DMA mask for I/O */
28 struct device dev;
29};
30
31struct parisc_driver {
32 struct parisc_driver *next;
33 char *name;
34 const struct parisc_device_id *id_table;
35 int (*probe) (struct parisc_device *dev); /* New device discovered */
36 int (*remove) (struct parisc_device *dev);
37 struct device_driver drv;
38};
39
40
41#define to_parisc_device(d) container_of(d, struct parisc_device, dev)
42#define to_parisc_driver(d) container_of(d, struct parisc_driver, drv)
43#define parisc_parent(d) to_parisc_device(d->dev.parent)
44
45static inline char *parisc_pathname(struct parisc_device *d)
46{
47 return d->dev.bus_id;
48}
49
50static inline void
51parisc_set_drvdata(struct parisc_device *d, void *p)
52{
53 dev_set_drvdata(&d->dev, p);
54}
55
56static inline void *
57parisc_get_drvdata(struct parisc_device *d)
58{
59 return dev_get_drvdata(&d->dev);
60}
61
62extern struct bus_type parisc_bus_type;
63
64#endif /*_ASM_PARISC_PARISC_DEVICE_H_*/
diff --git a/arch/parisc/include/asm/parport.h b/arch/parisc/include/asm/parport.h
new file mode 100644
index 000000000000..00d9cc3e7b97
--- /dev/null
+++ b/arch/parisc/include/asm/parport.h
@@ -0,0 +1,18 @@
1/*
2 *
3 * parport.h: ia32-compatible parport initialisation
4 *
5 * This file should only be included by drivers/parport/parport_pc.c.
6 */
7#ifndef _ASM_PARPORT_H
8#define _ASM_PARPORT_H 1
9
10
11static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
12{
13 /* nothing ! */
14 return 0;
15}
16
17
18#endif /* !(_ASM_PARPORT_H) */
diff --git a/arch/parisc/include/asm/pci.h b/arch/parisc/include/asm/pci.h
new file mode 100644
index 000000000000..4ba868f44a5e
--- /dev/null
+++ b/arch/parisc/include/asm/pci.h
@@ -0,0 +1,294 @@
1#ifndef __ASM_PARISC_PCI_H
2#define __ASM_PARISC_PCI_H
3
4#include <asm/scatterlist.h>
5
6
7
8/*
9** HP PCI platforms generally support multiple bus adapters.
10** (workstations 1-~4, servers 2-~32)
11**
12** Newer platforms number the busses across PCI bus adapters *sparsely*.
13** E.g. 0, 8, 16, ...
14**
15** Under a PCI bus, most HP platforms support PPBs up to two or three
16** levels deep. See "Bit3" product line.
17*/
18#define PCI_MAX_BUSSES 256
19
20
21/* To be used as: mdelay(pci_post_reset_delay);
22 *
23 * post_reset is the time the kernel should stall to prevent anyone from
24 * accessing the PCI bus once #RESET is de-asserted.
25 * PCI spec somewhere says 1 second but with multi-PCI bus systems,
26 * this makes the boot time much longer than necessary.
27 * 20ms seems to work for all the HP PCI implementations to date.
28 */
29#define pci_post_reset_delay 50
30
31
32/*
33** pci_hba_data (aka H2P_OBJECT in HP/UX)
34**
35** This is the "common" or "base" data structure which HBA drivers
36** (eg Dino or LBA) are required to place at the top of their own
37** platform_data structure. I've heard this called "C inheritance" too.
38**
39** Data needed by pcibios layer belongs here.
40*/
41struct pci_hba_data {
42 void __iomem *base_addr; /* aka Host Physical Address */
43 const struct parisc_device *dev; /* device from PA bus walk */
44 struct pci_bus *hba_bus; /* primary PCI bus below HBA */
45 int hba_num; /* I/O port space access "key" */
46 struct resource bus_num; /* PCI bus numbers */
47 struct resource io_space; /* PIOP */
48 struct resource lmmio_space; /* bus addresses < 4Gb */
49 struct resource elmmio_space; /* additional bus addresses < 4Gb */
50 struct resource gmmio_space; /* bus addresses > 4Gb */
51
52 /* NOTE: Dino code assumes it can use *all* of the lmmio_space,
53 * elmmio_space and gmmio_space as a contiguous array of
54 * resources. This #define represents the array size */
55 #define DINO_MAX_LMMIO_RESOURCES 3
56
57 unsigned long lmmio_space_offset; /* CPU view - PCI view */
58 void * iommu; /* IOMMU this device is under */
59 /* REVISIT - spinlock to protect resources? */
60
61 #define HBA_NAME_SIZE 16
62 char io_name[HBA_NAME_SIZE];
63 char lmmio_name[HBA_NAME_SIZE];
64 char elmmio_name[HBA_NAME_SIZE];
65 char gmmio_name[HBA_NAME_SIZE];
66};
67
68#define HBA_DATA(d) ((struct pci_hba_data *) (d))
69
70/*
71** We support 2^16 I/O ports per HBA. These are set up in the form
72** 0xbbxxxx, where bb is the bus number and xxxx is the I/O port
73** space address.
74*/
75#define HBA_PORT_SPACE_BITS 16
76
77#define HBA_PORT_BASE(h) ((h) << HBA_PORT_SPACE_BITS)
78#define HBA_PORT_SPACE_SIZE (1UL << HBA_PORT_SPACE_BITS)
79
80#define PCI_PORT_HBA(a) ((a) >> HBA_PORT_SPACE_BITS)
81#define PCI_PORT_ADDR(a) ((a) & (HBA_PORT_SPACE_SIZE - 1))
82
83#ifdef CONFIG_64BIT
84#define PCI_F_EXTEND 0xffffffff00000000UL
85#define PCI_IS_LMMIO(hba,a) pci_is_lmmio(hba,a)
86
87/* We need to know if an address is LMMMIO or GMMIO.
88 * LMMIO requires mangling and GMMIO we must use as-is.
89 */
90static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a)
91{
92 return(((a) & PCI_F_EXTEND) == PCI_F_EXTEND);
93}
94
95/*
96** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses.
97** See pci.c for more conversions used by Generic PCI code.
98**
99** Platform characteristics/firmware guarantee that
100** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO
101** (2) PA_VIEW == IO_VIEW for GMMIO
102*/
103#define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \
104 ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \
105 : (a)) /* GMMIO */
106#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \
107 ? (a) + hba->lmmio_space_offset \
108 : (a))
109
110#else /* !CONFIG_64BIT */
111
112#define PCI_BUS_ADDR(hba,a) (a)
113#define PCI_HOST_ADDR(hba,a) (a)
114#define PCI_F_EXTEND 0UL
115#define PCI_IS_LMMIO(hba,a) (1) /* 32-bit doesn't support GMMIO */
116
117#endif /* !CONFIG_64BIT */
118
119/*
120** KLUGE: linux/pci.h include asm/pci.h BEFORE declaring struct pci_bus
121** (This eliminates some of the warnings).
122*/
123struct pci_bus;
124struct pci_dev;
125
126/*
127 * If the PCI device's view of memory is the same as the CPU's view of memory,
128 * PCI_DMA_BUS_IS_PHYS is true. The networking and block device layers use
129 * this boolean for bounce buffer decisions.
130 */
131#ifdef CONFIG_PA20
132/* All PA-2.0 machines have an IOMMU. */
133#define PCI_DMA_BUS_IS_PHYS 0
134#define parisc_has_iommu() do { } while (0)
135#else
136
137#if defined(CONFIG_IOMMU_CCIO) || defined(CONFIG_IOMMU_SBA)
138extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */
139#define PCI_DMA_BUS_IS_PHYS parisc_bus_is_phys
140#define parisc_has_iommu() do { parisc_bus_is_phys = 0; } while (0)
141#else
142#define PCI_DMA_BUS_IS_PHYS 1
143#define parisc_has_iommu() do { } while (0)
144#endif
145
146#endif /* !CONFIG_PA20 */
147
148
149/*
150** Most PCI devices (eg Tulip, NCR720) also export the same registers
151** to both MMIO and I/O port space. Due to poor performance of I/O Port
152** access under HP PCI bus adapters, strongly recommend the use of MMIO
153** address space.
154**
155** While I'm at it more PA programming notes:
156**
157** 1) MMIO stores (writes) are posted operations. This means the processor
158** gets an "ACK" before the write actually gets to the device. A read
159** to the same device (or typically the bus adapter above it) will
160** force in-flight write transaction(s) out to the targeted device
161** before the read can complete.
162**
163** 2) The Programmed I/O (PIO) data may not always be strongly ordered with
164** respect to DMA on all platforms. Ie PIO data can reach the processor
165** before in-flight DMA reaches memory. Since most SMP PA platforms
166** are I/O coherent, it generally doesn't matter...but sometimes
167** it does.
168**
169** I've helped device driver writers debug both types of problems.
170*/
171struct pci_port_ops {
172 u8 (*inb) (struct pci_hba_data *hba, u16 port);
173 u16 (*inw) (struct pci_hba_data *hba, u16 port);
174 u32 (*inl) (struct pci_hba_data *hba, u16 port);
175 void (*outb) (struct pci_hba_data *hba, u16 port, u8 data);
176 void (*outw) (struct pci_hba_data *hba, u16 port, u16 data);
177 void (*outl) (struct pci_hba_data *hba, u16 port, u32 data);
178};
179
180
181struct pci_bios_ops {
182 void (*init)(void);
183 void (*fixup_bus)(struct pci_bus *bus);
184};
185
186/* pci_unmap_{single,page} is not a nop, thus... */
187#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
188 dma_addr_t ADDR_NAME;
189#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
190 __u32 LEN_NAME;
191#define pci_unmap_addr(PTR, ADDR_NAME) \
192 ((PTR)->ADDR_NAME)
193#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
194 (((PTR)->ADDR_NAME) = (VAL))
195#define pci_unmap_len(PTR, LEN_NAME) \
196 ((PTR)->LEN_NAME)
197#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
198 (((PTR)->LEN_NAME) = (VAL))
199
200/*
201** Stuff declared in arch/parisc/kernel/pci.c
202*/
203extern struct pci_port_ops *pci_port;
204extern struct pci_bios_ops *pci_bios;
205
206#ifdef CONFIG_PCI
207extern void pcibios_register_hba(struct pci_hba_data *);
208extern void pcibios_set_master(struct pci_dev *);
209#else
210static inline void pcibios_register_hba(struct pci_hba_data *x)
211{
212}
213#endif
214
215/*
216 * pcibios_assign_all_busses() is used in drivers/pci/pci.c:pci_do_scan_bus()
217 * 0 == check if bridge is numbered before re-numbering.
218 * 1 == pci_do_scan_bus() should automatically number all PCI-PCI bridges.
219 *
220 * We *should* set this to zero for "legacy" platforms and one
221 * for PAT platforms.
222 *
223 * But legacy platforms also need to renumber the busses below a Host
224 * Bus controller. Adding a 4-port Tulip card on the first PCI root
225 * bus of a C200 resulted in the secondary bus being numbered as 1.
226 * The second PCI host bus controller's root bus had already been
227 * assigned bus number 1 by firmware and sysfs complained.
228 *
229 * Firmware isn't doing anything wrong here since each controller
230 * is its own PCI domain. It's simpler and easier for us to renumber
231 * the busses rather than treat each Dino as a separate PCI domain.
232 * Eventually, we may want to introduce PCI domains for Superdome or
233 * rp7420/8420 boxes and then revisit this issue.
234 */
235#define pcibios_assign_all_busses() (1)
236#define pcibios_scan_all_fns(a, b) (0)
237
238#define PCIBIOS_MIN_IO 0x10
239#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
240
241/* export the pci_ DMA API in terms of the dma_ one */
242#include <asm-generic/pci-dma-compat.h>
243
244#ifdef CONFIG_PCI
245static inline void pci_dma_burst_advice(struct pci_dev *pdev,
246 enum pci_dma_burst_strategy *strat,
247 unsigned long *strategy_parameter)
248{
249 unsigned long cacheline_size;
250 u8 byte;
251
252 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
253 if (byte == 0)
254 cacheline_size = 1024;
255 else
256 cacheline_size = (int) byte * 4;
257
258 *strat = PCI_DMA_BURST_MULTIPLE;
259 *strategy_parameter = cacheline_size;
260}
261#endif
262
263extern void
264pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
265 struct resource *res);
266
267extern void
268pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
269 struct pci_bus_region *region);
270
271static inline struct resource *
272pcibios_select_root(struct pci_dev *pdev, struct resource *res)
273{
274 struct resource *root = NULL;
275
276 if (res->flags & IORESOURCE_IO)
277 root = &ioport_resource;
278 if (res->flags & IORESOURCE_MEM)
279 root = &iomem_resource;
280
281 return root;
282}
283
284static inline void pcibios_penalize_isa_irq(int irq, int active)
285{
286 /* We don't need to penalize isa irq's */
287}
288
289static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
290{
291 return channel ? 15 : 14;
292}
293
294#endif /* __ASM_PARISC_PCI_H */
diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h
new file mode 100644
index 000000000000..c584b00c6074
--- /dev/null
+++ b/arch/parisc/include/asm/pdc.h
@@ -0,0 +1,762 @@
1#ifndef _PARISC_PDC_H
2#define _PARISC_PDC_H
3
4/*
5 * PDC return values ...
6 * All PDC calls return a subset of these errors.
7 */
8
9#define PDC_WARN 3 /* Call completed with a warning */
10#define PDC_REQ_ERR_1 2 /* See above */
11#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
12#define PDC_OK 0 /* Call completed successfully */
13#define PDC_BAD_PROC -1 /* Called non-existent procedure*/
14#define PDC_BAD_OPTION -2 /* Called with non-existent option */
15#define PDC_ERROR -3 /* Call could not complete without an error */
16#define PDC_NE_MOD -5 /* Module not found */
17#define PDC_NE_CELL_MOD -7 /* Cell module not found */
18#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
19#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
20#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
21
22/*
23 * PDC entry points...
24 */
25
26#define PDC_POW_FAIL 1 /* perform a power-fail */
27#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
28
29#define PDC_CHASSIS 2 /* PDC-chassis functions */
30#define PDC_CHASSIS_DISP 0 /* update chassis display */
31#define PDC_CHASSIS_WARN 1 /* return chassis warnings */
32#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
33#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
34
35#define PDC_PIM 3 /* Get PIM data */
36#define PDC_PIM_HPMC 0 /* Transfer HPMC data */
37#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
38#define PDC_PIM_LPMC 2 /* Transfer HPMC data */
39#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
40#define PDC_PIM_TOC 4 /* Transfer TOC data */
41
42#define PDC_MODEL 4 /* PDC model information call */
43#define PDC_MODEL_INFO 0 /* returns information */
44#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
45#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
46#define PDC_MODEL_SYSMODEL 3 /* return system model info */
47#define PDC_MODEL_ENSPEC 4 /* enable specific option */
48#define PDC_MODEL_DISPEC 5 /* disable specific option */
49#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
50#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
51/* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
52#define PDC_MODEL_IOPDIR_FDC (1 << 2)
53#define PDC_MODEL_NVA_MASK (3 << 4)
54#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
55#define PDC_MODEL_NVA_SLOW (1 << 4)
56#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
57#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
58#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
59
60#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
61#define PA90_INSTRUCTION_SET 0x8
62
63#define PDC_CACHE 5 /* return/set cache (& TLB) info*/
64#define PDC_CACHE_INFO 0 /* returns information */
65#define PDC_CACHE_SET_COH 1 /* set coherence state */
66#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
67
68#define PDC_HPA 6 /* return HPA of processor */
69#define PDC_HPA_PROCESSOR 0
70#define PDC_HPA_MODULES 1
71
72#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
73#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
74
75#define PDC_IODC 8 /* talk to IODC */
76#define PDC_IODC_READ 0 /* read IODC entry point */
77/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
78#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
79/* 1, 2 obsolete - HVERSION dependent*/
80#define PDC_IODC_RI_INIT 3 /* Initialize module */
81#define PDC_IODC_RI_IO 4 /* Module input/output */
82#define PDC_IODC_RI_SPA 5 /* Module input/output */
83#define PDC_IODC_RI_CONFIG 6 /* Module input/output */
84/* 7 obsolete - HVERSION dependent */
85#define PDC_IODC_RI_TEST 8 /* Module input/output */
86#define PDC_IODC_RI_TLB 9 /* Module input/output */
87#define PDC_IODC_NINIT 2 /* non-destructive init */
88#define PDC_IODC_DINIT 3 /* destructive init */
89#define PDC_IODC_MEMERR 4 /* check for memory errors */
90#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
91#define PDC_IODC_BUS_ERROR -4 /* bus error return value */
92#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
93#define PDC_IODC_COUNT -6 /* count is too small */
94
95#define PDC_TOD 9 /* time-of-day clock (TOD) */
96#define PDC_TOD_READ 0 /* read TOD */
97#define PDC_TOD_WRITE 1 /* write TOD */
98
99
100#define PDC_STABLE 10 /* stable storage (sprockets) */
101#define PDC_STABLE_READ 0
102#define PDC_STABLE_WRITE 1
103#define PDC_STABLE_RETURN_SIZE 2
104#define PDC_STABLE_VERIFY_CONTENTS 3
105#define PDC_STABLE_INITIALIZE 4
106
107#define PDC_NVOLATILE 11 /* often not implemented */
108
109#define PDC_ADD_VALID 12 /* Memory validation PDC call */
110#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
111
112#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
113
114#define PDC_PROC 16 /* (sprockets) */
115
116#define PDC_CONFIG 16 /* (sprockets) */
117#define PDC_CONFIG_DECONFIG 0
118#define PDC_CONFIG_DRECONFIG 1
119#define PDC_CONFIG_DRETURN_CONFIG 2
120
121#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
122#define PDC_BTLB_INFO 0 /* returns parameter */
123#define PDC_BTLB_INSERT 1 /* insert BTLB entry */
124#define PDC_BTLB_PURGE 2 /* purge BTLB entries */
125#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
126
127#define PDC_TLB 19 /* manage hardware TLB miss handling */
128#define PDC_TLB_INFO 0 /* returns parameter */
129#define PDC_TLB_SETUP 1 /* set up miss handling */
130
131#define PDC_MEM 20 /* Manage memory */
132#define PDC_MEM_MEMINFO 0
133#define PDC_MEM_ADD_PAGE 1
134#define PDC_MEM_CLEAR_PDT 2
135#define PDC_MEM_READ_PDT 3
136#define PDC_MEM_RESET_CLEAR 4
137#define PDC_MEM_GOODMEM 5
138#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
139#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
140#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
141#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
142#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
143
144#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
145#define PDC_MEM_RET_DUPLICATE_ENTRY 4
146#define PDC_MEM_RET_BUF_SIZE_SMALL 1
147#define PDC_MEM_RET_PDT_FULL -11
148#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
149
150#define PDC_PSW 21 /* Get/Set default System Mask */
151#define PDC_PSW_MASK 0 /* Return mask */
152#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
153#define PDC_PSW_SET_DEFAULTS 2 /* Set default */
154#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
155#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
156
157#define PDC_SYSTEM_MAP 22 /* find system modules */
158#define PDC_FIND_MODULE 0
159#define PDC_FIND_ADDRESS 1
160#define PDC_TRANSLATE_PATH 2
161
162#define PDC_SOFT_POWER 23 /* soft power switch */
163#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
164#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
165
166
167/* HVERSION dependent */
168
169/* The PDC_MEM_MAP calls */
170#define PDC_MEM_MAP 128 /* on s700: return page info */
171#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
172
173#define PDC_EEPROM 129 /* EEPROM access */
174#define PDC_EEPROM_READ_WORD 0
175#define PDC_EEPROM_WRITE_WORD 1
176#define PDC_EEPROM_READ_BYTE 2
177#define PDC_EEPROM_WRITE_BYTE 3
178#define PDC_EEPROM_EEPROM_PASSWORD -1000
179
180#define PDC_NVM 130 /* NVM (non-volatile memory) access */
181#define PDC_NVM_READ_WORD 0
182#define PDC_NVM_WRITE_WORD 1
183#define PDC_NVM_READ_BYTE 2
184#define PDC_NVM_WRITE_BYTE 3
185
186#define PDC_SEED_ERROR 132 /* (sprockets) */
187
188#define PDC_IO 135 /* log error info, reset IO system */
189#define PDC_IO_READ_AND_CLEAR_ERRORS 0
190#define PDC_IO_RESET 1
191#define PDC_IO_RESET_DEVICES 2
192/* sets bits 6&7 (little endian) of the HcControl Register */
193#define PDC_IO_USB_SUSPEND 0xC000000000000000
194#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
195#define PDC_IO_NO_SUSPEND -6 /* return value */
196
197#define PDC_BROADCAST_RESET 136 /* reset all processors */
198#define PDC_DO_RESET 0 /* option: perform a broadcast reset */
199#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
200#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
201#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
202
203#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
204#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
205
206#define PDC_LAN_STATION_ID_SIZE 6
207
208#define PDC_CHECK_RANGES 139 /* (sprockets) */
209
210#define PDC_NV_SECTIONS 141 /* (sprockets) */
211
212#define PDC_PERFORMANCE 142 /* performance monitoring */
213
214#define PDC_SYSTEM_INFO 143 /* system information */
215#define PDC_SYSINFO_RETURN_INFO_SIZE 0
216#define PDC_SYSINFO_RRETURN_SYS_INFO 1
217#define PDC_SYSINFO_RRETURN_ERRORS 2
218#define PDC_SYSINFO_RRETURN_WARNINGS 3
219#define PDC_SYSINFO_RETURN_REVISIONS 4
220#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
221#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
222
223#define PDC_RDR 144 /* (sprockets) */
224#define PDC_RDR_READ_BUFFER 0
225#define PDC_RDR_READ_SINGLE 1
226#define PDC_RDR_WRITE_SINGLE 2
227
228#define PDC_INTRIGUE 145 /* (sprockets) */
229#define PDC_INTRIGUE_WRITE_BUFFER 0
230#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
231#define PDC_INTRIGUE_START_CPU_COUNTERS 2
232#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
233
234#define PDC_STI 146 /* STI access */
235/* same as PDC_PCI_XXX values (see below) */
236
237/* Legacy PDC definitions for same stuff */
238#define PDC_PCI_INDEX 147
239#define PDC_PCI_INTERFACE_INFO 0
240#define PDC_PCI_SLOT_INFO 1
241#define PDC_PCI_INFLIGHT_BYTES 2
242#define PDC_PCI_READ_CONFIG 3
243#define PDC_PCI_WRITE_CONFIG 4
244#define PDC_PCI_READ_PCI_IO 5
245#define PDC_PCI_WRITE_PCI_IO 6
246#define PDC_PCI_READ_CONFIG_DELAY 7
247#define PDC_PCI_UPDATE_CONFIG_DELAY 8
248#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
249#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
250#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
251#define PDC_PCI_PCI_RESERVED 12
252#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
253#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
254#define PDC_PCI_PCI_INT_ROUTE 14
255#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
256#define PDC_PCI_READ_MON_TYPE 15
257#define PDC_PCI_WRITE_MON_TYPE 16
258
259
260/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
261#define PDC_INITIATOR 163
262#define PDC_GET_INITIATOR 0
263#define PDC_SET_INITIATOR 1
264#define PDC_DELETE_INITIATOR 2
265#define PDC_RETURN_TABLE_SIZE 3
266#define PDC_RETURN_TABLE 4
267
268#define PDC_LINK 165 /* (sprockets) */
269#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
270#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
271
272/* cl_class
273 * page 3-33 of IO-Firmware ARS
274 * IODC ENTRY_INIT(Search first) RET[1]
275 */
276#define CL_NULL 0 /* invalid */
277#define CL_RANDOM 1 /* random access (as disk) */
278#define CL_SEQU 2 /* sequential access (as tape) */
279#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
280#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
281#define CL_DISPL 9 /* half-duplex console (display) */
282#define CL_FC 10 /* FiberChannel access media */
283
284/* IODC ENTRY_INIT() */
285#define ENTRY_INIT_SRCH_FRST 2
286#define ENTRY_INIT_SRCH_NEXT 3
287#define ENTRY_INIT_MOD_DEV 4
288#define ENTRY_INIT_DEV 5
289#define ENTRY_INIT_MOD 6
290#define ENTRY_INIT_MSG 9
291
292/* IODC ENTRY_IO() */
293#define ENTRY_IO_BOOTIN 0
294#define ENTRY_IO_BOOTOUT 1
295#define ENTRY_IO_CIN 2
296#define ENTRY_IO_COUT 3
297#define ENTRY_IO_CLOSE 4
298#define ENTRY_IO_GETMSG 9
299#define ENTRY_IO_BBLOCK_IN 16
300#define ENTRY_IO_BBLOCK_OUT 17
301
302/* IODC ENTRY_SPA() */
303
304/* IODC ENTRY_CONFIG() */
305
306/* IODC ENTRY_TEST() */
307
308/* IODC ENTRY_TLB() */
309
310/* constants for OS (NVM...) */
311#define OS_ID_NONE 0 /* Undefined OS ID */
312#define OS_ID_HPUX 1 /* HP-UX OS */
313#define OS_ID_MPEXL 2 /* MPE XL OS */
314#define OS_ID_OSF 3 /* OSF OS */
315#define OS_ID_HPRT 4 /* HP-RT OS */
316#define OS_ID_NOVEL 5 /* NOVELL OS */
317#define OS_ID_LINUX 6 /* Linux */
318
319
320/* constants for PDC_CHASSIS */
321#define OSTAT_OFF 0
322#define OSTAT_FLT 1
323#define OSTAT_TEST 2
324#define OSTAT_INIT 3
325#define OSTAT_SHUT 4
326#define OSTAT_WARN 5
327#define OSTAT_RUN 6
328#define OSTAT_ON 7
329
330/* Page Zero constant offsets used by the HPMC handler */
331#define BOOT_CONSOLE_HPA_OFFSET 0x3c0
332#define BOOT_CONSOLE_SPA_OFFSET 0x3c4
333#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
334
335/* size of the pdc_result buffer for firmware.c */
336#define NUM_PDC_RESULT 32
337
338#if !defined(__ASSEMBLY__)
339#ifdef __KERNEL__
340
341#include <linux/types.h>
342
343extern int pdc_type;
344
345/* Values for pdc_type */
346#define PDC_TYPE_ILLEGAL -1
347#define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
348#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
349#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
350
351struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
352 unsigned long actcnt; /* actual number of bytes returned */
353 unsigned long maxcnt; /* maximum number of bytes that could be returned */
354};
355
356struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
357 unsigned long ccr_functional;
358 unsigned long ccr_present;
359 unsigned long revision;
360 unsigned long model;
361};
362
363struct pdc_model { /* for PDC_MODEL */
364 unsigned long hversion;
365 unsigned long sversion;
366 unsigned long hw_id;
367 unsigned long boot_id;
368 unsigned long sw_id;
369 unsigned long sw_cap;
370 unsigned long arch_rev;
371 unsigned long pot_key;
372 unsigned long curr_key;
373};
374
375struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
376 unsigned long
377#ifdef CONFIG_64BIT
378 cc_padW:32,
379#endif
380 cc_alias: 4, /* alias boundaries for virtual addresses */
381 cc_block: 4, /* to determine most efficient stride */
382 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
383 cc_shift: 2, /* how much to shift cc_block left */
384 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
385 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
386 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
387 cc_pad1 : 10, /* reserved */
388 cc_hv : 3; /* hversion dependent */
389};
390
391struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
392 unsigned long tc_pad0:12, /* reserved */
393#ifdef CONFIG_64BIT
394 tc_padW:32,
395#endif
396 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
397 tc_hv : 1, /* HV */
398 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
399 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
400 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
401 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
402};
403
404struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
405 /* I-cache */
406 unsigned long ic_size; /* size in bytes */
407 struct pdc_cache_cf ic_conf; /* configuration */
408 unsigned long ic_base; /* base-addr */
409 unsigned long ic_stride;
410 unsigned long ic_count;
411 unsigned long ic_loop;
412 /* D-cache */
413 unsigned long dc_size; /* size in bytes */
414 struct pdc_cache_cf dc_conf; /* configuration */
415 unsigned long dc_base; /* base-addr */
416 unsigned long dc_stride;
417 unsigned long dc_count;
418 unsigned long dc_loop;
419 /* Instruction-TLB */
420 unsigned long it_size; /* number of entries in I-TLB */
421 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
422 unsigned long it_sp_base;
423 unsigned long it_sp_stride;
424 unsigned long it_sp_count;
425 unsigned long it_off_base;
426 unsigned long it_off_stride;
427 unsigned long it_off_count;
428 unsigned long it_loop;
429 /* data-TLB */
430 unsigned long dt_size; /* number of entries in D-TLB */
431 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
432 unsigned long dt_sp_base;
433 unsigned long dt_sp_stride;
434 unsigned long dt_sp_count;
435 unsigned long dt_off_base;
436 unsigned long dt_off_stride;
437 unsigned long dt_off_count;
438 unsigned long dt_loop;
439};
440
441#if 0
442/* If you start using the next struct, you'll have to adjust it to
443 * work with 64-bit firmware I think -PB
444 */
445struct pdc_iodc { /* PDC_IODC */
446 unsigned char hversion_model;
447 unsigned char hversion;
448 unsigned char spa;
449 unsigned char type;
450 unsigned int sversion_rev:4;
451 unsigned int sversion_model:19;
452 unsigned int sversion_opt:8;
453 unsigned char rev;
454 unsigned char dep;
455 unsigned char features;
456 unsigned char pad1;
457 unsigned int checksum:16;
458 unsigned int length:16;
459 unsigned int pad[15];
460} __attribute__((aligned(8))) ;
461#endif
462
463#ifndef CONFIG_PA20
464/* no BLTBs in pa2.0 processors */
465struct pdc_btlb_info_range {
466 __u8 res00;
467 __u8 num_i;
468 __u8 num_d;
469 __u8 num_comb;
470};
471
472struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
473 unsigned int min_size; /* minimum size of BTLB in pages */
474 unsigned int max_size; /* maximum size of BTLB in pages */
475 struct pdc_btlb_info_range fixed_range_info;
476 struct pdc_btlb_info_range variable_range_info;
477};
478
479#endif /* !CONFIG_PA20 */
480
481#ifdef CONFIG_64BIT
482struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
483 unsigned long entries_returned;
484 unsigned long entries_total;
485};
486
487struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
488 unsigned long paddr;
489 unsigned int pages;
490 unsigned int reserved;
491};
492#endif /* CONFIG_64BIT */
493
494struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
495 unsigned long mod_addr;
496 unsigned long mod_pgs;
497 unsigned long add_addrs;
498};
499
500struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
501 unsigned long mod_addr;
502 unsigned long mod_pgs;
503};
504
505struct pdc_initiator { /* PDC_INITIATOR */
506 int host_id;
507 int factor;
508 int width;
509 int mode;
510};
511
512struct hardware_path {
513 char flags; /* see bit definitions below */
514 char bc[6]; /* Bus Converter routing info to a specific */
515 /* I/O adaptor (< 0 means none, > 63 resvd) */
516 char mod; /* fixed field of specified module */
517};
518
519/*
520 * Device path specifications used by PDC.
521 */
522struct pdc_module_path {
523 struct hardware_path path;
524 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
525};
526
527#ifndef CONFIG_PA20
528/* Only used on some pre-PA2.0 boxes */
529struct pdc_memory_map { /* PDC_MEMORY_MAP */
530 unsigned long hpa; /* mod's register set address */
531 unsigned long more_pgs; /* number of additional I/O pgs */
532};
533#endif
534
535struct pdc_tod {
536 unsigned long tod_sec;
537 unsigned long tod_usec;
538};
539
540/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
541
542struct pdc_hpmc_pim_11 { /* PDC_PIM */
543 __u32 gr[32];
544 __u32 cr[32];
545 __u32 sr[8];
546 __u32 iasq_back;
547 __u32 iaoq_back;
548 __u32 check_type;
549 __u32 cpu_state;
550 __u32 rsvd1;
551 __u32 cache_check;
552 __u32 tlb_check;
553 __u32 bus_check;
554 __u32 assists_check;
555 __u32 rsvd2;
556 __u32 assist_state;
557 __u32 responder_addr;
558 __u32 requestor_addr;
559 __u32 path_info;
560 __u64 fr[32];
561};
562
563/*
564 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
565 *
566 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
567 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
568 *
569 * Note also that there are unarchitected results available, which
570 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
571 * the firmware is probably the best way of printing hversion dependent
572 * data.
573 */
574
575struct pdc_hpmc_pim_20 { /* PDC_PIM */
576 __u64 gr[32];
577 __u64 cr[32];
578 __u64 sr[8];
579 __u64 iasq_back;
580 __u64 iaoq_back;
581 __u32 check_type;
582 __u32 cpu_state;
583 __u32 cache_check;
584 __u32 tlb_check;
585 __u32 bus_check;
586 __u32 assists_check;
587 __u32 assist_state;
588 __u32 path_info;
589 __u64 responder_addr;
590 __u64 requestor_addr;
591 __u64 fr[32];
592};
593
594void pdc_console_init(void); /* in pdc_console.c */
595void pdc_console_restart(void);
596
597void setup_pdc(void); /* in inventory.c */
598
599/* wrapper-functions from pdc.c */
600
601int pdc_add_valid(unsigned long address);
602int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
603int pdc_chassis_disp(unsigned long disp);
604int pdc_chassis_warn(unsigned long *warn);
605int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
606int pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info);
607int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
608 void *iodc_data, unsigned int iodc_data_size);
609int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
610 struct pdc_module_path *mod_path, long mod_index);
611int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
612 long mod_index, long addr_index);
613int pdc_model_info(struct pdc_model *model);
614int pdc_model_sysmodel(char *name);
615int pdc_model_cpuid(unsigned long *cpu_id);
616int pdc_model_versions(unsigned long *versions, int id);
617int pdc_model_capabilities(unsigned long *capabilities);
618int pdc_cache_info(struct pdc_cache_info *cache);
619int pdc_spaceid_bits(unsigned long *space_bits);
620#ifndef CONFIG_PA20
621int pdc_btlb_info(struct pdc_btlb_info *btlb);
622int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
623#endif /* !CONFIG_PA20 */
624int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
625
626int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
627int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
628int pdc_stable_get_size(unsigned long *size);
629int pdc_stable_verify_contents(void);
630int pdc_stable_initialize(void);
631
632int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
633int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
634
635int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
636int pdc_tod_read(struct pdc_tod *tod);
637int pdc_tod_set(unsigned long sec, unsigned long usec);
638
639#ifdef CONFIG_64BIT
640int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
641 struct pdc_memory_table *tbl, unsigned long entries);
642#endif
643
644void set_firmware_width(void);
645void set_firmware_width_unlocked(void);
646int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
647int pdc_do_reset(void);
648int pdc_soft_power_info(unsigned long *power_reg);
649int pdc_soft_power_button(int sw_control);
650void pdc_io_reset(void);
651void pdc_io_reset_devices(void);
652int pdc_iodc_getc(void);
653int pdc_iodc_print(const unsigned char *str, unsigned count);
654
655void pdc_emergency_unlock(void);
656int pdc_sti_call(unsigned long func, unsigned long flags,
657 unsigned long inptr, unsigned long outputr,
658 unsigned long glob_cfg);
659
660static inline char * os_id_to_string(u16 os_id) {
661 switch(os_id) {
662 case OS_ID_NONE: return "No OS";
663 case OS_ID_HPUX: return "HP-UX";
664 case OS_ID_MPEXL: return "MPE-iX";
665 case OS_ID_OSF: return "OSF";
666 case OS_ID_HPRT: return "HP-RT";
667 case OS_ID_NOVEL: return "Novell Netware";
668 case OS_ID_LINUX: return "Linux";
669 default: return "Unknown";
670 }
671}
672
673#endif /* __KERNEL__ */
674
675#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
676
677/* DEFINITION OF THE ZERO-PAGE (PAG0) */
678/* based on work by Jason Eckhardt (jason@equator.com) */
679
680/* flags of the device_path */
681#define PF_AUTOBOOT 0x80
682#define PF_AUTOSEARCH 0x40
683#define PF_TIMER 0x0F
684
685struct device_path { /* page 1-69 */
686 unsigned char flags; /* flags see above! */
687 unsigned char bc[6]; /* bus converter routing info */
688 unsigned char mod;
689 unsigned int layers[6];/* device-specific layer-info */
690} __attribute__((aligned(8))) ;
691
692struct pz_device {
693 struct device_path dp; /* see above */
694 /* struct iomod *hpa; */
695 unsigned int hpa; /* HPA base address */
696 /* char *spa; */
697 unsigned int spa; /* SPA base address */
698 /* int (*iodc_io)(struct iomod*, ...); */
699 unsigned int iodc_io; /* device entry point */
700 short pad; /* reserved */
701 unsigned short cl_class;/* see below */
702} __attribute__((aligned(8))) ;
703
704struct zeropage {
705 /* [0x000] initialize vectors (VEC) */
706 unsigned int vec_special; /* must be zero */
707 /* int (*vec_pow_fail)(void);*/
708 unsigned int vec_pow_fail; /* power failure handler */
709 /* int (*vec_toc)(void); */
710 unsigned int vec_toc;
711 unsigned int vec_toclen;
712 /* int (*vec_rendz)(void); */
713 unsigned int vec_rendz;
714 int vec_pow_fail_flen;
715 int vec_pad[10];
716
717 /* [0x040] reserved processor dependent */
718 int pad0[112];
719
720 /* [0x200] reserved */
721 int pad1[84];
722
723 /* [0x350] memory configuration (MC) */
724 int memc_cont; /* contiguous mem size (bytes) */
725 int memc_phsize; /* physical memory size */
726 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
727 unsigned int mem_pdc_hi; /* used for 64-bit */
728
729 /* [0x360] various parameters for the boot-CPU */
730 /* unsigned int *mem_booterr[8]; */
731 unsigned int mem_booterr[8]; /* ptr to boot errors */
732 unsigned int mem_free; /* first location, where OS can be loaded */
733 /* struct iomod *mem_hpa; */
734 unsigned int mem_hpa; /* HPA of the boot-CPU */
735 /* int (*mem_pdc)(int, ...); */
736 unsigned int mem_pdc; /* PDC entry point */
737 unsigned int mem_10msec; /* number of clock ticks in 10msec */
738
739 /* [0x390] initial memory module (IMM) */
740 /* struct iomod *imm_hpa; */
741 unsigned int imm_hpa; /* HPA of the IMM */
742 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
743 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
744 unsigned int imm_max_mem; /* bytes of mem in IMM */
745
746 /* [0x3A0] boot console, display device and keyboard */
747 struct pz_device mem_cons; /* description of console device */
748 struct pz_device mem_boot; /* description of boot device */
749 struct pz_device mem_kbd; /* description of keyboard device */
750
751 /* [0x430] reserved */
752 int pad430[116];
753
754 /* [0x600] processor dependent */
755 __u32 pad600[1];
756 __u32 proc_sti; /* pointer to STI ROM */
757 __u32 pad608[126];
758};
759
760#endif /* !defined(__ASSEMBLY__) */
761
762#endif /* _PARISC_PDC_H */
diff --git a/arch/parisc/include/asm/pdc_chassis.h b/arch/parisc/include/asm/pdc_chassis.h
new file mode 100644
index 000000000000..a609273dc6bf
--- /dev/null
+++ b/arch/parisc/include/asm/pdc_chassis.h
@@ -0,0 +1,381 @@
1/*
2 * include/asm-parisc/pdc_chassis.h
3 *
4 * Copyright (C) 2002 Laurent Canet <canetl@esiee.fr>
5 * Copyright (C) 2002 Thibaut Varene <varenet@parisc-linux.org>
6 *
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License, version 2, as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 * TODO: - handle processor number on SMP systems (Reporting Entity ID)
22 * - handle message ID
23 * - handle timestamps
24 */
25
26
27#ifndef _PARISC_PDC_CHASSIS_H
28#define _PARISC_PDC_CHASSIS_H
29
30/*
31 * ----------
32 * Prototypes
33 * ----------
34 */
35
36int pdc_chassis_send_status(int message);
37void parisc_pdc_chassis_init(void);
38
39
40/*
41 * -----------------
42 * Direct call names
43 * -----------------
44 * They setup everything for you, the Log message and the corresponding LED state
45 */
46
47#define PDC_CHASSIS_DIRECT_BSTART 0
48#define PDC_CHASSIS_DIRECT_BCOMPLETE 1
49#define PDC_CHASSIS_DIRECT_SHUTDOWN 2
50#define PDC_CHASSIS_DIRECT_PANIC 3
51#define PDC_CHASSIS_DIRECT_HPMC 4
52#define PDC_CHASSIS_DIRECT_LPMC 5
53#define PDC_CHASSIS_DIRECT_DUMP 6 /* not yet implemented */
54#define PDC_CHASSIS_DIRECT_OOPS 7 /* not yet implemented */
55
56
57/*
58 * ------------
59 * LEDs control
60 * ------------
61 * Set the three LEDs -- Run, Attn, and Fault.
62 */
63
64/* Old PDC LED control */
65#define PDC_CHASSIS_DISP_DATA(v) ((unsigned long)(v) << 17)
66
67/*
68 * Available PDC PAT LED states
69 */
70
71#define PDC_CHASSIS_LED_RUN_OFF (0ULL << 4)
72#define PDC_CHASSIS_LED_RUN_FLASH (1ULL << 4)
73#define PDC_CHASSIS_LED_RUN_ON (2ULL << 4)
74#define PDC_CHASSIS_LED_RUN_NC (3ULL << 4)
75#define PDC_CHASSIS_LED_ATTN_OFF (0ULL << 6)
76#define PDC_CHASSIS_LED_ATTN_FLASH (1ULL << 6)
77#define PDC_CHASSIS_LED_ATTN_NC (3ULL << 6) /* ATTN ON is invalid */
78#define PDC_CHASSIS_LED_FAULT_OFF (0ULL << 8)
79#define PDC_CHASSIS_LED_FAULT_FLASH (1ULL << 8)
80#define PDC_CHASSIS_LED_FAULT_ON (2ULL << 8)
81#define PDC_CHASSIS_LED_FAULT_NC (3ULL << 8)
82#define PDC_CHASSIS_LED_VALID (1ULL << 10)
83
84/*
85 * Valid PDC PAT LED states combinations
86 */
87
88/* System running normally */
89#define PDC_CHASSIS_LSTATE_RUN_NORMAL (PDC_CHASSIS_LED_RUN_ON | \
90 PDC_CHASSIS_LED_ATTN_OFF | \
91 PDC_CHASSIS_LED_FAULT_OFF | \
92 PDC_CHASSIS_LED_VALID )
93/* System crashed and rebooted itself successfully */
94#define PDC_CHASSIS_LSTATE_RUN_CRASHREC (PDC_CHASSIS_LED_RUN_ON | \
95 PDC_CHASSIS_LED_ATTN_OFF | \
96 PDC_CHASSIS_LED_FAULT_FLASH | \
97 PDC_CHASSIS_LED_VALID )
98/* There was a system interruption that did not take the system down */
99#define PDC_CHASSIS_LSTATE_RUN_SYSINT (PDC_CHASSIS_LED_RUN_ON | \
100 PDC_CHASSIS_LED_ATTN_FLASH | \
101 PDC_CHASSIS_LED_FAULT_OFF | \
102 PDC_CHASSIS_LED_VALID )
103/* System running and unexpected reboot or non-critical error detected */
104#define PDC_CHASSIS_LSTATE_RUN_NCRIT (PDC_CHASSIS_LED_RUN_ON | \
105 PDC_CHASSIS_LED_ATTN_FLASH | \
106 PDC_CHASSIS_LED_FAULT_FLASH | \
107 PDC_CHASSIS_LED_VALID )
108/* Executing non-OS code */
109#define PDC_CHASSIS_LSTATE_NONOS (PDC_CHASSIS_LED_RUN_FLASH | \
110 PDC_CHASSIS_LED_ATTN_OFF | \
111 PDC_CHASSIS_LED_FAULT_OFF | \
112 PDC_CHASSIS_LED_VALID )
113/* Boot failed - Executing non-OS code */
114#define PDC_CHASSIS_LSTATE_NONOS_BFAIL (PDC_CHASSIS_LED_RUN_FLASH | \
115 PDC_CHASSIS_LED_ATTN_OFF | \
116 PDC_CHASSIS_LED_FAULT_ON | \
117 PDC_CHASSIS_LED_VALID )
118/* Unexpected reboot occurred - Executing non-OS code */
119#define PDC_CHASSIS_LSTATE_NONOS_UNEXP (PDC_CHASSIS_LED_RUN_FLASH | \
120 PDC_CHASSIS_LED_ATTN_OFF | \
121 PDC_CHASSIS_LED_FAULT_FLASH | \
122 PDC_CHASSIS_LED_VALID )
123/* Executing non-OS code - Non-critical error detected */
124#define PDC_CHASSIS_LSTATE_NONOS_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
125 PDC_CHASSIS_LED_ATTN_FLASH | \
126 PDC_CHASSIS_LED_FAULT_OFF | \
127 PDC_CHASSIS_LED_VALID )
128/* Boot failed - Executing non-OS code - Non-critical error detected */
129#define PDC_CHASSIS_LSTATE_BFAIL_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
130 PDC_CHASSIS_LED_ATTN_FLASH | \
131 PDC_CHASSIS_LED_FAULT_ON | \
132 PDC_CHASSIS_LED_VALID )
133/* Unexpected reboot/recovering - Executing non-OS code - Non-critical error detected */
134#define PDC_CHASSIS_LSTATE_UNEXP_NCRIT (PDC_CHASSIS_LED_RUN_FLASH | \
135 PDC_CHASSIS_LED_ATTN_FLASH | \
136 PDC_CHASSIS_LED_FAULT_FLASH | \
137 PDC_CHASSIS_LED_VALID )
138/* Cannot execute PDC */
139#define PDC_CHASSIS_LSTATE_CANNOT_PDC (PDC_CHASSIS_LED_RUN_OFF | \
140 PDC_CHASSIS_LED_ATTN_OFF | \
141 PDC_CHASSIS_LED_FAULT_OFF | \
142 PDC_CHASSIS_LED_VALID )
143/* Boot failed - OS not up - PDC has detected a failure that prevents boot */
144#define PDC_CHASSIS_LSTATE_FATAL_BFAIL (PDC_CHASSIS_LED_RUN_OFF | \
145 PDC_CHASSIS_LED_ATTN_OFF | \
146 PDC_CHASSIS_LED_FAULT_ON | \
147 PDC_CHASSIS_LED_VALID )
148/* No code running - Non-critical error detected (double fault situation) */
149#define PDC_CHASSIS_LSTATE_NOCODE_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
150 PDC_CHASSIS_LED_ATTN_FLASH | \
151 PDC_CHASSIS_LED_FAULT_OFF | \
152 PDC_CHASSIS_LED_VALID )
153/* Boot failed - OS not up - Fatal failure detected - Non-critical error detected */
154#define PDC_CHASSIS_LSTATE_FATAL_NCRIT (PDC_CHASSIS_LED_RUN_OFF | \
155 PDC_CHASSIS_LED_ATTN_FLASH | \
156 PDC_CHASSIS_LED_FAULT_ON | \
157 PDC_CHASSIS_LED_VALID )
158/* All other states are invalid */
159
160
161/*
162 * --------------
163 * PDC Log events
164 * --------------
165 * Here follows bits needed to fill up the log event sent to PDC_CHASSIS
166 * The log message contains: Alert level, Source, Source detail,
167 * Source ID, Problem detail, Caller activity, Activity status,
168 * Caller subactivity, Reporting entity type, Reporting entity ID,
169 * Data type, Unique message ID and EOM.
170 */
171
172/* Alert level */
173#define PDC_CHASSIS_ALERT_FORWARD (0ULL << 36) /* no failure detected */
174#define PDC_CHASSIS_ALERT_SERPROC (1ULL << 36) /* service proc - no failure */
175#define PDC_CHASSIS_ALERT_NURGENT (2ULL << 36) /* non-urgent operator attn */
176#define PDC_CHASSIS_ALERT_BLOCKED (3ULL << 36) /* system blocked */
177#define PDC_CHASSIS_ALERT_CONF_CHG (4ULL << 36) /* unexpected configuration change */
178#define PDC_CHASSIS_ALERT_ENV_PB (5ULL << 36) /* boot possible, environmental pb */
179#define PDC_CHASSIS_ALERT_PENDING (6ULL << 36) /* boot possible, pending failure */
180#define PDC_CHASSIS_ALERT_PERF_IMP (8ULL << 36) /* boot possible, performance impaired */
181#define PDC_CHASSIS_ALERT_FUNC_IMP (10ULL << 36) /* boot possible, functionality impaired */
182#define PDC_CHASSIS_ALERT_SOFT_FAIL (12ULL << 36) /* software failure */
183#define PDC_CHASSIS_ALERT_HANG (13ULL << 36) /* system hang */
184#define PDC_CHASSIS_ALERT_ENV_FATAL (14ULL << 36) /* fatal power or environmental pb */
185#define PDC_CHASSIS_ALERT_HW_FATAL (15ULL << 36) /* fatal hardware problem */
186
187/* Source */
188#define PDC_CHASSIS_SRC_NONE (0ULL << 28) /* unknown, no source stated */
189#define PDC_CHASSIS_SRC_PROC (1ULL << 28) /* processor */
190/* For later use ? */
191#define PDC_CHASSIS_SRC_PROC_CACHE (2ULL << 28) /* processor cache*/
192#define PDC_CHASSIS_SRC_PDH (3ULL << 28) /* processor dependent hardware */
193#define PDC_CHASSIS_SRC_PWR (4ULL << 28) /* power */
194#define PDC_CHASSIS_SRC_FAB (5ULL << 28) /* fabric connector */
195#define PDC_CHASSIS_SRC_PLATi (6ULL << 28) /* platform */
196#define PDC_CHASSIS_SRC_MEM (7ULL << 28) /* memory */
197#define PDC_CHASSIS_SRC_IO (8ULL << 28) /* I/O */
198#define PDC_CHASSIS_SRC_CELL (9ULL << 28) /* cell */
199#define PDC_CHASSIS_SRC_PD (10ULL << 28) /* protected domain */
200
201/* Source detail field */
202#define PDC_CHASSIS_SRC_D_PROC (1ULL << 24) /* processor general */
203
204/* Source ID - platform dependent */
205#define PDC_CHASSIS_SRC_ID_UNSPEC (0ULL << 16)
206
207/* Problem detail - problem source dependent */
208#define PDC_CHASSIS_PB_D_PROC_NONE (0ULL << 32) /* no problem detail */
209#define PDC_CHASSIS_PB_D_PROC_TIMEOUT (4ULL << 32) /* timeout */
210
211/* Caller activity */
212#define PDC_CHASSIS_CALL_ACT_HPUX_BL (7ULL << 12) /* Boot Loader */
213#define PDC_CHASSIS_CALL_ACT_HPUX_PD (8ULL << 12) /* SAL_PD activities */
214#define PDC_CHASSIS_CALL_ACT_HPUX_EVENT (9ULL << 12) /* SAL_EVENTS activities */
215#define PDC_CHASSIS_CALL_ACT_HPUX_IO (10ULL << 12) /* SAL_IO activities */
216#define PDC_CHASSIS_CALL_ACT_HPUX_PANIC (11ULL << 12) /* System panic */
217#define PDC_CHASSIS_CALL_ACT_HPUX_INIT (12ULL << 12) /* System initialization */
218#define PDC_CHASSIS_CALL_ACT_HPUX_SHUT (13ULL << 12) /* System shutdown */
219#define PDC_CHASSIS_CALL_ACT_HPUX_WARN (14ULL << 12) /* System warning */
220#define PDC_CHASSIS_CALL_ACT_HPUX_DU (15ULL << 12) /* Display_Activity() update */
221
222/* Activity status - implementation dependent */
223#define PDC_CHASSIS_ACT_STATUS_UNSPEC (0ULL << 0)
224
225/* Caller subactivity - implementation dependent */
226/* FIXME: other subactivities ? */
227#define PDC_CHASSIS_CALL_SACT_UNSPEC (0ULL << 4) /* implementation dependent */
228
229/* Reporting entity type */
230#define PDC_CHASSIS_RET_GENERICOS (12ULL << 52) /* generic OSes */
231#define PDC_CHASSIS_RET_IA64_NT (13ULL << 52) /* IA-64 NT */
232#define PDC_CHASSIS_RET_HPUX (14ULL << 52) /* HP-UX */
233#define PDC_CHASSIS_RET_DIAG (15ULL << 52) /* offline diagnostics & utilities */
234
235/* Reporting entity ID */
236#define PDC_CHASSIS_REID_UNSPEC (0ULL << 44)
237
238/* Data type */
239#define PDC_CHASSIS_DT_NONE (0ULL << 59) /* data field unused */
240/* For later use ? Do we need these ? */
241#define PDC_CHASSIS_DT_PHYS_ADDR (1ULL << 59) /* physical address */
242#define PDC_CHASSIS_DT_DATA_EXPECT (2ULL << 59) /* expected data */
243#define PDC_CHASSIS_DT_ACTUAL (3ULL << 59) /* actual data */
244#define PDC_CHASSIS_DT_PHYS_LOC (4ULL << 59) /* physical location */
245#define PDC_CHASSIS_DT_PHYS_LOC_EXT (5ULL << 59) /* physical location extension */
246#define PDC_CHASSIS_DT_TAG (6ULL << 59) /* tag */
247#define PDC_CHASSIS_DT_SYNDROME (7ULL << 59) /* syndrome */
248#define PDC_CHASSIS_DT_CODE_ADDR (8ULL << 59) /* code address */
249#define PDC_CHASSIS_DT_ASCII_MSG (9ULL << 59) /* ascii message */
250#define PDC_CHASSIS_DT_POST (10ULL << 59) /* POST code */
251#define PDC_CHASSIS_DT_TIMESTAMP (11ULL << 59) /* timestamp */
252#define PDC_CHASSIS_DT_DEV_STAT (12ULL << 59) /* device status */
253#define PDC_CHASSIS_DT_DEV_TYPE (13ULL << 59) /* device type */
254#define PDC_CHASSIS_DT_PB_DET (14ULL << 59) /* problem detail */
255#define PDC_CHASSIS_DT_ACT_LEV (15ULL << 59) /* activity level/timeout */
256#define PDC_CHASSIS_DT_SER_NUM (16ULL << 59) /* serial number */
257#define PDC_CHASSIS_DT_REV_NUM (17ULL << 59) /* revision number */
258#define PDC_CHASSIS_DT_INTERRUPT (18ULL << 59) /* interruption information */
259#define PDC_CHASSIS_DT_TEST_NUM (19ULL << 59) /* test number */
260#define PDC_CHASSIS_DT_STATE_CHG (20ULL << 59) /* major changes in system state */
261#define PDC_CHASSIS_DT_PROC_DEALLOC (21ULL << 59) /* processor deallocate */
262#define PDC_CHASSIS_DT_RESET (30ULL << 59) /* reset type and cause */
263#define PDC_CHASSIS_DT_PA_LEGACY (31ULL << 59) /* legacy PA hex chassis code */
264
265/* System states - part of major changes in system state data field */
266#define PDC_CHASSIS_SYSTATE_BSTART (0ULL << 0) /* boot start */
267#define PDC_CHASSIS_SYSTATE_BCOMP (1ULL << 0) /* boot complete */
268#define PDC_CHASSIS_SYSTATE_CHANGE (2ULL << 0) /* major change */
269#define PDC_CHASSIS_SYSTATE_LED (3ULL << 0) /* LED change */
270#define PDC_CHASSIS_SYSTATE_PANIC (9ULL << 0) /* OS Panic */
271#define PDC_CHASSIS_SYSTATE_DUMP (10ULL << 0) /* memory dump */
272#define PDC_CHASSIS_SYSTATE_HPMC (11ULL << 0) /* processing HPMC */
273#define PDC_CHASSIS_SYSTATE_HALT (15ULL << 0) /* system halted */
274
275/* Message ID */
276#define PDC_CHASSIS_MSG_ID (0ULL << 40) /* we do not handle msg IDs atm */
277
278/* EOM - separates log entries */
279#define PDC_CHASSIS_EOM_CLEAR (0ULL << 43)
280#define PDC_CHASSIS_EOM_SET (1ULL << 43)
281
282/*
283 * Preformated well known messages
284 */
285
286/* Boot started */
287#define PDC_CHASSIS_PMSG_BSTART (PDC_CHASSIS_ALERT_SERPROC | \
288 PDC_CHASSIS_SRC_PROC | \
289 PDC_CHASSIS_SRC_D_PROC | \
290 PDC_CHASSIS_SRC_ID_UNSPEC | \
291 PDC_CHASSIS_PB_D_PROC_NONE | \
292 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
293 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
294 PDC_CHASSIS_CALL_SACT_UNSPEC | \
295 PDC_CHASSIS_RET_HPUX | \
296 PDC_CHASSIS_REID_UNSPEC | \
297 PDC_CHASSIS_DT_STATE_CHG | \
298 PDC_CHASSIS_SYSTATE_BSTART | \
299 PDC_CHASSIS_MSG_ID | \
300 PDC_CHASSIS_EOM_SET )
301
302/* Boot complete */
303#define PDC_CHASSIS_PMSG_BCOMPLETE (PDC_CHASSIS_ALERT_SERPROC | \
304 PDC_CHASSIS_SRC_PROC | \
305 PDC_CHASSIS_SRC_D_PROC | \
306 PDC_CHASSIS_SRC_ID_UNSPEC | \
307 PDC_CHASSIS_PB_D_PROC_NONE | \
308 PDC_CHASSIS_CALL_ACT_HPUX_INIT | \
309 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
310 PDC_CHASSIS_CALL_SACT_UNSPEC | \
311 PDC_CHASSIS_RET_HPUX | \
312 PDC_CHASSIS_REID_UNSPEC | \
313 PDC_CHASSIS_DT_STATE_CHG | \
314 PDC_CHASSIS_SYSTATE_BCOMP | \
315 PDC_CHASSIS_MSG_ID | \
316 PDC_CHASSIS_EOM_SET )
317
318/* Shutdown */
319#define PDC_CHASSIS_PMSG_SHUTDOWN (PDC_CHASSIS_ALERT_SERPROC | \
320 PDC_CHASSIS_SRC_PROC | \
321 PDC_CHASSIS_SRC_D_PROC | \
322 PDC_CHASSIS_SRC_ID_UNSPEC | \
323 PDC_CHASSIS_PB_D_PROC_NONE | \
324 PDC_CHASSIS_CALL_ACT_HPUX_SHUT | \
325 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
326 PDC_CHASSIS_CALL_SACT_UNSPEC | \
327 PDC_CHASSIS_RET_HPUX | \
328 PDC_CHASSIS_REID_UNSPEC | \
329 PDC_CHASSIS_DT_STATE_CHG | \
330 PDC_CHASSIS_SYSTATE_HALT | \
331 PDC_CHASSIS_MSG_ID | \
332 PDC_CHASSIS_EOM_SET )
333
334/* Panic */
335#define PDC_CHASSIS_PMSG_PANIC (PDC_CHASSIS_ALERT_SOFT_FAIL | \
336 PDC_CHASSIS_SRC_PROC | \
337 PDC_CHASSIS_SRC_D_PROC | \
338 PDC_CHASSIS_SRC_ID_UNSPEC | \
339 PDC_CHASSIS_PB_D_PROC_NONE | \
340 PDC_CHASSIS_CALL_ACT_HPUX_PANIC| \
341 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
342 PDC_CHASSIS_CALL_SACT_UNSPEC | \
343 PDC_CHASSIS_RET_HPUX | \
344 PDC_CHASSIS_REID_UNSPEC | \
345 PDC_CHASSIS_DT_STATE_CHG | \
346 PDC_CHASSIS_SYSTATE_PANIC | \
347 PDC_CHASSIS_MSG_ID | \
348 PDC_CHASSIS_EOM_SET )
349
350// FIXME: extrapolated data
351/* HPMC */
352#define PDC_CHASSIS_PMSG_HPMC (PDC_CHASSIS_ALERT_CONF_CHG /*?*/ | \
353 PDC_CHASSIS_SRC_PROC | \
354 PDC_CHASSIS_SRC_D_PROC | \
355 PDC_CHASSIS_SRC_ID_UNSPEC | \
356 PDC_CHASSIS_PB_D_PROC_NONE | \
357 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
358 PDC_CHASSIS_RET_HPUX | \
359 PDC_CHASSIS_DT_STATE_CHG | \
360 PDC_CHASSIS_SYSTATE_HPMC | \
361 PDC_CHASSIS_MSG_ID | \
362 PDC_CHASSIS_EOM_SET )
363
364/* LPMC */
365#define PDC_CHASSIS_PMSG_LPMC (PDC_CHASSIS_ALERT_BLOCKED /*?*/| \
366 PDC_CHASSIS_SRC_PROC | \
367 PDC_CHASSIS_SRC_D_PROC | \
368 PDC_CHASSIS_SRC_ID_UNSPEC | \
369 PDC_CHASSIS_PB_D_PROC_NONE | \
370 PDC_CHASSIS_CALL_ACT_HPUX_WARN | \
371 PDC_CHASSIS_ACT_STATUS_UNSPEC | \
372 PDC_CHASSIS_CALL_SACT_UNSPEC | \
373 PDC_CHASSIS_RET_HPUX | \
374 PDC_CHASSIS_REID_UNSPEC | \
375 PDC_CHASSIS_DT_STATE_CHG | \
376 PDC_CHASSIS_SYSTATE_CHANGE | \
377 PDC_CHASSIS_MSG_ID | \
378 PDC_CHASSIS_EOM_SET )
379
380#endif /* _PARISC_PDC_CHASSIS_H */
381/* vim: set ts=8 */
diff --git a/arch/parisc/include/asm/pdcpat.h b/arch/parisc/include/asm/pdcpat.h
new file mode 100644
index 000000000000..47539f117958
--- /dev/null
+++ b/arch/parisc/include/asm/pdcpat.h
@@ -0,0 +1,308 @@
1#ifndef __PARISC_PATPDC_H
2#define __PARISC_PATPDC_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright 2000 (c) Hewlett Packard (Paul Bame <bame()spam.parisc-linux.org>)
10 * Copyright 2000,2004 (c) Grant Grundler <grundler()nahspam.parisc-linux.org>
11 */
12
13
14#define PDC_PAT_CELL 64L /* Interface for gaining and
15 * manipulatin g cell state within PD */
16#define PDC_PAT_CELL_GET_NUMBER 0L /* Return Cell number */
17#define PDC_PAT_CELL_GET_INFO 1L /* Returns info about Cell */
18#define PDC_PAT_CELL_MODULE 2L /* Returns info about Module */
19#define PDC_PAT_CELL_SET_ATTENTION 9L /* Set Cell Attention indicator */
20#define PDC_PAT_CELL_NUMBER_TO_LOC 10L /* Cell Number -> Location */
21#define PDC_PAT_CELL_WALK_FABRIC 11L /* Walk the Fabric */
22#define PDC_PAT_CELL_GET_RDT_SIZE 12L /* Return Route Distance Table Sizes */
23#define PDC_PAT_CELL_GET_RDT 13L /* Return Route Distance Tables */
24#define PDC_PAT_CELL_GET_LOCAL_PDH_SZ 14L /* Read Local PDH Buffer Size */
25#define PDC_PAT_CELL_SET_LOCAL_PDH 15L /* Write Local PDH Buffer */
26#define PDC_PAT_CELL_GET_REMOTE_PDH_SZ 16L /* Return Remote PDH Buffer Size */
27#define PDC_PAT_CELL_GET_REMOTE_PDH 17L /* Read Remote PDH Buffer */
28#define PDC_PAT_CELL_GET_DBG_INFO 128L /* Return DBG Buffer Info */
29#define PDC_PAT_CELL_CHANGE_ALIAS 129L /* Change Non-Equivalent Alias Chacking */
30
31
32/*
33** Arg to PDC_PAT_CELL_MODULE memaddr[4]
34**
35** Addresses on the Merced Bus != all Runway Bus addresses.
36** This is intended for programming SBA/LBA chips range registers.
37*/
38#define IO_VIEW 0UL
39#define PA_VIEW 1UL
40
41/* PDC_PAT_CELL_MODULE entity type values */
42#define PAT_ENTITY_CA 0 /* central agent */
43#define PAT_ENTITY_PROC 1 /* processor */
44#define PAT_ENTITY_MEM 2 /* memory controller */
45#define PAT_ENTITY_SBA 3 /* system bus adapter */
46#define PAT_ENTITY_LBA 4 /* local bus adapter */
47#define PAT_ENTITY_PBC 5 /* processor bus converter */
48#define PAT_ENTITY_XBC 6 /* crossbar fabric connect */
49#define PAT_ENTITY_RC 7 /* fabric interconnect */
50
51/* PDC_PAT_CELL_MODULE address range type values */
52#define PAT_PBNUM 0 /* PCI Bus Number */
53#define PAT_LMMIO 1 /* < 4G MMIO Space */
54#define PAT_GMMIO 2 /* > 4G MMIO Space */
55#define PAT_NPIOP 3 /* Non Postable I/O Port Space */
56#define PAT_PIOP 4 /* Postable I/O Port Space */
57#define PAT_AHPA 5 /* Addional HPA Space */
58#define PAT_UFO 6 /* HPA Space (UFO for Mariposa) */
59#define PAT_GNIP 7 /* GNI Reserved Space */
60
61
62
63/* PDC PAT CHASSIS LOG -- Platform logging & forward progress functions */
64
65#define PDC_PAT_CHASSIS_LOG 65L
66#define PDC_PAT_CHASSIS_WRITE_LOG 0L /* Write Log Entry */
67#define PDC_PAT_CHASSIS_READ_LOG 1L /* Read Log Entry */
68
69
70/* PDC PAT CPU -- CPU configuration within the protection domain */
71
72#define PDC_PAT_CPU 67L
73#define PDC_PAT_CPU_INFO 0L /* Return CPU config info */
74#define PDC_PAT_CPU_DELETE 1L /* Delete CPU */
75#define PDC_PAT_CPU_ADD 2L /* Add CPU */
76#define PDC_PAT_CPU_GET_NUMBER 3L /* Return CPU Number */
77#define PDC_PAT_CPU_GET_HPA 4L /* Return CPU HPA */
78#define PDC_PAT_CPU_STOP 5L /* Stop CPU */
79#define PDC_PAT_CPU_RENDEZVOUS 6L /* Rendezvous CPU */
80#define PDC_PAT_CPU_GET_CLOCK_INFO 7L /* Return CPU Clock info */
81#define PDC_PAT_CPU_GET_RENDEZVOUS_STATE 8L /* Return Rendezvous State */
82#define PDC_PAT_CPU_PLUNGE_FABRIC 128L /* Plunge Fabric */
83#define PDC_PAT_CPU_UPDATE_CACHE_CLEANSING 129L /* Manipulate Cache
84 * Cleansing Mode */
85/* PDC PAT EVENT -- Platform Events */
86
87#define PDC_PAT_EVENT 68L
88#define PDC_PAT_EVENT_GET_CAPS 0L /* Get Capabilities */
89#define PDC_PAT_EVENT_SET_MODE 1L /* Set Notification Mode */
90#define PDC_PAT_EVENT_SCAN 2L /* Scan Event */
91#define PDC_PAT_EVENT_HANDLE 3L /* Handle Event */
92#define PDC_PAT_EVENT_GET_NB_CALL 4L /* Get Non-Blocking call Args */
93
94/* PDC PAT HPMC -- Cause processor to go into spin loop, and wait
95 * for wake up from Monarch Processor.
96 */
97
98#define PDC_PAT_HPMC 70L
99#define PDC_PAT_HPMC_RENDEZ_CPU 0L /* go into spin loop */
100#define PDC_PAT_HPMC_SET_PARAMS 1L /* Allows OS to specify intr which PDC
101 * will use to interrupt OS during
102 * machine check rendezvous */
103
104/* parameters for PDC_PAT_HPMC_SET_PARAMS: */
105#define HPMC_SET_PARAMS_INTR 1L /* Rendezvous Interrupt */
106#define HPMC_SET_PARAMS_WAKE 2L /* Wake up processor */
107
108
109/* PDC PAT IO -- On-line services for I/O modules */
110
111#define PDC_PAT_IO 71L
112#define PDC_PAT_IO_GET_SLOT_STATUS 5L /* Get Slot Status Info*/
113#define PDC_PAT_IO_GET_LOC_FROM_HARDWARE 6L /* Get Physical Location from */
114 /* Hardware Path */
115#define PDC_PAT_IO_GET_HARDWARE_FROM_LOC 7L /* Get Hardware Path from
116 * Physical Location */
117#define PDC_PAT_IO_GET_PCI_CONFIG_FROM_HW 11L /* Get PCI Configuration
118 * Address from Hardware Path */
119#define PDC_PAT_IO_GET_HW_FROM_PCI_CONFIG 12L /* Get Hardware Path
120 * from PCI Configuration Address */
121#define PDC_PAT_IO_READ_HOST_BRIDGE_INFO 13L /* Read Host Bridge State Info */
122#define PDC_PAT_IO_CLEAR_HOST_BRIDGE_INFO 14L /* Clear Host Bridge State Info*/
123#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE_SIZE 15L /* Get PCI INT Routing Table
124 * Size */
125#define PDC_PAT_IO_GET_PCI_ROUTING_TABLE 16L /* Get PCI INT Routing Table */
126#define PDC_PAT_IO_GET_HINT_TABLE_SIZE 17L /* Get Hint Table Size */
127#define PDC_PAT_IO_GET_HINT_TABLE 18L /* Get Hint Table */
128#define PDC_PAT_IO_PCI_CONFIG_READ 19L /* PCI Config Read */
129#define PDC_PAT_IO_PCI_CONFIG_WRITE 20L /* PCI Config Write */
130#define PDC_PAT_IO_GET_NUM_IO_SLOTS 21L /* Get Number of I/O Bay Slots in
131 * Cabinet */
132#define PDC_PAT_IO_GET_LOC_IO_SLOTS 22L /* Get Physical Location of I/O */
133 /* Bay Slots in Cabinet */
134#define PDC_PAT_IO_BAY_STATUS_INFO 28L /* Get I/O Bay Slot Status Info */
135#define PDC_PAT_IO_GET_PROC_VIEW 29L /* Get Processor view of IO address */
136#define PDC_PAT_IO_PROG_SBA_DIR_RANGE 30L /* Program directed range */
137
138
139/* PDC PAT MEM -- Manage memory page deallocation */
140
141#define PDC_PAT_MEM 72L
142#define PDC_PAT_MEM_PD_INFO 0L /* Return PDT info for PD */
143#define PDC_PAT_MEM_PD_CLEAR 1L /* Clear PDT for PD */
144#define PDC_PAT_MEM_PD_READ 2L /* Read PDT entries for PD */
145#define PDC_PAT_MEM_PD_RESET 3L /* Reset clear bit for PD */
146#define PDC_PAT_MEM_CELL_INFO 5L /* Return PDT info For Cell */
147#define PDC_PAT_MEM_CELL_CLEAR 6L /* Clear PDT For Cell */
148#define PDC_PAT_MEM_CELL_READ 7L /* Read PDT entries For Cell */
149#define PDC_PAT_MEM_CELL_RESET 8L /* Reset clear bit For Cell */
150#define PDC_PAT_MEM_SETGM 9L /* Set Golden Memory value */
151#define PDC_PAT_MEM_ADD_PAGE 10L /* ADDs a page to the cell */
152#define PDC_PAT_MEM_ADDRESS 11L /* Get Physical Location From */
153 /* Memory Address */
154#define PDC_PAT_MEM_GET_TXT_SIZE 12L /* Get Formatted Text Size */
155#define PDC_PAT_MEM_GET_PD_TXT 13L /* Get PD Formatted Text */
156#define PDC_PAT_MEM_GET_CELL_TXT 14L /* Get Cell Formatted Text */
157#define PDC_PAT_MEM_RD_STATE_INFO 15L /* Read Mem Module State Info*/
158#define PDC_PAT_MEM_CLR_STATE_INFO 16L /*Clear Mem Module State Info*/
159#define PDC_PAT_MEM_CLEAN_RANGE 128L /*Clean Mem in specific range*/
160#define PDC_PAT_MEM_GET_TBL_SIZE 131L /* Get Memory Table Size */
161#define PDC_PAT_MEM_GET_TBL 132L /* Get Memory Table */
162
163
164/* PDC PAT NVOLATILE -- Access Non-Volatile Memory */
165
166#define PDC_PAT_NVOLATILE 73L
167#define PDC_PAT_NVOLATILE_READ 0L /* Read Non-Volatile Memory */
168#define PDC_PAT_NVOLATILE_WRITE 1L /* Write Non-Volatile Memory */
169#define PDC_PAT_NVOLATILE_GET_SIZE 2L /* Return size of NVM */
170#define PDC_PAT_NVOLATILE_VERIFY 3L /* Verify contents of NVM */
171#define PDC_PAT_NVOLATILE_INIT 4L /* Initialize NVM */
172
173/* PDC PAT PD */
174#define PDC_PAT_PD 74L /* Protection Domain Info */
175#define PDC_PAT_PD_GET_ADDR_MAP 0L /* Get Address Map */
176
177/* PDC_PAT_PD_GET_ADDR_MAP entry types */
178#define PAT_MEMORY_DESCRIPTOR 1
179
180/* PDC_PAT_PD_GET_ADDR_MAP memory types */
181#define PAT_MEMTYPE_MEMORY 0
182#define PAT_MEMTYPE_FIRMWARE 4
183
184/* PDC_PAT_PD_GET_ADDR_MAP memory usage */
185#define PAT_MEMUSE_GENERAL 0
186#define PAT_MEMUSE_GI 128
187#define PAT_MEMUSE_GNI 129
188
189
190#ifndef __ASSEMBLY__
191#include <linux/types.h>
192
193#ifdef CONFIG_64BIT
194#define is_pdc_pat() (PDC_TYPE_PAT == pdc_type)
195extern int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num);
196extern int pdc_pat_get_irt(void *r_addr, unsigned long cell_num);
197#else /* ! CONFIG_64BIT */
198/* No PAT support for 32-bit kernels...sorry */
199#define is_pdc_pat() (0)
200#define pdc_pat_get_irt_size(num_entries, cell_numn) PDC_BAD_PROC
201#define pdc_pat_get_irt(r_addr, cell_num) PDC_BAD_PROC
202#endif /* ! CONFIG_64BIT */
203
204
205struct pdc_pat_cell_num {
206 unsigned long cell_num;
207 unsigned long cell_loc;
208};
209
210struct pdc_pat_cpu_num {
211 unsigned long cpu_num;
212 unsigned long cpu_loc;
213};
214
215struct pdc_pat_pd_addr_map_entry {
216 unsigned char entry_type; /* 1 = Memory Descriptor Entry Type */
217 unsigned char reserve1[5];
218 unsigned char memory_type;
219 unsigned char memory_usage;
220 unsigned long paddr;
221 unsigned int pages; /* Length in 4K pages */
222 unsigned int reserve2;
223 unsigned long cell_map;
224};
225
226/********************************************************************
227* PDC_PAT_CELL[Return Cell Module] memaddr[0] conf_base_addr
228* ----------------------------------------------------------
229* Bit 0 to 51 - conf_base_addr
230* Bit 52 to 62 - reserved
231* Bit 63 - endianess bit
232********************************************************************/
233#define PAT_GET_CBA(value) ((value) & 0xfffffffffffff000UL)
234
235/********************************************************************
236* PDC_PAT_CELL[Return Cell Module] memaddr[1] mod_info
237* ----------------------------------------------------
238* Bit 0 to 7 - entity type
239* 0 = central agent, 1 = processor,
240* 2 = memory controller, 3 = system bus adapter,
241* 4 = local bus adapter, 5 = processor bus converter,
242* 6 = crossbar fabric connect, 7 = fabric interconnect,
243* 8 to 254 reserved, 255 = unknown.
244* Bit 8 to 15 - DVI
245* Bit 16 to 23 - IOC functions
246* Bit 24 to 39 - reserved
247* Bit 40 to 63 - mod_pages
248* number of 4K pages a module occupies starting at conf_base_addr
249********************************************************************/
250#define PAT_GET_ENTITY(value) (((value) >> 56) & 0xffUL)
251#define PAT_GET_DVI(value) (((value) >> 48) & 0xffUL)
252#define PAT_GET_IOC(value) (((value) >> 40) & 0xffUL)
253#define PAT_GET_MOD_PAGES(value) ((value) & 0xffffffUL)
254
255
256/*
257** PDC_PAT_CELL_GET_INFO return block
258*/
259typedef struct pdc_pat_cell_info_rtn_block {
260 unsigned long cpu_info;
261 unsigned long cell_info;
262 unsigned long cell_location;
263 unsigned long reo_location;
264 unsigned long mem_size;
265 unsigned long dimm_status;
266 unsigned long pdc_rev;
267 unsigned long fabric_info0;
268 unsigned long fabric_info1;
269 unsigned long fabric_info2;
270 unsigned long fabric_info3;
271 unsigned long reserved[21];
272} pdc_pat_cell_info_rtn_block_t;
273
274
275/* FIXME: mod[508] should really be a union of the various mod components */
276struct pdc_pat_cell_mod_maddr_block { /* PDC_PAT_CELL_MODULE */
277 unsigned long cba; /* func 0 cfg space address */
278 unsigned long mod_info; /* module information */
279 unsigned long mod_location; /* physical location of the module */
280 struct hardware_path mod_path; /* module path (device path - layers) */
281 unsigned long mod[508]; /* PAT cell module components */
282} __attribute__((aligned(8))) ;
283
284typedef struct pdc_pat_cell_mod_maddr_block pdc_pat_cell_mod_maddr_block_t;
285
286
287extern int pdc_pat_chassis_send_log(unsigned long status, unsigned long data);
288extern int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info);
289extern int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod, unsigned long view_type, void *mem_addr);
290extern int pdc_pat_cell_num_to_loc(void *, unsigned long);
291
292extern int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa);
293
294extern int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr, unsigned long count, unsigned long offset);
295
296
297extern int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, u32 *val);
298extern int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 val);
299
300
301/* Flag to indicate this is a PAT box...don't use this unless you
302** really have to...it might go away some day.
303*/
304extern int pdc_pat; /* arch/parisc/kernel/inventory.c */
305
306#endif /* __ASSEMBLY__ */
307
308#endif /* ! __PARISC_PATPDC_H */
diff --git a/arch/parisc/include/asm/percpu.h b/arch/parisc/include/asm/percpu.h
new file mode 100644
index 000000000000..a0dcd1970128
--- /dev/null
+++ b/arch/parisc/include/asm/percpu.h
@@ -0,0 +1,7 @@
1#ifndef _PARISC_PERCPU_H
2#define _PARISC_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif
7
diff --git a/arch/parisc/include/asm/perf.h b/arch/parisc/include/asm/perf.h
new file mode 100644
index 000000000000..a18e11972c09
--- /dev/null
+++ b/arch/parisc/include/asm/perf.h
@@ -0,0 +1,74 @@
1#ifndef _ASM_PERF_H_
2#define _ASM_PERF_H_
3
4/* ioctls */
5#define PA_PERF_ON _IO('p', 1)
6#define PA_PERF_OFF _IOR('p', 2, unsigned int)
7#define PA_PERF_VERSION _IOR('p', 3, int)
8
9#define PA_PERF_DEV "perf"
10#define PA_PERF_MINOR 146
11
12/* Interface types */
13#define UNKNOWN_INTF 255
14#define ONYX_INTF 0
15#define CUDA_INTF 1
16
17/* Common Onyx and Cuda images */
18#define CPI 0
19#define BUSUTIL 1
20#define TLBMISS 2
21#define TLBHANDMISS 3
22#define PTKN 4
23#define PNTKN 5
24#define IMISS 6
25#define DMISS 7
26#define DMISS_ACCESS 8
27#define BIG_CPI 9
28#define BIG_LS 10
29#define BR_ABORT 11
30#define ISNT 12
31#define QUADRANT 13
32#define RW_PDFET 14
33#define RW_WDFET 15
34#define SHLIB_CPI 16
35
36/* Cuda only Images */
37#define FLOPS 17
38#define CACHEMISS 18
39#define BRANCHES 19
40#define CRSTACK 20
41#define I_CACHE_SPEC 21
42#define MAX_CUDA_IMAGES 22
43
44/* Onyx only Images */
45#define ADDR_INV_ABORT_ALU 17
46#define BRAD_STALL 18
47#define CNTL_IN_PIPEL 19
48#define DSNT_XFH 20
49#define FET_SIG1 21
50#define FET_SIG2 22
51#define G7_1 23
52#define G7_2 24
53#define G7_3 25
54#define G7_4 26
55#define MPB_LABORT 27
56#define PANIC 28
57#define RARE_INST 29
58#define RW_DFET 30
59#define RW_IFET 31
60#define RW_SDFET 32
61#define SPEC_IFET 33
62#define ST_COND0 34
63#define ST_COND1 35
64#define ST_COND2 36
65#define ST_COND3 37
66#define ST_COND4 38
67#define ST_UNPRED0 39
68#define ST_UNPRED1 40
69#define UNPRED 41
70#define GO_STORE 42
71#define SHLIB_CALL 43
72#define MAX_ONYX_IMAGES 44
73
74#endif
diff --git a/arch/parisc/include/asm/pgalloc.h b/arch/parisc/include/asm/pgalloc.h
new file mode 100644
index 000000000000..fc987a1c12a8
--- /dev/null
+++ b/arch/parisc/include/asm/pgalloc.h
@@ -0,0 +1,149 @@
1#ifndef _ASM_PGALLOC_H
2#define _ASM_PGALLOC_H
3
4#include <linux/gfp.h>
5#include <linux/mm.h>
6#include <linux/threads.h>
7#include <asm/processor.h>
8#include <asm/fixmap.h>
9
10#include <asm/cache.h>
11
12/* Allocate the top level pgd (page directory)
13 *
14 * Here (for 64 bit kernels) we implement a Hybrid L2/L3 scheme: we
15 * allocate the first pmd adjacent to the pgd. This means that we can
16 * subtract a constant offset to get to it. The pmd and pgd sizes are
17 * arranged so that a single pmd covers 4GB (giving a full 64-bit
18 * process access to 8TB) so our lookups are effectively L2 for the
19 * first 4GB of the kernel (i.e. for all ILP32 processes and all the
20 * kernel for machines with under 4GB of memory) */
21static inline pgd_t *pgd_alloc(struct mm_struct *mm)
22{
23 pgd_t *pgd = (pgd_t *)__get_free_pages(GFP_KERNEL,
24 PGD_ALLOC_ORDER);
25 pgd_t *actual_pgd = pgd;
26
27 if (likely(pgd != NULL)) {
28 memset(pgd, 0, PAGE_SIZE<<PGD_ALLOC_ORDER);
29#ifdef CONFIG_64BIT
30 actual_pgd += PTRS_PER_PGD;
31 /* Populate first pmd with allocated memory. We mark it
32 * with PxD_FLAG_ATTACHED as a signal to the system that this
33 * pmd entry may not be cleared. */
34 __pgd_val_set(*actual_pgd, (PxD_FLAG_PRESENT |
35 PxD_FLAG_VALID |
36 PxD_FLAG_ATTACHED)
37 + (__u32)(__pa((unsigned long)pgd) >> PxD_VALUE_SHIFT));
38 /* The first pmd entry also is marked with _PAGE_GATEWAY as
39 * a signal that this pmd may not be freed */
40 __pgd_val_set(*pgd, PxD_FLAG_ATTACHED);
41#endif
42 }
43 return actual_pgd;
44}
45
46static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
47{
48#ifdef CONFIG_64BIT
49 pgd -= PTRS_PER_PGD;
50#endif
51 free_pages((unsigned long)pgd, PGD_ALLOC_ORDER);
52}
53
54#if PT_NLEVELS == 3
55
56/* Three Level Page Table Support for pmd's */
57
58static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pmd_t *pmd)
59{
60 __pgd_val_set(*pgd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID) +
61 (__u32)(__pa((unsigned long)pmd) >> PxD_VALUE_SHIFT));
62}
63
64static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
65{
66 pmd_t *pmd = (pmd_t *)__get_free_pages(GFP_KERNEL|__GFP_REPEAT,
67 PMD_ORDER);
68 if (pmd)
69 memset(pmd, 0, PAGE_SIZE<<PMD_ORDER);
70 return pmd;
71}
72
73static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
74{
75#ifdef CONFIG_64BIT
76 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
77 /* This is the permanent pmd attached to the pgd;
78 * cannot free it */
79 return;
80#endif
81 free_pages((unsigned long)pmd, PMD_ORDER);
82}
83
84#else
85
86/* Two Level Page Table Support for pmd's */
87
88/*
89 * allocating and freeing a pmd is trivial: the 1-entry pmd is
90 * inside the pgd, so has no extra memory associated with it.
91 */
92
93#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
94#define pmd_free(mm, x) do { } while (0)
95#define pgd_populate(mm, pmd, pte) BUG()
96
97#endif
98
99static inline void
100pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, pte_t *pte)
101{
102#ifdef CONFIG_64BIT
103 /* preserve the gateway marker if this is the beginning of
104 * the permanent pmd */
105 if(pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
106 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT |
107 PxD_FLAG_VALID |
108 PxD_FLAG_ATTACHED)
109 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
110 else
111#endif
112 __pmd_val_set(*pmd, (PxD_FLAG_PRESENT | PxD_FLAG_VALID)
113 + (__u32)(__pa((unsigned long)pte) >> PxD_VALUE_SHIFT));
114}
115
116#define pmd_populate(mm, pmd, pte_page) \
117 pmd_populate_kernel(mm, pmd, page_address(pte_page))
118#define pmd_pgtable(pmd) pmd_page(pmd)
119
120static inline pgtable_t
121pte_alloc_one(struct mm_struct *mm, unsigned long address)
122{
123 struct page *page = alloc_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
124 if (page)
125 pgtable_page_ctor(page);
126 return page;
127}
128
129static inline pte_t *
130pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
131{
132 pte_t *pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
133 return pte;
134}
135
136static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
137{
138 free_page((unsigned long)pte);
139}
140
141static inline void pte_free(struct mm_struct *mm, struct page *pte)
142{
143 pgtable_page_dtor(pte);
144 pte_free_kernel(mm, page_address(pte));
145}
146
147#define check_pgt_cache() do { } while (0)
148
149#endif
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
new file mode 100644
index 000000000000..470a4b88124d
--- /dev/null
+++ b/arch/parisc/include/asm/pgtable.h
@@ -0,0 +1,508 @@
1#ifndef _PARISC_PGTABLE_H
2#define _PARISC_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
6#include <asm/fixmap.h>
7
8#ifndef __ASSEMBLY__
9/*
10 * we simulate an x86-style page table for the linux mm code
11 */
12
13#include <linux/mm.h> /* for vm_area_struct */
14#include <linux/bitops.h>
15#include <asm/processor.h>
16#include <asm/cache.h>
17
18/*
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >=
21 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
22 * require a hash-, or multi-level tree-lookup or something of that
23 * sort) but it guarantees to return TRUE only if accessing the page
24 * at that address does not cause an error. Note that there may be
25 * addresses for which kern_addr_valid() returns FALSE even though an
26 * access would not cause an error (e.g., this is typically true for
27 * memory mapped I/O regions.
28 *
29 * XXX Need to implement this for parisc.
30 */
31#define kern_addr_valid(addr) (1)
32
33/* Certain architectures need to do special things when PTEs
34 * within a page table are directly modified. Thus, the following
35 * hook is made available.
36 */
37#define set_pte(pteptr, pteval) \
38 do{ \
39 *(pteptr) = (pteval); \
40 } while(0)
41#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
42
43#endif /* !__ASSEMBLY__ */
44
45#define pte_ERROR(e) \
46 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
47#define pmd_ERROR(e) \
48 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
49#define pgd_ERROR(e) \
50 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
51
52/* This is the size of the initially mapped kernel memory */
53#ifdef CONFIG_64BIT
54#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
55#else
56#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */
57#endif
58#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
59
60#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
61#define PT_NLEVELS 3
62#define PGD_ORDER 1 /* Number of pages per pgd */
63#define PMD_ORDER 1 /* Number of pages per pmd */
64#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
65#else
66#define PT_NLEVELS 2
67#define PGD_ORDER 1 /* Number of pages per pgd */
68#define PGD_ALLOC_ORDER PGD_ORDER
69#endif
70
71/* Definitions for 3rd level (we use PLD here for Page Lower directory
72 * because PTE_SHIFT is used lower down to mean shift that has to be
73 * done to get usable bits out of the PTE) */
74#define PLD_SHIFT PAGE_SHIFT
75#define PLD_SIZE PAGE_SIZE
76#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
77#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
78
79/* Definitions for 2nd level */
80#define pgtable_cache_init() do { } while (0)
81
82#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
83#define PMD_SIZE (1UL << PMD_SHIFT)
84#define PMD_MASK (~(PMD_SIZE-1))
85#if PT_NLEVELS == 3
86#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
87#else
88#define BITS_PER_PMD 0
89#endif
90#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
91
92/* Definitions for 1st level */
93#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
94#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
95#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
96#define PGDIR_MASK (~(PGDIR_SIZE-1))
97#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
98#define USER_PTRS_PER_PGD PTRS_PER_PGD
99
100#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
101#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
102
103#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
104
105/* This calculates the number of initial pages we need for the initial
106 * page tables */
107#if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
108# define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
109#else
110# define PT_INITIAL (1) /* all initial PTEs fit into one page */
111#endif
112
113/*
114 * pgd entries used up by user/kernel:
115 */
116
117#define FIRST_USER_ADDRESS 0
118
119/* NB: The tlb miss handlers make certain assumptions about the order */
120/* of the following bits, so be careful (One example, bits 25-31 */
121/* are moved together in one instruction). */
122
123#define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
124#define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
125#define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
126#define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
127#define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
128#define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
129#define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
130#define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
131#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
132#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
133#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
134#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
135 /* for cache flushing only */
136#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
137
138/* N.B. The bits are defined in terms of a 32 bit word above, so the */
139/* following macro is ok for both 32 and 64 bit. */
140
141#define xlate_pabit(x) (31 - x)
142
143/* this defines the shift to the usable bits in the PTE it is set so
144 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
145 * to zero */
146#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
147
148/* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
149#define PFN_PTE_SHIFT 12
150
151
152/* this is how many bits may be used by the file functions */
153#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
154
155#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
156#define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
157
158#define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
159#define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
160#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
161#define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
162#define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
163#define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
164#define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
165#define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
166#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
167#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
168#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
169#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
170#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
171#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
172
173#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
174#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
175#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
176
177/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
178 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
179 * for a few meta-information bits, so we shift the address to be
180 * able to effectively address 40/42/44-bits of physical address space
181 * depending on 4k/16k/64k PAGE_SIZE */
182#define _PxD_PRESENT_BIT 31
183#define _PxD_ATTACHED_BIT 30
184#define _PxD_VALID_BIT 29
185
186#define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
187#define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
188#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
189#define PxD_FLAG_MASK (0xf)
190#define PxD_FLAG_SHIFT (4)
191#define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
192
193#ifndef __ASSEMBLY__
194
195#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
196#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
197/* Others seem to make this executable, I don't know if that's correct
198 or not. The stack is mapped this way though so this is necessary
199 in the short term - dhd@linuxcare.com, 2000-08-08 */
200#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
201#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
202#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
203#define PAGE_COPY PAGE_EXECREAD
204#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
205#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
206#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
207#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
208#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
209#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
210
211
212/*
213 * We could have an execute only page using "gateway - promote to priv
214 * level 3", but that is kind of silly. So, the way things are defined
215 * now, we must always have read permission for pages with execute
216 * permission. For the fun of it we'll go ahead and support write only
217 * pages.
218 */
219
220 /*xwr*/
221#define __P000 PAGE_NONE
222#define __P001 PAGE_READONLY
223#define __P010 __P000 /* copy on write */
224#define __P011 __P001 /* copy on write */
225#define __P100 PAGE_EXECREAD
226#define __P101 PAGE_EXECREAD
227#define __P110 __P100 /* copy on write */
228#define __P111 __P101 /* copy on write */
229
230#define __S000 PAGE_NONE
231#define __S001 PAGE_READONLY
232#define __S010 PAGE_WRITEONLY
233#define __S011 PAGE_SHARED
234#define __S100 PAGE_EXECREAD
235#define __S101 PAGE_EXECREAD
236#define __S110 PAGE_RWX
237#define __S111 PAGE_RWX
238
239
240extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
241
242/* initial page tables for 0-8MB for kernel */
243
244extern pte_t pg0[];
245
246/* zero page used for uninitialized stuff */
247
248extern unsigned long *empty_zero_page;
249
250/*
251 * ZERO_PAGE is a global shared page that is always zero: used
252 * for zero-mapped memory areas etc..
253 */
254
255#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
256
257#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
258#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
259#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
260
261#define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
262#define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
263#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
264#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
265
266#if PT_NLEVELS == 3
267/* The first entry of the permanent pmd is not there if it contains
268 * the gateway marker */
269#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
270#else
271#define pmd_none(x) (!pmd_val(x))
272#endif
273#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
274#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
275static inline void pmd_clear(pmd_t *pmd) {
276#if PT_NLEVELS == 3
277 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
278 /* This is the entry pointing to the permanent pmd
279 * attached to the pgd; cannot clear it */
280 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
281 else
282#endif
283 __pmd_val_set(*pmd, 0);
284}
285
286
287
288#if PT_NLEVELS == 3
289#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
290#define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd))
291
292/* For 64 bit we have three level tables */
293
294#define pgd_none(x) (!pgd_val(x))
295#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
296#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
297static inline void pgd_clear(pgd_t *pgd) {
298#if PT_NLEVELS == 3
299 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
300 /* This is the permanent pmd attached to the pgd; cannot
301 * free it */
302 return;
303#endif
304 __pgd_val_set(*pgd, 0);
305}
306#else
307/*
308 * The "pgd_xxx()" functions here are trivial for a folded two-level
309 * setup: the pgd is never bad, and a pmd always exists (as it's folded
310 * into the pgd entry)
311 */
312static inline int pgd_none(pgd_t pgd) { return 0; }
313static inline int pgd_bad(pgd_t pgd) { return 0; }
314static inline int pgd_present(pgd_t pgd) { return 1; }
315static inline void pgd_clear(pgd_t * pgdp) { }
316#endif
317
318/*
319 * The following only work if pte_present() is true.
320 * Undefined behaviour if not..
321 */
322static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
323static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
324static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
325static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
326static inline int pte_special(pte_t pte) { return 0; }
327
328static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
329static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
330static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
331static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
332static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
333static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
334static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
335
336/*
337 * Conversion functions: convert a page and protection to a page entry,
338 * and a page entry and page directory to the page they refer to.
339 */
340#define __mk_pte(addr,pgprot) \
341({ \
342 pte_t __pte; \
343 \
344 pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \
345 \
346 __pte; \
347})
348
349#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
350
351static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
352{
353 pte_t pte;
354 pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
355 return pte;
356}
357
358static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
359{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
360
361/* Permanent address of a page. On parisc we don't have highmem. */
362
363#define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
364
365#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
366
367#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_address(pmd)))
368
369#define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
370#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
371
372#define pgd_index(address) ((address) >> PGDIR_SHIFT)
373
374/* to find an entry in a page-table-directory */
375#define pgd_offset(mm, address) \
376((mm)->pgd + ((address) >> PGDIR_SHIFT))
377
378/* to find an entry in a kernel page-table-directory */
379#define pgd_offset_k(address) pgd_offset(&init_mm, address)
380
381/* Find an entry in the second-level page table.. */
382
383#if PT_NLEVELS == 3
384#define pmd_offset(dir,address) \
385((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
386#else
387#define pmd_offset(dir,addr) ((pmd_t *) dir)
388#endif
389
390/* Find an entry in the third-level page table.. */
391#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
392#define pte_offset_kernel(pmd, address) \
393 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
394#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
395#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
396#define pte_unmap(pte) do { } while (0)
397#define pte_unmap_nested(pte) do { } while (0)
398
399#define pte_unmap(pte) do { } while (0)
400#define pte_unmap_nested(pte) do { } while (0)
401
402extern void paging_init (void);
403
404/* Used for deferring calls to flush_dcache_page() */
405
406#define PG_dcache_dirty PG_arch_1
407
408extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
409
410/* Encode and de-code a swap entry */
411
412#define __swp_type(x) ((x).val & 0x1f)
413#define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
414 (((x).val >> 8) & ~0x7) )
415#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
416 ((offset & 0x7) << 6) | \
417 ((offset & ~0x7) << 8) })
418#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
419#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
420
421static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
422{
423#ifdef CONFIG_SMP
424 if (!pte_young(*ptep))
425 return 0;
426 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
427#else
428 pte_t pte = *ptep;
429 if (!pte_young(pte))
430 return 0;
431 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
432 return 1;
433#endif
434}
435
436extern spinlock_t pa_dbit_lock;
437
438struct mm_struct;
439static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
440{
441 pte_t old_pte;
442 pte_t pte;
443
444 spin_lock(&pa_dbit_lock);
445 pte = old_pte = *ptep;
446 pte_val(pte) &= ~_PAGE_PRESENT;
447 pte_val(pte) |= _PAGE_FLUSH;
448 set_pte_at(mm,addr,ptep,pte);
449 spin_unlock(&pa_dbit_lock);
450
451 return old_pte;
452}
453
454static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
455{
456#ifdef CONFIG_SMP
457 unsigned long new, old;
458
459 do {
460 old = pte_val(*ptep);
461 new = pte_val(pte_wrprotect(__pte (old)));
462 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
463#else
464 pte_t old_pte = *ptep;
465 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
466#endif
467}
468
469#define pte_same(A,B) (pte_val(A) == pte_val(B))
470
471#endif /* !__ASSEMBLY__ */
472
473
474/* TLB page size encoding - see table 3-1 in parisc20.pdf */
475#define _PAGE_SIZE_ENCODING_4K 0
476#define _PAGE_SIZE_ENCODING_16K 1
477#define _PAGE_SIZE_ENCODING_64K 2
478#define _PAGE_SIZE_ENCODING_256K 3
479#define _PAGE_SIZE_ENCODING_1M 4
480#define _PAGE_SIZE_ENCODING_4M 5
481#define _PAGE_SIZE_ENCODING_16M 6
482#define _PAGE_SIZE_ENCODING_64M 7
483
484#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
485# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
486#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
487# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
488#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
489# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
490#endif
491
492
493#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
494 remap_pfn_range(vma, vaddr, pfn, size, prot)
495
496#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
497
498/* We provide our own get_unmapped_area to provide cache coherency */
499
500#define HAVE_ARCH_UNMAPPED_AREA
501
502#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
503#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
504#define __HAVE_ARCH_PTEP_SET_WRPROTECT
505#define __HAVE_ARCH_PTE_SAME
506#include <asm-generic/pgtable.h>
507
508#endif /* _PARISC_PGTABLE_H */
diff --git a/arch/parisc/include/asm/poll.h b/arch/parisc/include/asm/poll.h
new file mode 100644
index 000000000000..c98509d3149e
--- /dev/null
+++ b/arch/parisc/include/asm/poll.h
@@ -0,0 +1 @@
#include <asm-generic/poll.h>
diff --git a/arch/parisc/include/asm/posix_types.h b/arch/parisc/include/asm/posix_types.h
new file mode 100644
index 000000000000..bb725a6630bb
--- /dev/null
+++ b/arch/parisc/include/asm/posix_types.h
@@ -0,0 +1,129 @@
1#ifndef __ARCH_PARISC_POSIX_TYPES_H
2#define __ARCH_PARISC_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9typedef unsigned long __kernel_ino_t;
10typedef unsigned short __kernel_mode_t;
11typedef unsigned short __kernel_nlink_t;
12typedef long __kernel_off_t;
13typedef int __kernel_pid_t;
14typedef unsigned short __kernel_ipc_pid_t;
15typedef unsigned int __kernel_uid_t;
16typedef unsigned int __kernel_gid_t;
17typedef int __kernel_suseconds_t;
18typedef long __kernel_clock_t;
19typedef int __kernel_timer_t;
20typedef int __kernel_clockid_t;
21typedef int __kernel_daddr_t;
22/* Note these change from narrow to wide kernels */
23#ifdef CONFIG_64BIT
24typedef unsigned long __kernel_size_t;
25typedef long __kernel_ssize_t;
26typedef long __kernel_ptrdiff_t;
27typedef long __kernel_time_t;
28#else
29typedef unsigned int __kernel_size_t;
30typedef int __kernel_ssize_t;
31typedef int __kernel_ptrdiff_t;
32typedef long __kernel_time_t;
33#endif
34typedef char * __kernel_caddr_t;
35
36typedef unsigned short __kernel_uid16_t;
37typedef unsigned short __kernel_gid16_t;
38typedef unsigned int __kernel_uid32_t;
39typedef unsigned int __kernel_gid32_t;
40
41#ifdef __GNUC__
42typedef long long __kernel_loff_t;
43typedef long long __kernel_off64_t;
44typedef unsigned long long __kernel_ino64_t;
45#endif
46
47typedef unsigned int __kernel_old_dev_t;
48
49typedef struct {
50 int val[2];
51} __kernel_fsid_t;
52
53/* compatibility stuff */
54typedef __kernel_uid_t __kernel_old_uid_t;
55typedef __kernel_gid_t __kernel_old_gid_t;
56
57#if defined(__KERNEL__)
58
59#undef __FD_SET
60static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
61{
62 unsigned long __tmp = __fd / __NFDBITS;
63 unsigned long __rem = __fd % __NFDBITS;
64 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
65}
66
67#undef __FD_CLR
68static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
69{
70 unsigned long __tmp = __fd / __NFDBITS;
71 unsigned long __rem = __fd % __NFDBITS;
72 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
73}
74
75#undef __FD_ISSET
76static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
77{
78 unsigned long __tmp = __fd / __NFDBITS;
79 unsigned long __rem = __fd % __NFDBITS;
80 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
81}
82
83/*
84 * This will unroll the loop for the normal constant case (8 ints,
85 * for a 256-bit fd_set)
86 */
87#undef __FD_ZERO
88static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
89{
90 unsigned long *__tmp = __p->fds_bits;
91 int __i;
92
93 if (__builtin_constant_p(__FDSET_LONGS)) {
94 switch (__FDSET_LONGS) {
95 case 16:
96 __tmp[ 0] = 0; __tmp[ 1] = 0;
97 __tmp[ 2] = 0; __tmp[ 3] = 0;
98 __tmp[ 4] = 0; __tmp[ 5] = 0;
99 __tmp[ 6] = 0; __tmp[ 7] = 0;
100 __tmp[ 8] = 0; __tmp[ 9] = 0;
101 __tmp[10] = 0; __tmp[11] = 0;
102 __tmp[12] = 0; __tmp[13] = 0;
103 __tmp[14] = 0; __tmp[15] = 0;
104 return;
105
106 case 8:
107 __tmp[ 0] = 0; __tmp[ 1] = 0;
108 __tmp[ 2] = 0; __tmp[ 3] = 0;
109 __tmp[ 4] = 0; __tmp[ 5] = 0;
110 __tmp[ 6] = 0; __tmp[ 7] = 0;
111 return;
112
113 case 4:
114 __tmp[ 0] = 0; __tmp[ 1] = 0;
115 __tmp[ 2] = 0; __tmp[ 3] = 0;
116 return;
117 }
118 }
119 __i = __FDSET_LONGS;
120 while (__i) {
121 __i--;
122 *__tmp = 0;
123 __tmp++;
124 }
125}
126
127#endif /* defined(__KERNEL__) */
128
129#endif
diff --git a/arch/parisc/include/asm/prefetch.h b/arch/parisc/include/asm/prefetch.h
new file mode 100644
index 000000000000..c5edc60c059f
--- /dev/null
+++ b/arch/parisc/include/asm/prefetch.h
@@ -0,0 +1,39 @@
1/*
2 * include/asm-parisc/prefetch.h
3 *
4 * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book.
5 * In addition, many implementations do hardware prefetching of both
6 * instructions and data.
7 *
8 * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load
9 * to gr0 but not in a way that Linux can use. If the load would cause an
10 * interruption (eg due to prefetching 0), it is suppressed on PA2.0
11 * processors, but not on 7300LC.
12 *
13 */
14
15#ifndef __ASM_PARISC_PREFETCH_H
16#define __ASM_PARISC_PREFETCH_H
17
18#ifndef __ASSEMBLY__
19#ifdef CONFIG_PREFETCH
20
21#define ARCH_HAS_PREFETCH
22static inline void prefetch(const void *addr)
23{
24 __asm__("ldw 0(%0), %%r0" : : "r" (addr));
25}
26
27/* LDD is a PA2.0 addition. */
28#ifdef CONFIG_PA20
29#define ARCH_HAS_PREFETCHW
30static inline void prefetchw(const void *addr)
31{
32 __asm__("ldd 0(%0), %%r0" : : "r" (addr));
33}
34#endif /* CONFIG_PA20 */
35
36#endif /* CONFIG_PREFETCH */
37#endif /* __ASSEMBLY__ */
38
39#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h
new file mode 100644
index 000000000000..3c9d34844c83
--- /dev/null
+++ b/arch/parisc/include/asm/processor.h
@@ -0,0 +1,357 @@
1/*
2 * include/asm-parisc/processor.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2001 Grant Grundler
6 */
7
8#ifndef __ASM_PARISC_PROCESSOR_H
9#define __ASM_PARISC_PROCESSOR_H
10
11#ifndef __ASSEMBLY__
12#include <linux/threads.h>
13
14#include <asm/prefetch.h>
15#include <asm/hardware.h>
16#include <asm/pdc.h>
17#include <asm/ptrace.h>
18#include <asm/types.h>
19#include <asm/system.h>
20#endif /* __ASSEMBLY__ */
21
22#define KERNEL_STACK_SIZE (4*PAGE_SIZE)
23
24/*
25 * Default implementation of macro that returns current
26 * instruction pointer ("program counter").
27 */
28#ifdef CONFIG_PA20
29#define current_ia(x) __asm__("mfia %0" : "=r"(x))
30#else /* mfia added in pa2.0 */
31#define current_ia(x) __asm__("blr 0,%0\n\tnop" : "=r"(x))
32#endif
33#define current_text_addr() ({ void *pc; current_ia(pc); pc; })
34
35#define TASK_SIZE_OF(tsk) ((tsk)->thread.task_size)
36#define TASK_SIZE TASK_SIZE_OF(current)
37#define TASK_UNMAPPED_BASE (current->thread.map_base)
38
39#define DEFAULT_TASK_SIZE32 (0xFFF00000UL)
40#define DEFAULT_MAP_BASE32 (0x40000000UL)
41
42#ifdef CONFIG_64BIT
43#define DEFAULT_TASK_SIZE (MAX_ADDRESS-0xf000000)
44#define DEFAULT_MAP_BASE (0x200000000UL)
45#else
46#define DEFAULT_TASK_SIZE DEFAULT_TASK_SIZE32
47#define DEFAULT_MAP_BASE DEFAULT_MAP_BASE32
48#endif
49
50#ifdef __KERNEL__
51
52/* XXX: STACK_TOP actually should be STACK_BOTTOM for parisc.
53 * prumpf */
54
55#define STACK_TOP TASK_SIZE
56#define STACK_TOP_MAX DEFAULT_TASK_SIZE
57
58#endif
59
60#ifndef __ASSEMBLY__
61
62/*
63 * Data detected about CPUs at boot time which is the same for all CPU's.
64 * HP boxes are SMP - ie identical processors.
65 *
66 * FIXME: some CPU rev info may be processor specific...
67 */
68struct system_cpuinfo_parisc {
69 unsigned int cpu_count;
70 unsigned int cpu_hz;
71 unsigned int hversion;
72 unsigned int sversion;
73 enum cpu_type cpu_type;
74
75 struct {
76 struct pdc_model model;
77 unsigned long versions;
78 unsigned long cpuid;
79 unsigned long capabilities;
80 char sys_model_name[81]; /* PDC-ROM returnes this model name */
81 } pdc;
82
83 const char *cpu_name; /* e.g. "PA7300LC (PCX-L2)" */
84 const char *family_name; /* e.g. "1.1e" */
85};
86
87
88/* Per CPU data structure - ie varies per CPU. */
89struct cpuinfo_parisc {
90 unsigned long it_value; /* Interval Timer at last timer Intr */
91 unsigned long it_delta; /* Interval delta (tic_10ms / HZ * 100) */
92 unsigned long irq_count; /* number of IRQ's since boot */
93 unsigned long irq_max_cr16; /* longest time to handle a single IRQ */
94 unsigned long cpuid; /* aka slot_number or set to NO_PROC_ID */
95 unsigned long hpa; /* Host Physical address */
96 unsigned long txn_addr; /* MMIO addr of EIR or id_eid */
97#ifdef CONFIG_SMP
98 unsigned long pending_ipi; /* bitmap of type ipi_message_type */
99 unsigned long ipi_count; /* number ipi Interrupts */
100#endif
101 unsigned long bh_count; /* number of times bh was invoked */
102 unsigned long prof_counter; /* per CPU profiling support */
103 unsigned long prof_multiplier; /* per CPU profiling support */
104 unsigned long fp_rev;
105 unsigned long fp_model;
106 unsigned int state;
107 struct parisc_device *dev;
108 unsigned long loops_per_jiffy;
109};
110
111extern struct system_cpuinfo_parisc boot_cpu_data;
112extern struct cpuinfo_parisc cpu_data[NR_CPUS];
113#define current_cpu_data cpu_data[smp_processor_id()]
114
115#define CPU_HVERSION ((boot_cpu_data.hversion >> 4) & 0x0FFF)
116
117typedef struct {
118 int seg;
119} mm_segment_t;
120
121#define ARCH_MIN_TASKALIGN 8
122
123struct thread_struct {
124 struct pt_regs regs;
125 unsigned long task_size;
126 unsigned long map_base;
127 unsigned long flags;
128};
129
130/* Thread struct flags. */
131#define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */
132#define PARISC_UAC_SIGBUS (1UL << 1)
133#define PARISC_KERNEL_DEATH (1UL << 31) /* see die_if_kernel()... */
134
135#define PARISC_UAC_SHIFT 0
136#define PARISC_UAC_MASK (PARISC_UAC_NOPRINT|PARISC_UAC_SIGBUS)
137
138#define SET_UNALIGN_CTL(task,value) \
139 ({ \
140 (task)->thread.flags = (((task)->thread.flags & ~PARISC_UAC_MASK) \
141 | (((value) << PARISC_UAC_SHIFT) & \
142 PARISC_UAC_MASK)); \
143 0; \
144 })
145
146#define GET_UNALIGN_CTL(task,addr) \
147 ({ \
148 put_user(((task)->thread.flags & PARISC_UAC_MASK) \
149 >> PARISC_UAC_SHIFT, (int __user *) (addr)); \
150 })
151
152#define INIT_THREAD { \
153 .regs = { .gr = { 0, }, \
154 .fr = { 0, }, \
155 .sr = { 0, }, \
156 .iasq = { 0, }, \
157 .iaoq = { 0, }, \
158 .cr27 = 0, \
159 }, \
160 .task_size = DEFAULT_TASK_SIZE, \
161 .map_base = DEFAULT_MAP_BASE, \
162 .flags = 0 \
163 }
164
165/*
166 * Return saved PC of a blocked thread. This is used by ps mostly.
167 */
168
169unsigned long thread_saved_pc(struct task_struct *t);
170void show_trace(struct task_struct *task, unsigned long *stack);
171
172/*
173 * Start user thread in another space.
174 *
175 * Note that we set both the iaoq and r31 to the new pc. When
176 * the kernel initially calls execve it will return through an
177 * rfi path that will use the values in the iaoq. The execve
178 * syscall path will return through the gateway page, and
179 * that uses r31 to branch to.
180 *
181 * For ELF we clear r23, because the dynamic linker uses it to pass
182 * the address of the finalizer function.
183 *
184 * We also initialize sr3 to an illegal value (illegal for our
185 * implementation, not for the architecture).
186 */
187typedef unsigned int elf_caddr_t;
188
189#define start_thread_som(regs, new_pc, new_sp) do { \
190 unsigned long *sp = (unsigned long *)new_sp; \
191 __u32 spaceid = (__u32)current->mm->context; \
192 unsigned long pc = (unsigned long)new_pc; \
193 /* offset pc for priv. level */ \
194 pc |= 3; \
195 \
196 set_fs(USER_DS); \
197 regs->iasq[0] = spaceid; \
198 regs->iasq[1] = spaceid; \
199 regs->iaoq[0] = pc; \
200 regs->iaoq[1] = pc + 4; \
201 regs->sr[2] = LINUX_GATEWAY_SPACE; \
202 regs->sr[3] = 0xffff; \
203 regs->sr[4] = spaceid; \
204 regs->sr[5] = spaceid; \
205 regs->sr[6] = spaceid; \
206 regs->sr[7] = spaceid; \
207 regs->gr[ 0] = USER_PSW; \
208 regs->gr[30] = ((new_sp)+63)&~63; \
209 regs->gr[31] = pc; \
210 \
211 get_user(regs->gr[26],&sp[0]); \
212 get_user(regs->gr[25],&sp[-1]); \
213 get_user(regs->gr[24],&sp[-2]); \
214 get_user(regs->gr[23],&sp[-3]); \
215} while(0)
216
217/* The ELF abi wants things done a "wee bit" differently than
218 * som does. Supporting this behavior here avoids
219 * having our own version of create_elf_tables.
220 *
221 * Oh, and yes, that is not a typo, we are really passing argc in r25
222 * and argv in r24 (rather than r26 and r25). This is because that's
223 * where __libc_start_main wants them.
224 *
225 * Duplicated from dl-machine.h for the benefit of readers:
226 *
227 * Our initial stack layout is rather different from everyone else's
228 * due to the unique PA-RISC ABI. As far as I know it looks like
229 * this:
230
231 ----------------------------------- (user startup code creates this frame)
232 | 32 bytes of magic |
233 |---------------------------------|
234 | 32 bytes argument/sp save area |
235 |---------------------------------| (bprm->p)
236 | ELF auxiliary info |
237 | (up to 28 words) |
238 |---------------------------------|
239 | NULL |
240 |---------------------------------|
241 | Environment pointers |
242 |---------------------------------|
243 | NULL |
244 |---------------------------------|
245 | Argument pointers |
246 |---------------------------------| <- argv
247 | argc (1 word) |
248 |---------------------------------| <- bprm->exec (HACK!)
249 | N bytes of slack |
250 |---------------------------------|
251 | filename passed to execve |
252 |---------------------------------| (mm->env_end)
253 | env strings |
254 |---------------------------------| (mm->env_start, mm->arg_end)
255 | arg strings |
256 |---------------------------------|
257 | additional faked arg strings if |
258 | we're invoked via binfmt_script |
259 |---------------------------------| (mm->arg_start)
260 stack base is at TASK_SIZE - rlim_max.
261
262on downward growing arches, it looks like this:
263 stack base at TASK_SIZE
264 | filename passed to execve
265 | env strings
266 | arg strings
267 | faked arg strings
268 | slack
269 | ELF
270 | envps
271 | argvs
272 | argc
273
274 * The pleasant part of this is that if we need to skip arguments we
275 * can just decrement argc and move argv, because the stack pointer
276 * is utterly unrelated to the location of the environment and
277 * argument vectors.
278 *
279 * Note that the S/390 people took the easy way out and hacked their
280 * GCC to make the stack grow downwards.
281 *
282 * Final Note: For entry from syscall, the W (wide) bit of the PSW
283 * is stuffed into the lowest bit of the user sp (%r30), so we fill
284 * it in here from the current->personality
285 */
286
287#ifdef CONFIG_64BIT
288#define USER_WIDE_MODE (!test_thread_flag(TIF_32BIT))
289#else
290#define USER_WIDE_MODE 0
291#endif
292
293#define start_thread(regs, new_pc, new_sp) do { \
294 elf_addr_t *sp = (elf_addr_t *)new_sp; \
295 __u32 spaceid = (__u32)current->mm->context; \
296 elf_addr_t pc = (elf_addr_t)new_pc | 3; \
297 elf_caddr_t *argv = (elf_caddr_t *)bprm->exec + 1; \
298 \
299 set_fs(USER_DS); \
300 regs->iasq[0] = spaceid; \
301 regs->iasq[1] = spaceid; \
302 regs->iaoq[0] = pc; \
303 regs->iaoq[1] = pc + 4; \
304 regs->sr[2] = LINUX_GATEWAY_SPACE; \
305 regs->sr[3] = 0xffff; \
306 regs->sr[4] = spaceid; \
307 regs->sr[5] = spaceid; \
308 regs->sr[6] = spaceid; \
309 regs->sr[7] = spaceid; \
310 regs->gr[ 0] = USER_PSW | (USER_WIDE_MODE ? PSW_W : 0); \
311 regs->fr[ 0] = 0LL; \
312 regs->fr[ 1] = 0LL; \
313 regs->fr[ 2] = 0LL; \
314 regs->fr[ 3] = 0LL; \
315 regs->gr[30] = (((unsigned long)sp + 63) &~ 63) | (USER_WIDE_MODE ? 1 : 0); \
316 regs->gr[31] = pc; \
317 \
318 get_user(regs->gr[25], (argv - 1)); \
319 regs->gr[24] = (long) argv; \
320 regs->gr[23] = 0; \
321} while(0)
322
323struct task_struct;
324struct mm_struct;
325
326/* Free all resources held by a thread. */
327extern void release_thread(struct task_struct *);
328extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
329
330/* Prepare to copy thread state - unlazy all lazy status */
331#define prepare_to_copy(tsk) do { } while (0)
332
333extern void map_hpux_gateway_page(struct task_struct *tsk, struct mm_struct *mm);
334
335extern unsigned long get_wchan(struct task_struct *p);
336
337#define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0])
338#define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30])
339
340#define cpu_relax() barrier()
341
342/* Used as a macro to identify the combined VIPT/PIPT cached
343 * CPUs which require a guarantee of coherency (no inequivalent
344 * aliases with different data, whether clean or not) to operate */
345static inline int parisc_requires_coherency(void)
346{
347#ifdef CONFIG_PA8X00
348 return (boot_cpu_data.cpu_type == mako) ||
349 (boot_cpu_data.cpu_type == mako2);
350#else
351 return 0;
352#endif
353}
354
355#endif /* __ASSEMBLY__ */
356
357#endif /* __ASM_PARISC_PROCESSOR_H */
diff --git a/arch/parisc/include/asm/psw.h b/arch/parisc/include/asm/psw.h
new file mode 100644
index 000000000000..5a3e23c9ce63
--- /dev/null
+++ b/arch/parisc/include/asm/psw.h
@@ -0,0 +1,62 @@
1#ifndef _PARISC_PSW_H
2
3
4#define PSW_I 0x00000001
5#define PSW_D 0x00000002
6#define PSW_P 0x00000004
7#define PSW_Q 0x00000008
8
9#define PSW_R 0x00000010
10#define PSW_F 0x00000020
11#define PSW_G 0x00000040 /* PA1.x only */
12#define PSW_O 0x00000080 /* PA2.0 only */
13
14/* ssm/rsm instructions number PSW_W and PSW_E differently */
15#define PSW_SM_I PSW_I /* Enable External Interrupts */
16#define PSW_SM_D PSW_D
17#define PSW_SM_P PSW_P
18#define PSW_SM_Q PSW_Q /* Enable Interrupt State Collection */
19#define PSW_SM_R PSW_R /* Enable Recover Counter Trap */
20#define PSW_SM_W 0x200 /* PA2.0 only : Enable Wide Mode */
21
22#define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
23
24#define PSW_CB 0x0000ff00
25
26#define PSW_M 0x00010000
27#define PSW_V 0x00020000
28#define PSW_C 0x00040000
29#define PSW_B 0x00080000
30
31#define PSW_X 0x00100000
32#define PSW_N 0x00200000
33#define PSW_L 0x00400000
34#define PSW_H 0x00800000
35
36#define PSW_T 0x01000000
37#define PSW_S 0x02000000
38#define PSW_E 0x04000000
39#define PSW_W 0x08000000 /* PA2.0 only */
40#define PSW_W_BIT 36 /* PA2.0 only */
41
42#define PSW_Z 0x40000000 /* PA1.x only */
43#define PSW_Y 0x80000000 /* PA1.x only */
44
45#ifdef CONFIG_64BIT
46# define PSW_HI_CB 0x000000ff /* PA2.0 only */
47#endif
48
49#ifdef CONFIG_64BIT
50# define USER_PSW_HI_MASK PSW_HI_CB
51# define WIDE_PSW PSW_W
52#else
53# define WIDE_PSW 0
54#endif
55
56/* Used when setting up for rfi */
57#define KERNEL_PSW (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D)
58#define REAL_MODE_PSW (WIDE_PSW | PSW_Q)
59#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
60#define USER_PSW (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
61
62#endif
diff --git a/arch/parisc/include/asm/ptrace.h b/arch/parisc/include/asm/ptrace.h
new file mode 100644
index 000000000000..afa5333187b4
--- /dev/null
+++ b/arch/parisc/include/asm/ptrace.h
@@ -0,0 +1,68 @@
1#ifndef _PARISC_PTRACE_H
2#define _PARISC_PTRACE_H
3
4/* written by Philipp Rumpf, Copyright (C) 1999 SuSE GmbH Nuernberg
5** Copyright (C) 2000 Grant Grundler, Hewlett-Packard
6*/
7
8#include <linux/types.h>
9
10/* This struct defines the way the registers are stored on the
11 * stack during a system call.
12 *
13 * N.B. gdb/strace care about the size and offsets within this
14 * structure. If you change things, you may break object compatibility
15 * for those applications.
16 */
17
18struct pt_regs {
19 unsigned long gr[32]; /* PSW is in gr[0] */
20 __u64 fr[32];
21 unsigned long sr[ 8];
22 unsigned long iasq[2];
23 unsigned long iaoq[2];
24 unsigned long cr27;
25 unsigned long pad0; /* available for other uses */
26 unsigned long orig_r28;
27 unsigned long ksp;
28 unsigned long kpc;
29 unsigned long sar; /* CR11 */
30 unsigned long iir; /* CR19 */
31 unsigned long isr; /* CR20 */
32 unsigned long ior; /* CR21 */
33 unsigned long ipsw; /* CR22 */
34};
35
36/*
37 * The numbers chosen here are somewhat arbitrary but absolutely MUST
38 * not overlap with any of the number assigned in <linux/ptrace.h>.
39 *
40 * These ones are taken from IA-64 on the assumption that theirs are
41 * the most correct (and we also want to support PTRACE_SINGLEBLOCK
42 * since we have taken branch traps too)
43 */
44#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */
45
46#ifdef __KERNEL__
47
48#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS))
49
50#define __ARCH_WANT_COMPAT_SYS_PTRACE
51
52struct task_struct;
53#define arch_has_single_step() 1
54void user_disable_single_step(struct task_struct *task);
55void user_enable_single_step(struct task_struct *task);
56
57#define arch_has_block_step() 1
58void user_enable_block_step(struct task_struct *task);
59
60/* XXX should we use iaoq[1] or iaoq[0] ? */
61#define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0)
62#define user_space(regs) (((regs)->iasq[1] != 0) ? 1 : 0)
63#define instruction_pointer(regs) ((regs)->iaoq[0] & ~3)
64unsigned long profile_pc(struct pt_regs *);
65extern void show_regs(struct pt_regs *);
66#endif
67
68#endif
diff --git a/arch/parisc/include/asm/real.h b/arch/parisc/include/asm/real.h
new file mode 100644
index 000000000000..82acb25db395
--- /dev/null
+++ b/arch/parisc/include/asm/real.h
@@ -0,0 +1,5 @@
1#ifndef _PARISC_REAL_H
2#define _PARISC_REAL_H
3
4
5#endif
diff --git a/arch/parisc/include/asm/resource.h b/arch/parisc/include/asm/resource.h
new file mode 100644
index 000000000000..8b06343b62ed
--- /dev/null
+++ b/arch/parisc/include/asm/resource.h
@@ -0,0 +1,7 @@
1#ifndef _ASM_PARISC_RESOURCE_H
2#define _ASM_PARISC_RESOURCE_H
3
4#define _STK_LIM_MAX 10 * _STK_LIM
5#include <asm-generic/resource.h>
6
7#endif
diff --git a/arch/parisc/include/asm/ropes.h b/arch/parisc/include/asm/ropes.h
new file mode 100644
index 000000000000..09f51d5ab57c
--- /dev/null
+++ b/arch/parisc/include/asm/ropes.h
@@ -0,0 +1,322 @@
1#ifndef _ASM_PARISC_ROPES_H_
2#define _ASM_PARISC_ROPES_H_
3
4#include <asm/parisc-device.h>
5
6#ifdef CONFIG_64BIT
7/* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
8#define ZX1_SUPPORT
9#endif
10
11#ifdef CONFIG_PROC_FS
12/* depends on proc fs support. But costs CPU performance */
13#undef SBA_COLLECT_STATS
14#endif
15
16/*
17** The number of pdir entries to "free" before issuing
18** a read to PCOM register to flush out PCOM writes.
19** Interacts with allocation granularity (ie 4 or 8 entries
20** allocated and free'd/purged at a time might make this
21** less interesting).
22*/
23#define DELAYED_RESOURCE_CNT 16
24
25#define MAX_IOC 2 /* per Ike. Pluto/Astro only have 1. */
26#define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */
27
28struct ioc {
29 void __iomem *ioc_hpa; /* I/O MMU base address */
30 char *res_map; /* resource map, bit == pdir entry */
31 u64 *pdir_base; /* physical base address */
32 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
33 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
34#ifdef ZX1_SUPPORT
35 unsigned long iovp_mask; /* help convert IOVA to IOVP */
36#endif
37 unsigned long *res_hint; /* next avail IOVP - circular search */
38 spinlock_t res_lock;
39 unsigned int res_bitshift; /* from the LEFT! */
40 unsigned int res_size; /* size of resource map in bytes */
41#ifdef SBA_HINT_SUPPORT
42/* FIXME : DMA HINTs not used */
43 unsigned long hint_mask_pdir; /* bits used for DMA hints */
44 unsigned int hint_shift_pdir;
45#endif
46#if DELAYED_RESOURCE_CNT > 0
47 int saved_cnt;
48 struct sba_dma_pair {
49 dma_addr_t iova;
50 size_t size;
51 } saved[DELAYED_RESOURCE_CNT];
52#endif
53
54#ifdef SBA_COLLECT_STATS
55#define SBA_SEARCH_SAMPLE 0x100
56 unsigned long avg_search[SBA_SEARCH_SAMPLE];
57 unsigned long avg_idx; /* current index into avg_search */
58 unsigned long used_pages;
59 unsigned long msingle_calls;
60 unsigned long msingle_pages;
61 unsigned long msg_calls;
62 unsigned long msg_pages;
63 unsigned long usingle_calls;
64 unsigned long usingle_pages;
65 unsigned long usg_calls;
66 unsigned long usg_pages;
67#endif
68 /* STUFF We don't need in performance path */
69 unsigned int pdir_size; /* in bytes, determined by IOV Space size */
70};
71
72struct sba_device {
73 struct sba_device *next; /* list of SBA's in system */
74 struct parisc_device *dev; /* dev found in bus walk */
75 const char *name;
76 void __iomem *sba_hpa; /* base address */
77 spinlock_t sba_lock;
78 unsigned int flags; /* state/functionality enabled */
79 unsigned int hw_rev; /* HW revision of chip */
80
81 struct resource chip_resv; /* MMIO reserved for chip */
82 struct resource iommu_resv; /* MMIO reserved for iommu */
83
84 unsigned int num_ioc; /* number of on-board IOC's */
85 struct ioc ioc[MAX_IOC];
86};
87
88#define ASTRO_RUNWAY_PORT 0x582
89#define IKE_MERCED_PORT 0x803
90#define REO_MERCED_PORT 0x804
91#define REOG_MERCED_PORT 0x805
92#define PLUTO_MCKINLEY_PORT 0x880
93
94static inline int IS_ASTRO(struct parisc_device *d) {
95 return d->id.hversion == ASTRO_RUNWAY_PORT;
96}
97
98static inline int IS_IKE(struct parisc_device *d) {
99 return d->id.hversion == IKE_MERCED_PORT;
100}
101
102static inline int IS_PLUTO(struct parisc_device *d) {
103 return d->id.hversion == PLUTO_MCKINLEY_PORT;
104}
105
106#define PLUTO_IOVA_BASE (1UL*1024*1024*1024) /* 1GB */
107#define PLUTO_IOVA_SIZE (1UL*1024*1024*1024) /* 1GB */
108#define PLUTO_GART_SIZE (PLUTO_IOVA_SIZE / 2)
109
110#define SBA_PDIR_VALID_BIT 0x8000000000000000ULL
111
112#define SBA_AGPGART_COOKIE 0x0000badbadc0ffeeULL
113
114#define SBA_FUNC_ID 0x0000 /* function id */
115#define SBA_FCLASS 0x0008 /* function class, bist, header, rev... */
116
117#define SBA_FUNC_SIZE 4096 /* SBA configuration function reg set */
118
119#define ASTRO_IOC_OFFSET (32 * SBA_FUNC_SIZE)
120#define PLUTO_IOC_OFFSET (1 * SBA_FUNC_SIZE)
121/* Ike's IOC's occupy functions 2 and 3 */
122#define IKE_IOC_OFFSET(p) ((p+2) * SBA_FUNC_SIZE)
123
124#define IOC_CTRL 0x8 /* IOC_CTRL offset */
125#define IOC_CTRL_TC (1 << 0) /* TOC Enable */
126#define IOC_CTRL_CE (1 << 1) /* Coalesce Enable */
127#define IOC_CTRL_DE (1 << 2) /* Dillon Enable */
128#define IOC_CTRL_RM (1 << 8) /* Real Mode */
129#define IOC_CTRL_NC (1 << 9) /* Non Coherent Mode */
130#define IOC_CTRL_D4 (1 << 11) /* Disable 4-byte coalescing */
131#define IOC_CTRL_DD (1 << 13) /* Disable distr. LMMIO range coalescing */
132
133/*
134** Offsets into MBIB (Function 0 on Ike and hopefully Astro)
135** Firmware programs this stuff. Don't touch it.
136*/
137#define LMMIO_DIRECT0_BASE 0x300
138#define LMMIO_DIRECT0_MASK 0x308
139#define LMMIO_DIRECT0_ROUTE 0x310
140
141#define LMMIO_DIST_BASE 0x360
142#define LMMIO_DIST_MASK 0x368
143#define LMMIO_DIST_ROUTE 0x370
144
145#define IOS_DIST_BASE 0x390
146#define IOS_DIST_MASK 0x398
147#define IOS_DIST_ROUTE 0x3A0
148
149#define IOS_DIRECT_BASE 0x3C0
150#define IOS_DIRECT_MASK 0x3C8
151#define IOS_DIRECT_ROUTE 0x3D0
152
153/*
154** Offsets into I/O TLB (Function 2 and 3 on Ike)
155*/
156#define ROPE0_CTL 0x200 /* "regbus pci0" */
157#define ROPE1_CTL 0x208
158#define ROPE2_CTL 0x210
159#define ROPE3_CTL 0x218
160#define ROPE4_CTL 0x220
161#define ROPE5_CTL 0x228
162#define ROPE6_CTL 0x230
163#define ROPE7_CTL 0x238
164
165#define IOC_ROPE0_CFG 0x500 /* pluto only */
166#define IOC_ROPE_AO 0x10 /* Allow "Relaxed Ordering" */
167
168#define HF_ENABLE 0x40
169
170#define IOC_IBASE 0x300 /* IO TLB */
171#define IOC_IMASK 0x308
172#define IOC_PCOM 0x310
173#define IOC_TCNFG 0x318
174#define IOC_PDIR_BASE 0x320
175
176/*
177** IOC supports 4/8/16/64KB page sizes (see TCNFG register)
178** It's safer (avoid memory corruption) to keep DMA page mappings
179** equivalently sized to VM PAGE_SIZE.
180**
181** We really can't avoid generating a new mapping for each
182** page since the Virtual Coherence Index has to be generated
183** and updated for each page.
184**
185** PAGE_SIZE could be greater than IOVP_SIZE. But not the inverse.
186*/
187#define IOVP_SIZE PAGE_SIZE
188#define IOVP_SHIFT PAGE_SHIFT
189#define IOVP_MASK PAGE_MASK
190
191#define SBA_PERF_CFG 0x708 /* Performance Counter stuff */
192#define SBA_PERF_MASK1 0x718
193#define SBA_PERF_MASK2 0x730
194
195/*
196** Offsets into PCI Performance Counters (functions 12 and 13)
197** Controlled by PERF registers in function 2 & 3 respectively.
198*/
199#define SBA_PERF_CNT1 0x200
200#define SBA_PERF_CNT2 0x208
201#define SBA_PERF_CNT3 0x210
202
203/*
204** lba_device: Per instance Elroy data structure
205*/
206struct lba_device {
207 struct pci_hba_data hba;
208
209 spinlock_t lba_lock;
210 void *iosapic_obj;
211
212#ifdef CONFIG_64BIT
213 void __iomem *iop_base; /* PA_VIEW - for IO port accessor funcs */
214#endif
215
216 int flags; /* state/functionality enabled */
217 int hw_rev; /* HW revision of chip */
218};
219
220#define ELROY_HVERS 0x782
221#define MERCURY_HVERS 0x783
222#define QUICKSILVER_HVERS 0x784
223
224static inline int IS_ELROY(struct parisc_device *d) {
225 return (d->id.hversion == ELROY_HVERS);
226}
227
228static inline int IS_MERCURY(struct parisc_device *d) {
229 return (d->id.hversion == MERCURY_HVERS);
230}
231
232static inline int IS_QUICKSILVER(struct parisc_device *d) {
233 return (d->id.hversion == QUICKSILVER_HVERS);
234}
235
236static inline int agp_mode_mercury(void __iomem *hpa) {
237 u64 bus_mode;
238
239 bus_mode = readl(hpa + 0x0620);
240 if (bus_mode & 1)
241 return 1;
242
243 return 0;
244}
245
246/*
247** I/O SAPIC init function
248** Caller knows where an I/O SAPIC is. LBA has an integrated I/O SAPIC.
249** Call setup as part of per instance initialization.
250** (ie *not* init_module() function unless only one is present.)
251** fixup_irq is to initialize PCI IRQ line support and
252** virtualize pcidev->irq value. To be called by pci_fixup_bus().
253*/
254extern void *iosapic_register(unsigned long hpa);
255extern int iosapic_fixup_irq(void *obj, struct pci_dev *pcidev);
256
257#define LBA_FUNC_ID 0x0000 /* function id */
258#define LBA_FCLASS 0x0008 /* function class, bist, header, rev... */
259#define LBA_CAPABLE 0x0030 /* capabilities register */
260
261#define LBA_PCI_CFG_ADDR 0x0040 /* poke CFG address here */
262#define LBA_PCI_CFG_DATA 0x0048 /* read or write data here */
263
264#define LBA_PMC_MTLT 0x0050 /* Firmware sets this - read only. */
265#define LBA_FW_SCRATCH 0x0058 /* Firmware writes the PCI bus number here. */
266#define LBA_ERROR_ADDR 0x0070 /* On error, address gets logged here */
267
268#define LBA_ARB_MASK 0x0080 /* bit 0 enable arbitration. PAT/PDC enables */
269#define LBA_ARB_PRI 0x0088 /* firmware sets this. */
270#define LBA_ARB_MODE 0x0090 /* firmware sets this. */
271#define LBA_ARB_MTLT 0x0098 /* firmware sets this. */
272
273#define LBA_MOD_ID 0x0100 /* Module ID. PDC_PAT_CELL reports 4 */
274
275#define LBA_STAT_CTL 0x0108 /* Status & Control */
276#define LBA_BUS_RESET 0x01 /* Deassert PCI Bus Reset Signal */
277#define CLEAR_ERRLOG 0x10 /* "Clear Error Log" cmd */
278#define CLEAR_ERRLOG_ENABLE 0x20 /* "Clear Error Log" Enable */
279#define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */
280
281#define LBA_LMMIO_BASE 0x0200 /* < 4GB I/O address range */
282#define LBA_LMMIO_MASK 0x0208
283
284#define LBA_GMMIO_BASE 0x0210 /* > 4GB I/O address range */
285#define LBA_GMMIO_MASK 0x0218
286
287#define LBA_WLMMIO_BASE 0x0220 /* All < 4GB ranges under the same *SBA* */
288#define LBA_WLMMIO_MASK 0x0228
289
290#define LBA_WGMMIO_BASE 0x0230 /* All > 4GB ranges under the same *SBA* */
291#define LBA_WGMMIO_MASK 0x0238
292
293#define LBA_IOS_BASE 0x0240 /* I/O port space for this LBA */
294#define LBA_IOS_MASK 0x0248
295
296#define LBA_ELMMIO_BASE 0x0250 /* Extra LMMIO range */
297#define LBA_ELMMIO_MASK 0x0258
298
299#define LBA_EIOS_BASE 0x0260 /* Extra I/O port space */
300#define LBA_EIOS_MASK 0x0268
301
302#define LBA_GLOBAL_MASK 0x0270 /* Mercury only: Global Address Mask */
303#define LBA_DMA_CTL 0x0278 /* firmware sets this */
304
305#define LBA_IBASE 0x0300 /* SBA DMA support */
306#define LBA_IMASK 0x0308
307
308/* FIXME: ignore DMA Hint stuff until we can measure performance */
309#define LBA_HINT_CFG 0x0310
310#define LBA_HINT_BASE 0x0380 /* 14 registers at every 8 bytes. */
311
312#define LBA_BUS_MODE 0x0620
313
314/* ERROR regs are needed for config cycle kluges */
315#define LBA_ERROR_CONFIG 0x0680
316#define LBA_SMART_MODE 0x20
317#define LBA_ERROR_STATUS 0x0688
318#define LBA_ROPE_CTL 0x06A0
319
320#define LBA_IOSAPIC_BASE 0x800 /* Offset of IRQ logic */
321
322#endif /*_ASM_PARISC_ROPES_H_*/
diff --git a/arch/parisc/include/asm/rt_sigframe.h b/arch/parisc/include/asm/rt_sigframe.h
new file mode 100644
index 000000000000..f0dd3b30f6c4
--- /dev/null
+++ b/arch/parisc/include/asm/rt_sigframe.h
@@ -0,0 +1,23 @@
1#ifndef _ASM_PARISC_RT_SIGFRAME_H
2#define _ASM_PARISC_RT_SIGFRAME_H
3
4#define SIGRETURN_TRAMP 4
5#define SIGRESTARTBLOCK_TRAMP 5
6#define TRAMP_SIZE (SIGRETURN_TRAMP + SIGRESTARTBLOCK_TRAMP)
7
8struct rt_sigframe {
9 /* XXX: Must match trampoline size in arch/parisc/kernel/signal.c
10 Secondary to that it must protect the ERESTART_RESTARTBLOCK
11 trampoline we left on the stack (we were bad and didn't
12 change sp so we could run really fast.) */
13 unsigned int tramp[TRAMP_SIZE];
14 struct siginfo info;
15 struct ucontext uc;
16};
17
18#define SIGFRAME 128
19#define FUNCTIONCALLFRAME 96
20#define PARISC_RT_SIGFRAME_SIZE \
21 (((sizeof(struct rt_sigframe) + FUNCTIONCALLFRAME) + SIGFRAME) & -SIGFRAME)
22
23#endif
diff --git a/arch/parisc/include/asm/rtc.h b/arch/parisc/include/asm/rtc.h
new file mode 100644
index 000000000000..099d641a42c2
--- /dev/null
+++ b/arch/parisc/include/asm/rtc.h
@@ -0,0 +1,131 @@
1/*
2 * include/asm-parisc/rtc.h
3 *
4 * Copyright 2002 Randolph CHung <tausq@debian.org>
5 *
6 * Based on: include/asm-ppc/rtc.h and the genrtc driver in the
7 * 2.4 parisc linux tree
8 */
9
10#ifndef __ASM_RTC_H__
11#define __ASM_RTC_H__
12
13#ifdef __KERNEL__
14
15#include <linux/rtc.h>
16
17#include <asm/pdc.h>
18
19#define SECS_PER_HOUR (60 * 60)
20#define SECS_PER_DAY (SECS_PER_HOUR * 24)
21
22
23#define RTC_PIE 0x40 /* periodic interrupt enable */
24#define RTC_AIE 0x20 /* alarm interrupt enable */
25#define RTC_UIE 0x10 /* update-finished interrupt enable */
26
27#define RTC_BATT_BAD 0x100 /* battery bad */
28
29/* some dummy definitions */
30#define RTC_SQWE 0x08 /* enable square-wave output */
31#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
32#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
33#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
34
35# define __isleap(year) \
36 ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
37
38/* How many days come before each month (0-12). */
39static const unsigned short int __mon_yday[2][13] =
40{
41 /* Normal years. */
42 { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
43 /* Leap years. */
44 { 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
45};
46
47static inline unsigned int get_rtc_time(struct rtc_time *wtime)
48{
49 struct pdc_tod tod_data;
50 long int days, rem, y;
51 const unsigned short int *ip;
52
53 memset(wtime, 0, sizeof(*wtime));
54 if (pdc_tod_read(&tod_data) < 0)
55 return RTC_24H | RTC_BATT_BAD;
56
57 // most of the remainder of this function is:
58// Copyright (C) 1991, 1993, 1997, 1998 Free Software Foundation, Inc.
59// This was originally a part of the GNU C Library.
60// It is distributed under the GPL, and was swiped from offtime.c
61
62
63 days = tod_data.tod_sec / SECS_PER_DAY;
64 rem = tod_data.tod_sec % SECS_PER_DAY;
65
66 wtime->tm_hour = rem / SECS_PER_HOUR;
67 rem %= SECS_PER_HOUR;
68 wtime->tm_min = rem / 60;
69 wtime->tm_sec = rem % 60;
70
71 y = 1970;
72
73#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
74#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
75
76 while (days < 0 || days >= (__isleap (y) ? 366 : 365))
77 {
78 /* Guess a corrected year, assuming 365 days per year. */
79 long int yg = y + days / 365 - (days % 365 < 0);
80
81 /* Adjust DAYS and Y to match the guessed year. */
82 days -= ((yg - y) * 365
83 + LEAPS_THRU_END_OF (yg - 1)
84 - LEAPS_THRU_END_OF (y - 1));
85 y = yg;
86 }
87 wtime->tm_year = y - 1900;
88
89 ip = __mon_yday[__isleap(y)];
90 for (y = 11; days < (long int) ip[y]; --y)
91 continue;
92 days -= ip[y];
93 wtime->tm_mon = y;
94 wtime->tm_mday = days + 1;
95
96 return RTC_24H;
97}
98
99static int set_rtc_time(struct rtc_time *wtime)
100{
101 u_int32_t secs;
102
103 secs = mktime(wtime->tm_year + 1900, wtime->tm_mon + 1, wtime->tm_mday,
104 wtime->tm_hour, wtime->tm_min, wtime->tm_sec);
105
106 if(pdc_tod_set(secs, 0) < 0)
107 return -1;
108 else
109 return 0;
110
111}
112
113static inline unsigned int get_rtc_ss(void)
114{
115 struct rtc_time h;
116
117 get_rtc_time(&h);
118 return h.tm_sec;
119}
120
121static inline int get_rtc_pll(struct rtc_pll_info *pll)
122{
123 return -EINVAL;
124}
125static inline int set_rtc_pll(struct rtc_pll_info *pll)
126{
127 return -EINVAL;
128}
129
130#endif /* __KERNEL__ */
131#endif /* __ASM_RTC_H__ */
diff --git a/arch/parisc/include/asm/runway.h b/arch/parisc/include/asm/runway.h
new file mode 100644
index 000000000000..5bea02da7e22
--- /dev/null
+++ b/arch/parisc/include/asm/runway.h
@@ -0,0 +1,12 @@
1#ifndef ASM_PARISC_RUNWAY_H
2#define ASM_PARISC_RUNWAY_H
3#ifdef __KERNEL__
4
5/* declared in arch/parisc/kernel/setup.c */
6extern struct proc_dir_entry * proc_runway_root;
7
8#define RUNWAY_STATUS 0x10
9#define RUNWAY_DEBUG 0x40
10
11#endif /* __KERNEL__ */
12#endif /* ASM_PARISC_RUNWAY_H */
diff --git a/arch/parisc/include/asm/scatterlist.h b/arch/parisc/include/asm/scatterlist.h
new file mode 100644
index 000000000000..62269b31ebf4
--- /dev/null
+++ b/arch/parisc/include/asm/scatterlist.h
@@ -0,0 +1,27 @@
1#ifndef _ASM_PARISC_SCATTERLIST_H
2#define _ASM_PARISC_SCATTERLIST_H
3
4#include <asm/page.h>
5#include <asm/types.h>
6
7struct scatterlist {
8#ifdef CONFIG_DEBUG_SG
9 unsigned long sg_magic;
10#endif
11 unsigned long page_link;
12 unsigned int offset;
13
14 unsigned int length;
15
16 /* an IOVA can be 64-bits on some PA-Risc platforms. */
17 dma_addr_t iova; /* I/O Virtual Address */
18 __u32 iova_length; /* bytes mapped */
19};
20
21#define sg_virt_addr(sg) ((unsigned long)sg_virt(sg))
22#define sg_dma_address(sg) ((sg)->iova)
23#define sg_dma_len(sg) ((sg)->iova_length)
24
25#define ISA_DMA_THRESHOLD (~0UL)
26
27#endif /* _ASM_PARISC_SCATTERLIST_H */
diff --git a/arch/parisc/include/asm/sections.h b/arch/parisc/include/asm/sections.h
new file mode 100644
index 000000000000..9d13c3507ad6
--- /dev/null
+++ b/arch/parisc/include/asm/sections.h
@@ -0,0 +1,12 @@
1#ifndef _PARISC_SECTIONS_H
2#define _PARISC_SECTIONS_H
3
4/* nothing to see, move along */
5#include <asm-generic/sections.h>
6
7#ifdef CONFIG_64BIT
8#undef dereference_function_descriptor
9void *dereference_function_descriptor(void *);
10#endif
11
12#endif
diff --git a/arch/parisc/include/asm/segment.h b/arch/parisc/include/asm/segment.h
new file mode 100644
index 000000000000..26794ddb6524
--- /dev/null
+++ b/arch/parisc/include/asm/segment.h
@@ -0,0 +1,6 @@
1#ifndef __PARISC_SEGMENT_H
2#define __PARISC_SEGMENT_H
3
4/* Only here because we have some old header files that expect it.. */
5
6#endif
diff --git a/arch/parisc/include/asm/sembuf.h b/arch/parisc/include/asm/sembuf.h
new file mode 100644
index 000000000000..1e59ffd3bd1e
--- /dev/null
+++ b/arch/parisc/include/asm/sembuf.h
@@ -0,0 +1,29 @@
1#ifndef _PARISC_SEMBUF_H
2#define _PARISC_SEMBUF_H
3
4/*
5 * The semid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t sem_otime; /* last semop time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t sem_ctime; /* last change time */
24 unsigned int sem_nsems; /* no. of semaphores in array */
25 unsigned int __unused1;
26 unsigned int __unused2;
27};
28
29#endif /* _PARISC_SEMBUF_H */
diff --git a/arch/parisc/include/asm/serial.h b/arch/parisc/include/asm/serial.h
new file mode 100644
index 000000000000..d7e3cc60dbc3
--- /dev/null
+++ b/arch/parisc/include/asm/serial.h
@@ -0,0 +1,10 @@
1/*
2 * include/asm-parisc/serial.h
3 */
4
5/*
6 * This is used for 16550-compatible UARTs
7 */
8#define BASE_BAUD ( 1843200 / 16 )
9
10#define SERIAL_PORT_DFNS
diff --git a/arch/parisc/include/asm/setup.h b/arch/parisc/include/asm/setup.h
new file mode 100644
index 000000000000..7da2e5b8747e
--- /dev/null
+++ b/arch/parisc/include/asm/setup.h
@@ -0,0 +1,6 @@
1#ifndef _PARISC_SETUP_H
2#define _PARISC_SETUP_H
3
4#define COMMAND_LINE_SIZE 1024
5
6#endif /* _PARISC_SETUP_H */
diff --git a/arch/parisc/include/asm/shmbuf.h b/arch/parisc/include/asm/shmbuf.h
new file mode 100644
index 000000000000..0a3eada1863b
--- /dev/null
+++ b/arch/parisc/include/asm/shmbuf.h
@@ -0,0 +1,58 @@
1#ifndef _PARISC_SHMBUF_H
2#define _PARISC_SHMBUF_H
3
4/*
5 * The shmid64_ds structure for parisc architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16#ifndef CONFIG_64BIT
17 unsigned int __pad1;
18#endif
19 __kernel_time_t shm_atime; /* last attach time */
20#ifndef CONFIG_64BIT
21 unsigned int __pad2;
22#endif
23 __kernel_time_t shm_dtime; /* last detach time */
24#ifndef CONFIG_64BIT
25 unsigned int __pad3;
26#endif
27 __kernel_time_t shm_ctime; /* last change time */
28#ifndef CONFIG_64BIT
29 unsigned int __pad4;
30#endif
31 size_t shm_segsz; /* size of segment (bytes) */
32 __kernel_pid_t shm_cpid; /* pid of creator */
33 __kernel_pid_t shm_lpid; /* pid of last operator */
34 unsigned int shm_nattch; /* no. of current attaches */
35 unsigned int __unused1;
36 unsigned int __unused2;
37};
38
39#ifdef CONFIG_64BIT
40/* The 'unsigned int' (formerly 'unsigned long') data types below will
41 * ensure that a 32-bit app calling shmctl(*,IPC_INFO,*) will work on
42 * a wide kernel, but if some of these values are meant to contain pointers
43 * they may need to be 'long long' instead. -PB XXX FIXME
44 */
45#endif
46struct shminfo64 {
47 unsigned int shmmax;
48 unsigned int shmmin;
49 unsigned int shmmni;
50 unsigned int shmseg;
51 unsigned int shmall;
52 unsigned int __unused1;
53 unsigned int __unused2;
54 unsigned int __unused3;
55 unsigned int __unused4;
56};
57
58#endif /* _PARISC_SHMBUF_H */
diff --git a/arch/parisc/include/asm/shmparam.h b/arch/parisc/include/asm/shmparam.h
new file mode 100644
index 000000000000..628ddc22faa8
--- /dev/null
+++ b/arch/parisc/include/asm/shmparam.h
@@ -0,0 +1,8 @@
1#ifndef _ASMPARISC_SHMPARAM_H
2#define _ASMPARISC_SHMPARAM_H
3
4#define __ARCH_FORCE_SHMLBA 1
5
6#define SHMLBA 0x00400000 /* attach addr needs to be 4 Mb aligned */
7
8#endif /* _ASMPARISC_SHMPARAM_H */
diff --git a/arch/parisc/include/asm/sigcontext.h b/arch/parisc/include/asm/sigcontext.h
new file mode 100644
index 000000000000..27ef31bb3b6e
--- /dev/null
+++ b/arch/parisc/include/asm/sigcontext.h
@@ -0,0 +1,20 @@
1#ifndef _ASMPARISC_SIGCONTEXT_H
2#define _ASMPARISC_SIGCONTEXT_H
3
4#define PARISC_SC_FLAG_ONSTACK 1<<0
5#define PARISC_SC_FLAG_IN_SYSCALL 1<<1
6
7/* We will add more stuff here as it becomes necessary, until we know
8 it works. */
9struct sigcontext {
10 unsigned long sc_flags;
11
12 unsigned long sc_gr[32]; /* PSW in sc_gr[0] */
13 unsigned long long sc_fr[32]; /* FIXME, do we need other state info? */
14 unsigned long sc_iasq[2];
15 unsigned long sc_iaoq[2];
16 unsigned long sc_sar; /* cr11 */
17};
18
19
20#endif
diff --git a/arch/parisc/include/asm/siginfo.h b/arch/parisc/include/asm/siginfo.h
new file mode 100644
index 000000000000..d7034728f377
--- /dev/null
+++ b/arch/parisc/include/asm/siginfo.h
@@ -0,0 +1,9 @@
1#ifndef _PARISC_SIGINFO_H
2#define _PARISC_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#undef NSIGTRAP
7#define NSIGTRAP 4
8
9#endif
diff --git a/arch/parisc/include/asm/signal.h b/arch/parisc/include/asm/signal.h
new file mode 100644
index 000000000000..c20356375d1d
--- /dev/null
+++ b/arch/parisc/include/asm/signal.h
@@ -0,0 +1,153 @@
1#ifndef _ASM_PARISC_SIGNAL_H
2#define _ASM_PARISC_SIGNAL_H
3
4#define SIGHUP 1
5#define SIGINT 2
6#define SIGQUIT 3
7#define SIGILL 4
8#define SIGTRAP 5
9#define SIGABRT 6
10#define SIGIOT 6
11#define SIGEMT 7
12#define SIGFPE 8
13#define SIGKILL 9
14#define SIGBUS 10
15#define SIGSEGV 11
16#define SIGSYS 12 /* Linux doesn't use this */
17#define SIGPIPE 13
18#define SIGALRM 14
19#define SIGTERM 15
20#define SIGUSR1 16
21#define SIGUSR2 17
22#define SIGCHLD 18
23#define SIGPWR 19
24#define SIGVTALRM 20
25#define SIGPROF 21
26#define SIGIO 22
27#define SIGPOLL SIGIO
28#define SIGWINCH 23
29#define SIGSTOP 24
30#define SIGTSTP 25
31#define SIGCONT 26
32#define SIGTTIN 27
33#define SIGTTOU 28
34#define SIGURG 29
35#define SIGLOST 30 /* Linux doesn't use this either */
36#define SIGUNUSED 31
37#define SIGRESERVE SIGUNUSED
38
39#define SIGXCPU 33
40#define SIGXFSZ 34
41#define SIGSTKFLT 36
42
43/* These should not be considered constants from userland. */
44#define SIGRTMIN 37
45#define SIGRTMAX _NSIG /* it's 44 under HP/UX */
46
47/*
48 * SA_FLAGS values:
49 *
50 * SA_ONSTACK indicates that a registered stack_t will be used.
51 * SA_RESTART flag to get restarting signals (which were the default long ago)
52 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
53 * SA_RESETHAND clears the handler when the signal is delivered.
54 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
55 * SA_NODEFER prevents the current signal from being masked in the handler.
56 *
57 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
58 * Unix names RESETHAND and NODEFER respectively.
59 */
60#define SA_ONSTACK 0x00000001
61#define SA_RESETHAND 0x00000004
62#define SA_NOCLDSTOP 0x00000008
63#define SA_SIGINFO 0x00000010
64#define SA_NODEFER 0x00000020
65#define SA_RESTART 0x00000040
66#define SA_NOCLDWAIT 0x00000080
67#define _SA_SIGGFAULT 0x00000100 /* HPUX */
68
69#define SA_NOMASK SA_NODEFER
70#define SA_ONESHOT SA_RESETHAND
71
72#define SA_RESTORER 0x04000000 /* obsolete -- ignored */
73
74/*
75 * sigaltstack controls
76 */
77#define SS_ONSTACK 1
78#define SS_DISABLE 2
79
80#define MINSIGSTKSZ 2048
81#define SIGSTKSZ 8192
82
83#ifdef __KERNEL__
84
85#define _NSIG 64
86/* bits-per-word, where word apparently means 'long' not 'int' */
87#define _NSIG_BPW BITS_PER_LONG
88#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
89
90#endif /* __KERNEL__ */
91
92#define SIG_BLOCK 0 /* for blocking signals */
93#define SIG_UNBLOCK 1 /* for unblocking signals */
94#define SIG_SETMASK 2 /* for setting the signal mask */
95
96#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
97#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
98#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
99
100# ifndef __ASSEMBLY__
101
102# include <linux/types.h>
103
104/* Avoid too many header ordering problems. */
105struct siginfo;
106
107/* Type of a signal handler. */
108#ifdef CONFIG_64BIT
109/* function pointers on 64-bit parisc are pointers to little structs and the
110 * compiler doesn't support code which changes or tests the address of
111 * the function in the little struct. This is really ugly -PB
112 */
113typedef char __user *__sighandler_t;
114#else
115typedef void __signalfn_t(int);
116typedef __signalfn_t __user *__sighandler_t;
117#endif
118
119typedef struct sigaltstack {
120 void __user *ss_sp;
121 int ss_flags;
122 size_t ss_size;
123} stack_t;
124
125#ifdef __KERNEL__
126
127/* Most things should be clean enough to redefine this at will, if care
128 is taken to make libc match. */
129
130typedef unsigned long old_sigset_t; /* at least 32 bits */
131
132typedef struct {
133 /* next_signal() assumes this is a long - no choice */
134 unsigned long sig[_NSIG_WORDS];
135} sigset_t;
136
137struct sigaction {
138 __sighandler_t sa_handler;
139 unsigned long sa_flags;
140 sigset_t sa_mask; /* mask last for extensibility */
141};
142
143struct k_sigaction {
144 struct sigaction sa;
145};
146
147#define ptrace_signal_deliver(regs, cookie) do { } while (0)
148
149#include <asm/sigcontext.h>
150
151#endif /* __KERNEL__ */
152#endif /* !__ASSEMBLY */
153#endif /* _ASM_PARISC_SIGNAL_H */
diff --git a/arch/parisc/include/asm/smp.h b/arch/parisc/include/asm/smp.h
new file mode 100644
index 000000000000..398cdbaf4e54
--- /dev/null
+++ b/arch/parisc/include/asm/smp.h
@@ -0,0 +1,68 @@
1#ifndef __ASM_SMP_H
2#define __ASM_SMP_H
3
4
5#if defined(CONFIG_SMP)
6
7/* Page Zero Location PDC will look for the address to branch to when we poke
8** slave CPUs still in "Icache loop".
9*/
10#define PDC_OS_BOOT_RENDEZVOUS 0x10
11#define PDC_OS_BOOT_RENDEZVOUS_HI 0x28
12
13#ifndef ASSEMBLY
14#include <linux/bitops.h>
15#include <linux/threads.h> /* for NR_CPUS */
16#include <linux/cpumask.h>
17typedef unsigned long address_t;
18
19extern cpumask_t cpu_online_map;
20
21
22/*
23 * Private routines/data
24 *
25 * physical and logical are equivalent until we support CPU hotplug.
26 */
27#define cpu_number_map(cpu) (cpu)
28#define cpu_logical_map(cpu) (cpu)
29
30extern void smp_send_reschedule(int cpu);
31extern void smp_send_all_nop(void);
32
33extern void arch_send_call_function_single_ipi(int cpu);
34extern void arch_send_call_function_ipi(cpumask_t mask);
35
36#endif /* !ASSEMBLY */
37
38/*
39 * This magic constant controls our willingness to transfer
40 * a process across CPUs. Such a transfer incurs cache and tlb
41 * misses. The current value is inherited from i386. Still needs
42 * to be tuned for parisc.
43 */
44
45#define PROC_CHANGE_PENALTY 15 /* Schedule penalty */
46
47extern unsigned long cpu_present_mask;
48
49#define raw_smp_processor_id() (current_thread_info()->cpu)
50
51#else /* CONFIG_SMP */
52
53static inline void smp_send_all_nop(void) { return; }
54
55#endif
56
57#define NO_PROC_ID 0xFF /* No processor magic marker */
58#define ANY_PROC_ID 0xFF /* Any processor magic marker */
59static inline int __cpu_disable (void) {
60 return 0;
61}
62static inline void __cpu_die (unsigned int cpu) {
63 while(1)
64 ;
65}
66extern int __cpu_up (unsigned int cpu);
67
68#endif /* __ASM_SMP_H */
diff --git a/arch/parisc/include/asm/socket.h b/arch/parisc/include/asm/socket.h
new file mode 100644
index 000000000000..fba402c95ac2
--- /dev/null
+++ b/arch/parisc/include/asm/socket.h
@@ -0,0 +1,62 @@
1#ifndef _ASM_SOCKET_H
2#define _ASM_SOCKET_H
3
4#include <asm/sockios.h>
5
6/* For setsockopt(2) */
7#define SOL_SOCKET 0xffff
8
9#define SO_DEBUG 0x0001
10#define SO_REUSEADDR 0x0004
11#define SO_KEEPALIVE 0x0008
12#define SO_DONTROUTE 0x0010
13#define SO_BROADCAST 0x0020
14#define SO_LINGER 0x0080
15#define SO_OOBINLINE 0x0100
16/* To add :#define SO_REUSEPORT 0x0200 */
17#define SO_SNDBUF 0x1001
18#define SO_RCVBUF 0x1002
19#define SO_SNDBUFFORCE 0x100a
20#define SO_RCVBUFFORCE 0x100b
21#define SO_SNDLOWAT 0x1003
22#define SO_RCVLOWAT 0x1004
23#define SO_SNDTIMEO 0x1005
24#define SO_RCVTIMEO 0x1006
25#define SO_ERROR 0x1007
26#define SO_TYPE 0x1008
27#define SO_PEERNAME 0x2000
28
29#define SO_NO_CHECK 0x400b
30#define SO_PRIORITY 0x400c
31#define SO_BSDCOMPAT 0x400e
32#define SO_PASSCRED 0x4010
33#define SO_PEERCRED 0x4011
34#define SO_TIMESTAMP 0x4012
35#define SCM_TIMESTAMP SO_TIMESTAMP
36#define SO_TIMESTAMPNS 0x4013
37#define SCM_TIMESTAMPNS SO_TIMESTAMPNS
38
39/* Security levels - as per NRL IPv6 - don't actually do anything */
40#define SO_SECURITY_AUTHENTICATION 0x4016
41#define SO_SECURITY_ENCRYPTION_TRANSPORT 0x4017
42#define SO_SECURITY_ENCRYPTION_NETWORK 0x4018
43
44#define SO_BINDTODEVICE 0x4019
45
46/* Socket filtering */
47#define SO_ATTACH_FILTER 0x401a
48#define SO_DETACH_FILTER 0x401b
49
50#define SO_ACCEPTCONN 0x401c
51
52#define SO_PEERSEC 0x401d
53#define SO_PASSSEC 0x401e
54
55#define SO_MARK 0x401f
56
57/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
58 * have to define SOCK_NONBLOCK to a different value here.
59 */
60#define SOCK_NONBLOCK 0x40000000
61
62#endif /* _ASM_SOCKET_H */
diff --git a/arch/parisc/include/asm/sockios.h b/arch/parisc/include/asm/sockios.h
new file mode 100644
index 000000000000..dabfbc7483f6
--- /dev/null
+++ b/arch/parisc/include/asm/sockios.h
@@ -0,0 +1,13 @@
1#ifndef __ARCH_PARISC_SOCKIOS__
2#define __ARCH_PARISC_SOCKIOS__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */
11#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */
12
13#endif
diff --git a/arch/parisc/include/asm/spinlock.h b/arch/parisc/include/asm/spinlock.h
new file mode 100644
index 000000000000..f3d2090a18dc
--- /dev/null
+++ b/arch/parisc/include/asm/spinlock.h
@@ -0,0 +1,194 @@
1#ifndef __ASM_SPINLOCK_H
2#define __ASM_SPINLOCK_H
3
4#include <asm/system.h>
5#include <asm/processor.h>
6#include <asm/spinlock_types.h>
7
8static inline int __raw_spin_is_locked(raw_spinlock_t *x)
9{
10 volatile unsigned int *a = __ldcw_align(x);
11 return *a == 0;
12}
13
14#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
15#define __raw_spin_unlock_wait(x) \
16 do { cpu_relax(); } while (__raw_spin_is_locked(x))
17
18static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
19 unsigned long flags)
20{
21 volatile unsigned int *a;
22
23 mb();
24 a = __ldcw_align(x);
25 while (__ldcw(a) == 0)
26 while (*a == 0)
27 if (flags & PSW_SM_I) {
28 local_irq_enable();
29 cpu_relax();
30 local_irq_disable();
31 } else
32 cpu_relax();
33 mb();
34}
35
36static inline void __raw_spin_unlock(raw_spinlock_t *x)
37{
38 volatile unsigned int *a;
39 mb();
40 a = __ldcw_align(x);
41 *a = 1;
42 mb();
43}
44
45static inline int __raw_spin_trylock(raw_spinlock_t *x)
46{
47 volatile unsigned int *a;
48 int ret;
49
50 mb();
51 a = __ldcw_align(x);
52 ret = __ldcw(a) != 0;
53 mb();
54
55 return ret;
56}
57
58/*
59 * Read-write spinlocks, allowing multiple readers but only one writer.
60 * Linux rwlocks are unfair to writers; they can be starved for an indefinite
61 * time by readers. With care, they can also be taken in interrupt context.
62 *
63 * In the PA-RISC implementation, we have a spinlock and a counter.
64 * Readers use the lock to serialise their access to the counter (which
65 * records how many readers currently hold the lock).
66 * Writers hold the spinlock, preventing any readers or other writers from
67 * grabbing the rwlock.
68 */
69
70/* Note that we have to ensure interrupts are disabled in case we're
71 * interrupted by some other code that wants to grab the same read lock */
72static __inline__ void __raw_read_lock(raw_rwlock_t *rw)
73{
74 unsigned long flags;
75 local_irq_save(flags);
76 __raw_spin_lock_flags(&rw->lock, flags);
77 rw->counter++;
78 __raw_spin_unlock(&rw->lock);
79 local_irq_restore(flags);
80}
81
82/* Note that we have to ensure interrupts are disabled in case we're
83 * interrupted by some other code that wants to grab the same read lock */
84static __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
85{
86 unsigned long flags;
87 local_irq_save(flags);
88 __raw_spin_lock_flags(&rw->lock, flags);
89 rw->counter--;
90 __raw_spin_unlock(&rw->lock);
91 local_irq_restore(flags);
92}
93
94/* Note that we have to ensure interrupts are disabled in case we're
95 * interrupted by some other code that wants to grab the same read lock */
96static __inline__ int __raw_read_trylock(raw_rwlock_t *rw)
97{
98 unsigned long flags;
99 retry:
100 local_irq_save(flags);
101 if (__raw_spin_trylock(&rw->lock)) {
102 rw->counter++;
103 __raw_spin_unlock(&rw->lock);
104 local_irq_restore(flags);
105 return 1;
106 }
107
108 local_irq_restore(flags);
109 /* If write-locked, we fail to acquire the lock */
110 if (rw->counter < 0)
111 return 0;
112
113 /* Wait until we have a realistic chance at the lock */
114 while (__raw_spin_is_locked(&rw->lock) && rw->counter >= 0)
115 cpu_relax();
116
117 goto retry;
118}
119
120/* Note that we have to ensure interrupts are disabled in case we're
121 * interrupted by some other code that wants to read_trylock() this lock */
122static __inline__ void __raw_write_lock(raw_rwlock_t *rw)
123{
124 unsigned long flags;
125retry:
126 local_irq_save(flags);
127 __raw_spin_lock_flags(&rw->lock, flags);
128
129 if (rw->counter != 0) {
130 __raw_spin_unlock(&rw->lock);
131 local_irq_restore(flags);
132
133 while (rw->counter != 0)
134 cpu_relax();
135
136 goto retry;
137 }
138
139 rw->counter = -1; /* mark as write-locked */
140 mb();
141 local_irq_restore(flags);
142}
143
144static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
145{
146 rw->counter = 0;
147 __raw_spin_unlock(&rw->lock);
148}
149
150/* Note that we have to ensure interrupts are disabled in case we're
151 * interrupted by some other code that wants to read_trylock() this lock */
152static __inline__ int __raw_write_trylock(raw_rwlock_t *rw)
153{
154 unsigned long flags;
155 int result = 0;
156
157 local_irq_save(flags);
158 if (__raw_spin_trylock(&rw->lock)) {
159 if (rw->counter == 0) {
160 rw->counter = -1;
161 result = 1;
162 } else {
163 /* Read-locked. Oh well. */
164 __raw_spin_unlock(&rw->lock);
165 }
166 }
167 local_irq_restore(flags);
168
169 return result;
170}
171
172/*
173 * read_can_lock - would read_trylock() succeed?
174 * @lock: the rwlock in question.
175 */
176static __inline__ int __raw_read_can_lock(raw_rwlock_t *rw)
177{
178 return rw->counter >= 0;
179}
180
181/*
182 * write_can_lock - would write_trylock() succeed?
183 * @lock: the rwlock in question.
184 */
185static __inline__ int __raw_write_can_lock(raw_rwlock_t *rw)
186{
187 return !rw->counter;
188}
189
190#define _raw_spin_relax(lock) cpu_relax()
191#define _raw_read_relax(lock) cpu_relax()
192#define _raw_write_relax(lock) cpu_relax()
193
194#endif /* __ASM_SPINLOCK_H */
diff --git a/arch/parisc/include/asm/spinlock_types.h b/arch/parisc/include/asm/spinlock_types.h
new file mode 100644
index 000000000000..3f72f47cf4b2
--- /dev/null
+++ b/arch/parisc/include/asm/spinlock_types.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SPINLOCK_TYPES_H
2#define __ASM_SPINLOCK_TYPES_H
3
4typedef struct {
5#ifdef CONFIG_PA20
6 volatile unsigned int slock;
7# define __RAW_SPIN_LOCK_UNLOCKED { 1 }
8#else
9 volatile unsigned int lock[4];
10# define __RAW_SPIN_LOCK_UNLOCKED { { 1, 1, 1, 1 } }
11#endif
12} raw_spinlock_t;
13
14typedef struct {
15 raw_spinlock_t lock;
16 volatile int counter;
17} raw_rwlock_t;
18
19#define __RAW_RW_LOCK_UNLOCKED { __RAW_SPIN_LOCK_UNLOCKED, 0 }
20
21#endif
diff --git a/arch/parisc/include/asm/stat.h b/arch/parisc/include/asm/stat.h
new file mode 100644
index 000000000000..9d5fbbc5c31f
--- /dev/null
+++ b/arch/parisc/include/asm/stat.h
@@ -0,0 +1,100 @@
1#ifndef _PARISC_STAT_H
2#define _PARISC_STAT_H
3
4#include <linux/types.h>
5
6struct stat {
7 unsigned int st_dev; /* dev_t is 32 bits on parisc */
8 ino_t st_ino; /* 32 bits */
9 mode_t st_mode; /* 16 bits */
10 nlink_t st_nlink; /* 16 bits */
11 unsigned short st_reserved1; /* old st_uid */
12 unsigned short st_reserved2; /* old st_gid */
13 unsigned int st_rdev;
14 off_t st_size;
15 time_t st_atime;
16 unsigned int st_atime_nsec;
17 time_t st_mtime;
18 unsigned int st_mtime_nsec;
19 time_t st_ctime;
20 unsigned int st_ctime_nsec;
21 int st_blksize;
22 int st_blocks;
23 unsigned int __unused1; /* ACL stuff */
24 unsigned int __unused2; /* network */
25 ino_t __unused3; /* network */
26 unsigned int __unused4; /* cnodes */
27 unsigned short __unused5; /* netsite */
28 short st_fstype;
29 unsigned int st_realdev;
30 unsigned short st_basemode;
31 unsigned short st_spareshort;
32 uid_t st_uid;
33 gid_t st_gid;
34 unsigned int st_spare4[3];
35};
36
37#define STAT_HAVE_NSEC
38
39typedef __kernel_off64_t off64_t;
40
41struct hpux_stat64 {
42 unsigned int st_dev; /* dev_t is 32 bits on parisc */
43 ino_t st_ino; /* 32 bits */
44 mode_t st_mode; /* 16 bits */
45 nlink_t st_nlink; /* 16 bits */
46 unsigned short st_reserved1; /* old st_uid */
47 unsigned short st_reserved2; /* old st_gid */
48 unsigned int st_rdev;
49 off64_t st_size;
50 time_t st_atime;
51 unsigned int st_spare1;
52 time_t st_mtime;
53 unsigned int st_spare2;
54 time_t st_ctime;
55 unsigned int st_spare3;
56 int st_blksize;
57 __u64 st_blocks;
58 unsigned int __unused1; /* ACL stuff */
59 unsigned int __unused2; /* network */
60 ino_t __unused3; /* network */
61 unsigned int __unused4; /* cnodes */
62 unsigned short __unused5; /* netsite */
63 short st_fstype;
64 unsigned int st_realdev;
65 unsigned short st_basemode;
66 unsigned short st_spareshort;
67 uid_t st_uid;
68 gid_t st_gid;
69 unsigned int st_spare4[3];
70};
71
72/* This is the struct that 32-bit userspace applications are expecting.
73 * How 64-bit apps are going to be compiled, I have no idea. But at least
74 * this way, we don't have a wrapper in the kernel.
75 */
76struct stat64 {
77 unsigned long long st_dev;
78 unsigned int __pad1;
79
80 unsigned int __st_ino; /* Not actually filled in */
81 unsigned int st_mode;
82 unsigned int st_nlink;
83 unsigned int st_uid;
84 unsigned int st_gid;
85 unsigned long long st_rdev;
86 unsigned int __pad2;
87 signed long long st_size;
88 signed int st_blksize;
89
90 signed long long st_blocks;
91 signed int st_atime;
92 unsigned int st_atime_nsec;
93 signed int st_mtime;
94 unsigned int st_mtime_nsec;
95 signed int st_ctime;
96 unsigned int st_ctime_nsec;
97 unsigned long long st_ino;
98};
99
100#endif
diff --git a/arch/parisc/include/asm/statfs.h b/arch/parisc/include/asm/statfs.h
new file mode 100644
index 000000000000..324bea905dc6
--- /dev/null
+++ b/arch/parisc/include/asm/statfs.h
@@ -0,0 +1,7 @@
1#ifndef _PARISC_STATFS_H
2#define _PARISC_STATFS_H
3
4#define __statfs_word long
5#include <asm-generic/statfs.h>
6
7#endif
diff --git a/arch/parisc/include/asm/string.h b/arch/parisc/include/asm/string.h
new file mode 100644
index 000000000000..eda01be65e35
--- /dev/null
+++ b/arch/parisc/include/asm/string.h
@@ -0,0 +1,10 @@
1#ifndef _PA_STRING_H_
2#define _PA_STRING_H_
3
4#define __HAVE_ARCH_MEMSET
5extern void * memset(void *, int, size_t);
6
7#define __HAVE_ARCH_MEMCPY
8void * memcpy(void * dest,const void *src,size_t count);
9
10#endif
diff --git a/arch/parisc/include/asm/superio.h b/arch/parisc/include/asm/superio.h
new file mode 100644
index 000000000000..6598acb4d46d
--- /dev/null
+++ b/arch/parisc/include/asm/superio.h
@@ -0,0 +1,85 @@
1#ifndef _PARISC_SUPERIO_H
2#define _PARISC_SUPERIO_H
3
4#define IC_PIC1 0x20 /* PCI I/O address of master 8259 */
5#define IC_PIC2 0xA0 /* PCI I/O address of slave */
6
7/* Config Space Offsets to configuration and base address registers */
8#define SIO_CR 0x5A /* Configuration Register */
9#define SIO_ACPIBAR 0x88 /* ACPI BAR */
10#define SIO_FDCBAR 0x90 /* Floppy Disk Controller BAR */
11#define SIO_SP1BAR 0x94 /* Serial 1 BAR */
12#define SIO_SP2BAR 0x98 /* Serial 2 BAR */
13#define SIO_PPBAR 0x9C /* Parallel BAR */
14
15#define TRIGGER_1 0x67 /* Edge/level trigger register 1 */
16#define TRIGGER_2 0x68 /* Edge/level trigger register 2 */
17
18/* Interrupt Routing Control registers */
19#define CFG_IR_SER 0x69 /* Serial 1 [0:3] and Serial 2 [4:7] */
20#define CFG_IR_PFD 0x6a /* Parallel [0:3] and Floppy [4:7] */
21#define CFG_IR_IDE 0x6b /* IDE1 [0:3] and IDE2 [4:7] */
22#define CFG_IR_INTAB 0x6c /* PCI INTA [0:3] and INT B [4:7] */
23#define CFG_IR_INTCD 0x6d /* PCI INTC [0:3] and INT D [4:7] */
24#define CFG_IR_PS2 0x6e /* PS/2 KBINT [0:3] and Mouse [4:7] */
25#define CFG_IR_FXBUS 0x6f /* FXIRQ[0] [0:3] and FXIRQ[1] [4:7] */
26#define CFG_IR_USB 0x70 /* FXIRQ[2] [0:3] and USB [4:7] */
27#define CFG_IR_ACPI 0x71 /* ACPI SCI [0:3] and reserved [4:7] */
28
29#define CFG_IR_LOW CFG_IR_SER /* Lowest interrupt routing reg */
30#define CFG_IR_HIGH CFG_IR_ACPI /* Highest interrupt routing reg */
31
32/* 8259 operational control words */
33#define OCW2_EOI 0x20 /* Non-specific EOI */
34#define OCW2_SEOI 0x60 /* Specific EOI */
35#define OCW3_IIR 0x0A /* Read request register */
36#define OCW3_ISR 0x0B /* Read service register */
37#define OCW3_POLL 0x0C /* Poll the PIC for an interrupt vector */
38
39/* Interrupt lines. Only PIC1 is used */
40#define USB_IRQ 1 /* USB */
41#define SP1_IRQ 3 /* Serial port 1 */
42#define SP2_IRQ 4 /* Serial port 2 */
43#define PAR_IRQ 5 /* Parallel port */
44#define FDC_IRQ 6 /* Floppy controller */
45#define IDE_IRQ 7 /* IDE (pri+sec) */
46
47/* ACPI registers */
48#define USB_REG_CR 0x1f /* USB Regulator Control Register */
49
50#define SUPERIO_NIRQS 8
51
52struct superio_device {
53 u32 fdc_base;
54 u32 sp1_base;
55 u32 sp2_base;
56 u32 pp_base;
57 u32 acpi_base;
58 int suckyio_irq_enabled;
59 struct pci_dev *lio_pdev; /* pci device for legacy IO (fn 1) */
60 struct pci_dev *usb_pdev; /* pci device for USB (fn 2) */
61};
62
63/*
64 * Does NS make a 87415 based plug in PCI card? If so, because of this
65 * macro we currently don't support it being plugged into a machine
66 * that contains a SuperIO chip AND has CONFIG_SUPERIO enabled.
67 *
68 * This could be fixed by checking to see if function 1 exists, and
69 * if it is SuperIO Legacy IO; but really now, is this combination
70 * going to EVER happen?
71 */
72
73#define SUPERIO_IDE_FN 0 /* Function number of IDE controller */
74#define SUPERIO_LIO_FN 1 /* Function number of Legacy IO controller */
75#define SUPERIO_USB_FN 2 /* Function number of USB controller */
76
77#define is_superio_device(x) \
78 (((x)->vendor == PCI_VENDOR_ID_NS) && \
79 ( ((x)->device == PCI_DEVICE_ID_NS_87415) \
80 || ((x)->device == PCI_DEVICE_ID_NS_87560_LIO) \
81 || ((x)->device == PCI_DEVICE_ID_NS_87560_USB) ) )
82
83extern int superio_fixup_irq(struct pci_dev *pcidev); /* called by iosapic */
84
85#endif /* _PARISC_SUPERIO_H */
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h
new file mode 100644
index 000000000000..ee80c920b464
--- /dev/null
+++ b/arch/parisc/include/asm/system.h
@@ -0,0 +1,182 @@
1#ifndef __PARISC_SYSTEM_H
2#define __PARISC_SYSTEM_H
3
4#include <asm/psw.h>
5
6/* The program status word as bitfields. */
7struct pa_psw {
8 unsigned int y:1;
9 unsigned int z:1;
10 unsigned int rv:2;
11 unsigned int w:1;
12 unsigned int e:1;
13 unsigned int s:1;
14 unsigned int t:1;
15
16 unsigned int h:1;
17 unsigned int l:1;
18 unsigned int n:1;
19 unsigned int x:1;
20 unsigned int b:1;
21 unsigned int c:1;
22 unsigned int v:1;
23 unsigned int m:1;
24
25 unsigned int cb:8;
26
27 unsigned int o:1;
28 unsigned int g:1;
29 unsigned int f:1;
30 unsigned int r:1;
31 unsigned int q:1;
32 unsigned int p:1;
33 unsigned int d:1;
34 unsigned int i:1;
35};
36
37#ifdef CONFIG_64BIT
38#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
39#else
40#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
41#endif
42
43struct task_struct;
44
45extern struct task_struct *_switch_to(struct task_struct *, struct task_struct *);
46
47#define switch_to(prev, next, last) do { \
48 (last) = _switch_to(prev, next); \
49} while(0)
50
51/* interrupt control */
52#define local_save_flags(x) __asm__ __volatile__("ssm 0, %0" : "=r" (x) : : "memory")
53#define local_irq_disable() __asm__ __volatile__("rsm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
54#define local_irq_enable() __asm__ __volatile__("ssm %0,%%r0\n" : : "i" (PSW_I) : "memory" )
55
56#define local_irq_save(x) \
57 __asm__ __volatile__("rsm %1,%0" : "=r" (x) :"i" (PSW_I) : "memory" )
58#define local_irq_restore(x) \
59 __asm__ __volatile__("mtsm %0" : : "r" (x) : "memory" )
60
61#define irqs_disabled() \
62({ \
63 unsigned long flags; \
64 local_save_flags(flags); \
65 (flags & PSW_I) == 0; \
66})
67
68#define mfctl(reg) ({ \
69 unsigned long cr; \
70 __asm__ __volatile__( \
71 "mfctl " #reg ",%0" : \
72 "=r" (cr) \
73 ); \
74 cr; \
75})
76
77#define mtctl(gr, cr) \
78 __asm__ __volatile__("mtctl %0,%1" \
79 : /* no outputs */ \
80 : "r" (gr), "i" (cr) : "memory")
81
82/* these are here to de-mystefy the calling code, and to provide hooks */
83/* which I needed for debugging EIEM problems -PB */
84#define get_eiem() mfctl(15)
85static inline void set_eiem(unsigned long val)
86{
87 mtctl(val, 15);
88}
89
90#define mfsp(reg) ({ \
91 unsigned long cr; \
92 __asm__ __volatile__( \
93 "mfsp " #reg ",%0" : \
94 "=r" (cr) \
95 ); \
96 cr; \
97})
98
99#define mtsp(gr, cr) \
100 __asm__ __volatile__("mtsp %0,%1" \
101 : /* no outputs */ \
102 : "r" (gr), "i" (cr) : "memory")
103
104
105/*
106** This is simply the barrier() macro from linux/kernel.h but when serial.c
107** uses tqueue.h uses smp_mb() defined using barrier(), linux/kernel.h
108** hasn't yet been included yet so it fails, thus repeating the macro here.
109**
110** PA-RISC architecture allows for weakly ordered memory accesses although
111** none of the processors use it. There is a strong ordered bit that is
112** set in the O-bit of the page directory entry. Operating systems that
113** can not tolerate out of order accesses should set this bit when mapping
114** pages. The O-bit of the PSW should also be set to 1 (I don't believe any
115** of the processor implemented the PSW O-bit). The PCX-W ERS states that
116** the TLB O-bit is not implemented so the page directory does not need to
117** have the O-bit set when mapping pages (section 3.1). This section also
118** states that the PSW Y, Z, G, and O bits are not implemented.
119** So it looks like nothing needs to be done for parisc-linux (yet).
120** (thanks to chada for the above comment -ggg)
121**
122** The __asm__ op below simple prevents gcc/ld from reordering
123** instructions across the mb() "call".
124*/
125#define mb() __asm__ __volatile__("":::"memory") /* barrier() */
126#define rmb() mb()
127#define wmb() mb()
128#define smp_mb() mb()
129#define smp_rmb() mb()
130#define smp_wmb() mb()
131#define smp_read_barrier_depends() do { } while(0)
132#define read_barrier_depends() do { } while(0)
133
134#define set_mb(var, value) do { var = value; mb(); } while (0)
135
136#ifndef CONFIG_PA20
137/* Because kmalloc only guarantees 8-byte alignment for kmalloc'd data,
138 and GCC only guarantees 8-byte alignment for stack locals, we can't
139 be assured of 16-byte alignment for atomic lock data even if we
140 specify "__attribute ((aligned(16)))" in the type declaration. So,
141 we use a struct containing an array of four ints for the atomic lock
142 type and dynamically select the 16-byte aligned int from the array
143 for the semaphore. */
144
145#define __PA_LDCW_ALIGNMENT 16
146#define __ldcw_align(a) ({ \
147 unsigned long __ret = (unsigned long) &(a)->lock[0]; \
148 __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
149 & ~(__PA_LDCW_ALIGNMENT - 1); \
150 (volatile unsigned int *) __ret; \
151})
152#define __LDCW "ldcw"
153
154#else /*CONFIG_PA20*/
155/* From: "Jim Hull" <jim.hull of hp.com>
156 I've attached a summary of the change, but basically, for PA 2.0, as
157 long as the ",CO" (coherent operation) completer is specified, then the
158 16-byte alignment requirement for ldcw and ldcd is relaxed, and instead
159 they only require "natural" alignment (4-byte for ldcw, 8-byte for
160 ldcd). */
161
162#define __PA_LDCW_ALIGNMENT 4
163#define __ldcw_align(a) ((volatile unsigned int *)a)
164#define __LDCW "ldcw,co"
165
166#endif /*!CONFIG_PA20*/
167
168/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
169#define __ldcw(a) ({ \
170 unsigned __ret; \
171 __asm__ __volatile__(__LDCW " 0(%1),%0" \
172 : "=r" (__ret) : "r" (a)); \
173 __ret; \
174})
175
176#ifdef CONFIG_SMP
177# define __lock_aligned __attribute__((__section__(".data.lock_aligned")))
178#endif
179
180#define arch_align_stack(x) (x)
181
182#endif
diff --git a/arch/parisc/include/asm/termbits.h b/arch/parisc/include/asm/termbits.h
new file mode 100644
index 000000000000..d8bbc73b16b7
--- /dev/null
+++ b/arch/parisc/include/asm/termbits.h
@@ -0,0 +1,200 @@
1#ifndef __ARCH_PARISC_TERMBITS_H__
2#define __ARCH_PARISC_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20struct termios2 {
21 tcflag_t c_iflag; /* input mode flags */
22 tcflag_t c_oflag; /* output mode flags */
23 tcflag_t c_cflag; /* control mode flags */
24 tcflag_t c_lflag; /* local mode flags */
25 cc_t c_line; /* line discipline */
26 cc_t c_cc[NCCS]; /* control characters */
27 speed_t c_ispeed; /* input speed */
28 speed_t c_ospeed; /* output speed */
29};
30
31struct ktermios {
32 tcflag_t c_iflag; /* input mode flags */
33 tcflag_t c_oflag; /* output mode flags */
34 tcflag_t c_cflag; /* control mode flags */
35 tcflag_t c_lflag; /* local mode flags */
36 cc_t c_line; /* line discipline */
37 cc_t c_cc[NCCS]; /* control characters */
38 speed_t c_ispeed; /* input speed */
39 speed_t c_ospeed; /* output speed */
40};
41
42/* c_cc characters */
43#define VINTR 0
44#define VQUIT 1
45#define VERASE 2
46#define VKILL 3
47#define VEOF 4
48#define VTIME 5
49#define VMIN 6
50#define VSWTC 7
51#define VSTART 8
52#define VSTOP 9
53#define VSUSP 10
54#define VEOL 11
55#define VREPRINT 12
56#define VDISCARD 13
57#define VWERASE 14
58#define VLNEXT 15
59#define VEOL2 16
60
61
62/* c_iflag bits */
63#define IGNBRK 0000001
64#define BRKINT 0000002
65#define IGNPAR 0000004
66#define PARMRK 0000010
67#define INPCK 0000020
68#define ISTRIP 0000040
69#define INLCR 0000100
70#define IGNCR 0000200
71#define ICRNL 0000400
72#define IUCLC 0001000
73#define IXON 0002000
74#define IXANY 0004000
75#define IXOFF 0010000
76#define IMAXBEL 0040000
77#define IUTF8 0100000
78
79/* c_oflag bits */
80#define OPOST 0000001
81#define OLCUC 0000002
82#define ONLCR 0000004
83#define OCRNL 0000010
84#define ONOCR 0000020
85#define ONLRET 0000040
86#define OFILL 0000100
87#define OFDEL 0000200
88#define NLDLY 0000400
89#define NL0 0000000
90#define NL1 0000400
91#define CRDLY 0003000
92#define CR0 0000000
93#define CR1 0001000
94#define CR2 0002000
95#define CR3 0003000
96#define TABDLY 0014000
97#define TAB0 0000000
98#define TAB1 0004000
99#define TAB2 0010000
100#define TAB3 0014000
101#define XTABS 0014000
102#define BSDLY 0020000
103#define BS0 0000000
104#define BS1 0020000
105#define VTDLY 0040000
106#define VT0 0000000
107#define VT1 0040000
108#define FFDLY 0100000
109#define FF0 0000000
110#define FF1 0100000
111
112/* c_cflag bit meaning */
113#define CBAUD 0010017
114#define B0 0000000 /* hang up */
115#define B50 0000001
116#define B75 0000002
117#define B110 0000003
118#define B134 0000004
119#define B150 0000005
120#define B200 0000006
121#define B300 0000007
122#define B600 0000010
123#define B1200 0000011
124#define B1800 0000012
125#define B2400 0000013
126#define B4800 0000014
127#define B9600 0000015
128#define B19200 0000016
129#define B38400 0000017
130#define EXTA B19200
131#define EXTB B38400
132#define CSIZE 0000060
133#define CS5 0000000
134#define CS6 0000020
135#define CS7 0000040
136#define CS8 0000060
137#define CSTOPB 0000100
138#define CREAD 0000200
139#define PARENB 0000400
140#define PARODD 0001000
141#define HUPCL 0002000
142#define CLOCAL 0004000
143#define CBAUDEX 0010000
144#define BOTHER 0010000
145#define B57600 0010001
146#define B115200 0010002
147#define B230400 0010003
148#define B460800 0010004
149#define B500000 0010005
150#define B576000 0010006
151#define B921600 0010007
152#define B1000000 0010010
153#define B1152000 0010011
154#define B1500000 0010012
155#define B2000000 0010013
156#define B2500000 0010014
157#define B3000000 0010015
158#define B3500000 0010016
159#define B4000000 0010017
160#define CIBAUD 002003600000 /* input baud rate */
161#define CMSPAR 010000000000 /* mark or space (stick) parity */
162#define CRTSCTS 020000000000 /* flow control */
163
164#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
165
166
167/* c_lflag bits */
168#define ISIG 0000001
169#define ICANON 0000002
170#define XCASE 0000004
171#define ECHO 0000010
172#define ECHOE 0000020
173#define ECHOK 0000040
174#define ECHONL 0000100
175#define NOFLSH 0000200
176#define TOSTOP 0000400
177#define ECHOCTL 0001000
178#define ECHOPRT 0002000
179#define ECHOKE 0004000
180#define FLUSHO 0010000
181#define PENDIN 0040000
182#define IEXTEN 0100000
183
184/* tcflow() and TCXONC use these */
185#define TCOOFF 0
186#define TCOON 1
187#define TCIOFF 2
188#define TCION 3
189
190/* tcflush() and TCFLSH use these */
191#define TCIFLUSH 0
192#define TCOFLUSH 1
193#define TCIOFLUSH 2
194
195/* tcsetattr uses these */
196#define TCSANOW 0
197#define TCSADRAIN 1
198#define TCSAFLUSH 2
199
200#endif
diff --git a/arch/parisc/include/asm/termios.h b/arch/parisc/include/asm/termios.h
new file mode 100644
index 000000000000..a2a57a4548af
--- /dev/null
+++ b/arch/parisc/include/asm/termios.h
@@ -0,0 +1,90 @@
1#ifndef _PARISC_TERMIOS_H
2#define _PARISC_TERMIOS_H
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42#ifdef __KERNEL__
43
44/* intr=^C quit=^\ erase=del kill=^U
45 eof=^D vtime=\0 vmin=\1 sxtc=\0
46 start=^Q stop=^S susp=^Z eol=\0
47 reprint=^R discard=^U werase=^W lnext=^V
48 eol2=\0
49*/
50#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
51
52/*
53 * Translate a "termio" structure into a "termios". Ugh.
54 */
55#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
56 unsigned short __tmp; \
57 get_user(__tmp,&(termio)->x); \
58 *(unsigned short *) &(termios)->x = __tmp; \
59}
60
61#define user_termio_to_kernel_termios(termios, termio) \
62({ \
63 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
64 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
65 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
66 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
67 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
68})
69
70/*
71 * Translate a "termios" structure into a "termio". Ugh.
72 */
73#define kernel_termios_to_user_termio(termio, termios) \
74({ \
75 put_user((termios)->c_iflag, &(termio)->c_iflag); \
76 put_user((termios)->c_oflag, &(termio)->c_oflag); \
77 put_user((termios)->c_cflag, &(termio)->c_cflag); \
78 put_user((termios)->c_lflag, &(termio)->c_lflag); \
79 put_user((termios)->c_line, &(termio)->c_line); \
80 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
81})
82
83#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
84#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
85#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
86#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
87
88#endif /* __KERNEL__ */
89
90#endif /* _PARISC_TERMIOS_H */
diff --git a/arch/parisc/include/asm/thread_info.h b/arch/parisc/include/asm/thread_info.h
new file mode 100644
index 000000000000..0407959da489
--- /dev/null
+++ b/arch/parisc/include/asm/thread_info.h
@@ -0,0 +1,76 @@
1#ifndef _ASM_PARISC_THREAD_INFO_H
2#define _ASM_PARISC_THREAD_INFO_H
3
4#ifdef __KERNEL__
5
6#ifndef __ASSEMBLY__
7#include <asm/processor.h>
8
9struct thread_info {
10 struct task_struct *task; /* main task structure */
11 struct exec_domain *exec_domain;/* execution domain */
12 unsigned long flags; /* thread_info flags (see TIF_*) */
13 mm_segment_t addr_limit; /* user-level address space limit */
14 __u32 cpu; /* current CPU */
15 int preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */
16 struct restart_block restart_block;
17};
18
19#define INIT_THREAD_INFO(tsk) \
20{ \
21 .task = &tsk, \
22 .exec_domain = &default_exec_domain, \
23 .flags = 0, \
24 .cpu = 0, \
25 .addr_limit = KERNEL_DS, \
26 .preempt_count = 1, \
27 .restart_block = { \
28 .fn = do_no_restart_syscall \
29 } \
30}
31
32#define init_thread_info (init_thread_union.thread_info)
33#define init_stack (init_thread_union.stack)
34
35/* thread information allocation */
36
37#define THREAD_SIZE_ORDER 2
38/* Be sure to hunt all references to this down when you change the size of
39 * the kernel stack */
40#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
41#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER)
42
43/* how to get the thread information struct from C */
44#define current_thread_info() ((struct thread_info *)mfctl(30))
45
46#endif /* !__ASSEMBLY */
47
48#define PREEMPT_ACTIVE_BIT 28
49#define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT)
50
51/*
52 * thread information flags
53 */
54#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
55#define TIF_SIGPENDING 1 /* signal pending */
56#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
57#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling TIF_NEED_RESCHED */
58#define TIF_32BIT 4 /* 32 bit binary */
59#define TIF_MEMDIE 5
60#define TIF_RESTORE_SIGMASK 6 /* restore saved signal mask */
61#define TIF_FREEZE 7 /* is freezing for suspend */
62
63#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
64#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
65#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
66#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
67#define _TIF_32BIT (1 << TIF_32BIT)
68#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
69#define _TIF_FREEZE (1 << TIF_FREEZE)
70
71#define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | \
72 _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
73
74#endif /* __KERNEL__ */
75
76#endif /* _ASM_PARISC_THREAD_INFO_H */
diff --git a/arch/parisc/include/asm/timex.h b/arch/parisc/include/asm/timex.h
new file mode 100644
index 000000000000..3b68d77273d9
--- /dev/null
+++ b/arch/parisc/include/asm/timex.h
@@ -0,0 +1,20 @@
1/*
2 * linux/include/asm-parisc/timex.h
3 *
4 * PARISC architecture timex specifications
5 */
6#ifndef _ASMPARISC_TIMEX_H
7#define _ASMPARISC_TIMEX_H
8
9#include <asm/system.h>
10
11#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
12
13typedef unsigned long cycles_t;
14
15static inline cycles_t get_cycles (void)
16{
17 return mfctl(16);
18}
19
20#endif
diff --git a/arch/parisc/include/asm/tlb.h b/arch/parisc/include/asm/tlb.h
new file mode 100644
index 000000000000..383b1db310ee
--- /dev/null
+++ b/arch/parisc/include/asm/tlb.h
@@ -0,0 +1,27 @@
1#ifndef _PARISC_TLB_H
2#define _PARISC_TLB_H
3
4#define tlb_flush(tlb) \
5do { if ((tlb)->fullmm) \
6 flush_tlb_mm((tlb)->mm);\
7} while (0)
8
9#define tlb_start_vma(tlb, vma) \
10do { if (!(tlb)->fullmm) \
11 flush_cache_range(vma, vma->vm_start, vma->vm_end); \
12} while (0)
13
14#define tlb_end_vma(tlb, vma) \
15do { if (!(tlb)->fullmm) \
16 flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
17} while (0)
18
19#define __tlb_remove_tlb_entry(tlb, pte, address) \
20 do { } while (0)
21
22#include <asm-generic/tlb.h>
23
24#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd)
25#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte)
26
27#endif
diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h
new file mode 100644
index 000000000000..b72ec66db699
--- /dev/null
+++ b/arch/parisc/include/asm/tlbflush.h
@@ -0,0 +1,80 @@
1#ifndef _PARISC_TLBFLUSH_H
2#define _PARISC_TLBFLUSH_H
3
4/* TLB flushing routines.... */
5
6#include <linux/mm.h>
7#include <linux/sched.h>
8#include <asm/mmu_context.h>
9
10
11/* This is for the serialisation of PxTLB broadcasts. At least on the
12 * N class systems, only one PxTLB inter processor broadcast can be
13 * active at any one time on the Merced bus. This tlb purge
14 * synchronisation is fairly lightweight and harmless so we activate
15 * it on all SMP systems not just the N class. We also need to have
16 * preemption disabled on uniprocessor machines, and spin_lock does that
17 * nicely.
18 */
19extern spinlock_t pa_tlb_lock;
20
21#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
22#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
23
24extern void flush_tlb_all(void);
25extern void flush_tlb_all_local(void *);
26
27/*
28 * flush_tlb_mm()
29 *
30 * XXX This code is NOT valid for HP-UX compatibility processes,
31 * (although it will probably work 99% of the time). HP-UX
32 * processes are free to play with the space id's and save them
33 * over long periods of time, etc. so we have to preserve the
34 * space and just flush the entire tlb. We need to check the
35 * personality in order to do that, but the personality is not
36 * currently being set correctly.
37 *
38 * Of course, Linux processes could do the same thing, but
39 * we don't support that (and the compilers, dynamic linker,
40 * etc. do not do that).
41 */
42
43static inline void flush_tlb_mm(struct mm_struct *mm)
44{
45 BUG_ON(mm == &init_mm); /* Should never happen */
46
47#ifdef CONFIG_SMP
48 flush_tlb_all();
49#else
50 if (mm) {
51 if (mm->context != 0)
52 free_sid(mm->context);
53 mm->context = alloc_sid();
54 if (mm == current->active_mm)
55 load_context(mm->context);
56 }
57#endif
58}
59
60static inline void flush_tlb_page(struct vm_area_struct *vma,
61 unsigned long addr)
62{
63 /* For one page, it's not worth testing the split_tlb variable */
64
65 mb();
66 mtsp(vma->vm_mm->context,1);
67 purge_tlb_start();
68 pdtlb(addr);
69 pitlb(addr);
70 purge_tlb_end();
71}
72
73void __flush_tlb_range(unsigned long sid,
74 unsigned long start, unsigned long end);
75
76#define flush_tlb_range(vma,start,end) __flush_tlb_range((vma)->vm_mm->context,start,end)
77
78#define flush_tlb_kernel_range(start, end) __flush_tlb_range(0,start,end)
79
80#endif
diff --git a/arch/parisc/include/asm/topology.h b/arch/parisc/include/asm/topology.h
new file mode 100644
index 000000000000..d8133eb0b1e7
--- /dev/null
+++ b/arch/parisc/include/asm/topology.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_PARISC_TOPOLOGY_H
2#define _ASM_PARISC_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_PARISC_TOPOLOGY_H */
diff --git a/arch/parisc/include/asm/traps.h b/arch/parisc/include/asm/traps.h
new file mode 100644
index 000000000000..1945f995f2df
--- /dev/null
+++ b/arch/parisc/include/asm/traps.h
@@ -0,0 +1,16 @@
1#ifndef __ASM_TRAPS_H
2#define __ASM_TRAPS_H
3
4#ifdef __KERNEL__
5struct pt_regs;
6
7/* traps.c */
8void parisc_terminate(char *msg, struct pt_regs *regs,
9 int code, unsigned long offset);
10
11/* mm/fault.c */
12void do_page_fault(struct pt_regs *regs, unsigned long code,
13 unsigned long address);
14#endif
15
16#endif
diff --git a/arch/parisc/include/asm/types.h b/arch/parisc/include/asm/types.h
new file mode 100644
index 000000000000..7f5a39bfb4ce
--- /dev/null
+++ b/arch/parisc/include/asm/types.h
@@ -0,0 +1,36 @@
1#ifndef _PARISC_TYPES_H
2#define _PARISC_TYPES_H
3
4#include <asm-generic/int-ll64.h>
5
6#ifndef __ASSEMBLY__
7
8typedef unsigned short umode_t;
9
10#endif /* __ASSEMBLY__ */
11
12/*
13 * These aren't exported outside the kernel to avoid name space clashes
14 */
15#ifdef __KERNEL__
16
17#ifdef CONFIG_64BIT
18#define BITS_PER_LONG 64
19#define SHIFT_PER_LONG 6
20#else
21#define BITS_PER_LONG 32
22#define SHIFT_PER_LONG 5
23#endif
24
25#ifndef __ASSEMBLY__
26
27/* Dma addresses are 32-bits wide. */
28
29typedef u32 dma_addr_t;
30typedef u64 dma64_addr_t;
31
32#endif /* __ASSEMBLY__ */
33
34#endif /* __KERNEL__ */
35
36#endif
diff --git a/arch/parisc/include/asm/uaccess.h b/arch/parisc/include/asm/uaccess.h
new file mode 100644
index 000000000000..4878b9501f24
--- /dev/null
+++ b/arch/parisc/include/asm/uaccess.h
@@ -0,0 +1,244 @@
1#ifndef __PARISC_UACCESS_H
2#define __PARISC_UACCESS_H
3
4/*
5 * User space memory access functions
6 */
7#include <asm/page.h>
8#include <asm/system.h>
9#include <asm/cache.h>
10#include <asm-generic/uaccess.h>
11
12#define VERIFY_READ 0
13#define VERIFY_WRITE 1
14
15#define KERNEL_DS ((mm_segment_t){0})
16#define USER_DS ((mm_segment_t){1})
17
18#define segment_eq(a,b) ((a).seg == (b).seg)
19
20#define get_ds() (KERNEL_DS)
21#define get_fs() (current_thread_info()->addr_limit)
22#define set_fs(x) (current_thread_info()->addr_limit = (x))
23
24/*
25 * Note that since kernel addresses are in a separate address space on
26 * parisc, we don't need to do anything for access_ok().
27 * We just let the page fault handler do the right thing. This also means
28 * that put_user is the same as __put_user, etc.
29 */
30
31extern int __get_kernel_bad(void);
32extern int __get_user_bad(void);
33extern int __put_kernel_bad(void);
34extern int __put_user_bad(void);
35
36static inline long access_ok(int type, const void __user * addr,
37 unsigned long size)
38{
39 return 1;
40}
41
42#define put_user __put_user
43#define get_user __get_user
44
45#if !defined(CONFIG_64BIT)
46#define LDD_KERNEL(ptr) __get_kernel_bad();
47#define LDD_USER(ptr) __get_user_bad();
48#define STD_KERNEL(x, ptr) __put_kernel_asm64(x,ptr)
49#define STD_USER(x, ptr) __put_user_asm64(x,ptr)
50#define ASM_WORD_INSN ".word\t"
51#else
52#define LDD_KERNEL(ptr) __get_kernel_asm("ldd",ptr)
53#define LDD_USER(ptr) __get_user_asm("ldd",ptr)
54#define STD_KERNEL(x, ptr) __put_kernel_asm("std",x,ptr)
55#define STD_USER(x, ptr) __put_user_asm("std",x,ptr)
56#define ASM_WORD_INSN ".dword\t"
57#endif
58
59/*
60 * The exception table contains two values: the first is an address
61 * for an instruction that is allowed to fault, and the second is
62 * the address to the fixup routine.
63 */
64
65struct exception_table_entry {
66 unsigned long insn; /* address of insn that is allowed to fault. */
67 long fixup; /* fixup routine */
68};
69
70#define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
71 ".section __ex_table,\"aw\"\n" \
72 ASM_WORD_INSN #fault_addr ", " #except_addr "\n\t" \
73 ".previous\n"
74
75/*
76 * The page fault handler stores, in a per-cpu area, the following information
77 * if a fixup routine is available.
78 */
79struct exception_data {
80 unsigned long fault_ip;
81 unsigned long fault_space;
82 unsigned long fault_addr;
83};
84
85#define __get_user(x,ptr) \
86({ \
87 register long __gu_err __asm__ ("r8") = 0; \
88 register long __gu_val __asm__ ("r9") = 0; \
89 \
90 if (segment_eq(get_fs(),KERNEL_DS)) { \
91 switch (sizeof(*(ptr))) { \
92 case 1: __get_kernel_asm("ldb",ptr); break; \
93 case 2: __get_kernel_asm("ldh",ptr); break; \
94 case 4: __get_kernel_asm("ldw",ptr); break; \
95 case 8: LDD_KERNEL(ptr); break; \
96 default: __get_kernel_bad(); break; \
97 } \
98 } \
99 else { \
100 switch (sizeof(*(ptr))) { \
101 case 1: __get_user_asm("ldb",ptr); break; \
102 case 2: __get_user_asm("ldh",ptr); break; \
103 case 4: __get_user_asm("ldw",ptr); break; \
104 case 8: LDD_USER(ptr); break; \
105 default: __get_user_bad(); break; \
106 } \
107 } \
108 \
109 (x) = (__typeof__(*(ptr))) __gu_val; \
110 __gu_err; \
111})
112
113#define __get_kernel_asm(ldx,ptr) \
114 __asm__("\n1:\t" ldx "\t0(%2),%0\n\t" \
115 ASM_EXCEPTIONTABLE_ENTRY(1b, fixup_get_user_skip_1)\
116 : "=r"(__gu_val), "=r"(__gu_err) \
117 : "r"(ptr), "1"(__gu_err) \
118 : "r1");
119
120#define __get_user_asm(ldx,ptr) \
121 __asm__("\n1:\t" ldx "\t0(%%sr3,%2),%0\n\t" \
122 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_get_user_skip_1)\
123 : "=r"(__gu_val), "=r"(__gu_err) \
124 : "r"(ptr), "1"(__gu_err) \
125 : "r1");
126
127#define __put_user(x,ptr) \
128({ \
129 register long __pu_err __asm__ ("r8") = 0; \
130 __typeof__(*(ptr)) __x = (__typeof__(*(ptr)))(x); \
131 \
132 if (segment_eq(get_fs(),KERNEL_DS)) { \
133 switch (sizeof(*(ptr))) { \
134 case 1: __put_kernel_asm("stb",__x,ptr); break; \
135 case 2: __put_kernel_asm("sth",__x,ptr); break; \
136 case 4: __put_kernel_asm("stw",__x,ptr); break; \
137 case 8: STD_KERNEL(__x,ptr); break; \
138 default: __put_kernel_bad(); break; \
139 } \
140 } \
141 else { \
142 switch (sizeof(*(ptr))) { \
143 case 1: __put_user_asm("stb",__x,ptr); break; \
144 case 2: __put_user_asm("sth",__x,ptr); break; \
145 case 4: __put_user_asm("stw",__x,ptr); break; \
146 case 8: STD_USER(__x,ptr); break; \
147 default: __put_user_bad(); break; \
148 } \
149 } \
150 \
151 __pu_err; \
152})
153
154/*
155 * The "__put_user/kernel_asm()" macros tell gcc they read from memory
156 * instead of writing. This is because they do not write to any memory
157 * gcc knows about, so there are no aliasing issues. These macros must
158 * also be aware that "fixup_put_user_skip_[12]" are executed in the
159 * context of the fault, and any registers used there must be listed
160 * as clobbers. In this case only "r1" is used by the current routines.
161 * r8/r9 are already listed as err/val.
162 */
163
164#define __put_kernel_asm(stx,x,ptr) \
165 __asm__ __volatile__ ( \
166 "\n1:\t" stx "\t%2,0(%1)\n\t" \
167 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
168 : "=r"(__pu_err) \
169 : "r"(ptr), "r"(x), "0"(__pu_err) \
170 : "r1")
171
172#define __put_user_asm(stx,x,ptr) \
173 __asm__ __volatile__ ( \
174 "\n1:\t" stx "\t%2,0(%%sr3,%1)\n\t" \
175 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_1)\
176 : "=r"(__pu_err) \
177 : "r"(ptr), "r"(x), "0"(__pu_err) \
178 : "r1")
179
180
181#if !defined(CONFIG_64BIT)
182
183#define __put_kernel_asm64(__val,ptr) do { \
184 u64 __val64 = (u64)(__val); \
185 u32 hi = (__val64) >> 32; \
186 u32 lo = (__val64) & 0xffffffff; \
187 __asm__ __volatile__ ( \
188 "\n1:\tstw %2,0(%1)" \
189 "\n2:\tstw %3,4(%1)\n\t" \
190 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
191 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
192 : "=r"(__pu_err) \
193 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
194 : "r1"); \
195} while (0)
196
197#define __put_user_asm64(__val,ptr) do { \
198 u64 __val64 = (u64)(__val); \
199 u32 hi = (__val64) >> 32; \
200 u32 lo = (__val64) & 0xffffffff; \
201 __asm__ __volatile__ ( \
202 "\n1:\tstw %2,0(%%sr3,%1)" \
203 "\n2:\tstw %3,4(%%sr3,%1)\n\t" \
204 ASM_EXCEPTIONTABLE_ENTRY(1b,fixup_put_user_skip_2)\
205 ASM_EXCEPTIONTABLE_ENTRY(2b,fixup_put_user_skip_1)\
206 : "=r"(__pu_err) \
207 : "r"(ptr), "r"(hi), "r"(lo), "0"(__pu_err) \
208 : "r1"); \
209} while (0)
210
211#endif /* !defined(CONFIG_64BIT) */
212
213
214/*
215 * Complex access routines -- external declarations
216 */
217
218extern unsigned long lcopy_to_user(void __user *, const void *, unsigned long);
219extern unsigned long lcopy_from_user(void *, const void __user *, unsigned long);
220extern unsigned long lcopy_in_user(void __user *, const void __user *, unsigned long);
221extern long lstrncpy_from_user(char *, const char __user *, long);
222extern unsigned lclear_user(void __user *,unsigned long);
223extern long lstrnlen_user(const char __user *,long);
224
225/*
226 * Complex access routines -- macros
227 */
228
229#define strncpy_from_user lstrncpy_from_user
230#define strnlen_user lstrnlen_user
231#define strlen_user(str) lstrnlen_user(str, 0x7fffffffL)
232#define clear_user lclear_user
233#define __clear_user lclear_user
234
235unsigned long copy_to_user(void __user *dst, const void *src, unsigned long len);
236#define __copy_to_user copy_to_user
237unsigned long copy_from_user(void *dst, const void __user *src, unsigned long len);
238#define __copy_from_user copy_from_user
239unsigned long copy_in_user(void __user *dst, const void __user *src, unsigned long len);
240#define __copy_in_user copy_in_user
241#define __copy_to_user_inatomic __copy_to_user
242#define __copy_from_user_inatomic __copy_from_user
243
244#endif /* __PARISC_UACCESS_H */
diff --git a/arch/parisc/include/asm/ucontext.h b/arch/parisc/include/asm/ucontext.h
new file mode 100644
index 000000000000..6c8883e4b0bd
--- /dev/null
+++ b/arch/parisc/include/asm/ucontext.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_PARISC_UCONTEXT_H
2#define _ASM_PARISC_UCONTEXT_H
3
4struct ucontext {
5 unsigned int uc_flags;
6 struct ucontext *uc_link;
7 stack_t uc_stack;
8 struct sigcontext uc_mcontext;
9 sigset_t uc_sigmask; /* mask last for extensibility */
10};
11
12#endif /* !_ASM_PARISC_UCONTEXT_H */
diff --git a/arch/parisc/include/asm/unaligned.h b/arch/parisc/include/asm/unaligned.h
new file mode 100644
index 000000000000..dfc5d3321a54
--- /dev/null
+++ b/arch/parisc/include/asm/unaligned.h
@@ -0,0 +1,16 @@
1#ifndef _ASM_PARISC_UNALIGNED_H
2#define _ASM_PARISC_UNALIGNED_H
3
4#include <linux/unaligned/be_struct.h>
5#include <linux/unaligned/le_byteshift.h>
6#include <linux/unaligned/generic.h>
7#define get_unaligned __get_unaligned_be
8#define put_unaligned __put_unaligned_be
9
10#ifdef __KERNEL__
11struct pt_regs;
12void handle_unaligned(struct pt_regs *regs);
13int check_unaligned(struct pt_regs *regs);
14#endif
15
16#endif /* _ASM_PARISC_UNALIGNED_H */
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h
new file mode 100644
index 000000000000..ef26b009dc5d
--- /dev/null
+++ b/arch/parisc/include/asm/unistd.h
@@ -0,0 +1,997 @@
1#ifndef _ASM_PARISC_UNISTD_H_
2#define _ASM_PARISC_UNISTD_H_
3
4/*
5 * This file contains the system call numbers.
6 */
7
8/*
9 * HP-UX system calls get their native numbers for binary compatibility.
10 */
11
12#define __NR_HPUX_exit 1
13#define __NR_HPUX_fork 2
14#define __NR_HPUX_read 3
15#define __NR_HPUX_write 4
16#define __NR_HPUX_open 5
17#define __NR_HPUX_close 6
18#define __NR_HPUX_wait 7
19#define __NR_HPUX_creat 8
20#define __NR_HPUX_link 9
21#define __NR_HPUX_unlink 10
22#define __NR_HPUX_execv 11
23#define __NR_HPUX_chdir 12
24#define __NR_HPUX_time 13
25#define __NR_HPUX_mknod 14
26#define __NR_HPUX_chmod 15
27#define __NR_HPUX_chown 16
28#define __NR_HPUX_break 17
29#define __NR_HPUX_lchmod 18
30#define __NR_HPUX_lseek 19
31#define __NR_HPUX_getpid 20
32#define __NR_HPUX_mount 21
33#define __NR_HPUX_umount 22
34#define __NR_HPUX_setuid 23
35#define __NR_HPUX_getuid 24
36#define __NR_HPUX_stime 25
37#define __NR_HPUX_ptrace 26
38#define __NR_HPUX_alarm 27
39#define __NR_HPUX_oldfstat 28
40#define __NR_HPUX_pause 29
41#define __NR_HPUX_utime 30
42#define __NR_HPUX_stty 31
43#define __NR_HPUX_gtty 32
44#define __NR_HPUX_access 33
45#define __NR_HPUX_nice 34
46#define __NR_HPUX_ftime 35
47#define __NR_HPUX_sync 36
48#define __NR_HPUX_kill 37
49#define __NR_HPUX_stat 38
50#define __NR_HPUX_setpgrp3 39
51#define __NR_HPUX_lstat 40
52#define __NR_HPUX_dup 41
53#define __NR_HPUX_pipe 42
54#define __NR_HPUX_times 43
55#define __NR_HPUX_profil 44
56#define __NR_HPUX_ki_call 45
57#define __NR_HPUX_setgid 46
58#define __NR_HPUX_getgid 47
59#define __NR_HPUX_sigsys 48
60#define __NR_HPUX_reserved1 49
61#define __NR_HPUX_reserved2 50
62#define __NR_HPUX_acct 51
63#define __NR_HPUX_set_userthreadid 52
64#define __NR_HPUX_oldlock 53
65#define __NR_HPUX_ioctl 54
66#define __NR_HPUX_reboot 55
67#define __NR_HPUX_symlink 56
68#define __NR_HPUX_utssys 57
69#define __NR_HPUX_readlink 58
70#define __NR_HPUX_execve 59
71#define __NR_HPUX_umask 60
72#define __NR_HPUX_chroot 61
73#define __NR_HPUX_fcntl 62
74#define __NR_HPUX_ulimit 63
75#define __NR_HPUX_getpagesize 64
76#define __NR_HPUX_mremap 65
77#define __NR_HPUX_vfork 66
78#define __NR_HPUX_vread 67
79#define __NR_HPUX_vwrite 68
80#define __NR_HPUX_sbrk 69
81#define __NR_HPUX_sstk 70
82#define __NR_HPUX_mmap 71
83#define __NR_HPUX_vadvise 72
84#define __NR_HPUX_munmap 73
85#define __NR_HPUX_mprotect 74
86#define __NR_HPUX_madvise 75
87#define __NR_HPUX_vhangup 76
88#define __NR_HPUX_swapoff 77
89#define __NR_HPUX_mincore 78
90#define __NR_HPUX_getgroups 79
91#define __NR_HPUX_setgroups 80
92#define __NR_HPUX_getpgrp2 81
93#define __NR_HPUX_setpgrp2 82
94#define __NR_HPUX_setitimer 83
95#define __NR_HPUX_wait3 84
96#define __NR_HPUX_swapon 85
97#define __NR_HPUX_getitimer 86
98#define __NR_HPUX_gethostname42 87
99#define __NR_HPUX_sethostname42 88
100#define __NR_HPUX_getdtablesize 89
101#define __NR_HPUX_dup2 90
102#define __NR_HPUX_getdopt 91
103#define __NR_HPUX_fstat 92
104#define __NR_HPUX_select 93
105#define __NR_HPUX_setdopt 94
106#define __NR_HPUX_fsync 95
107#define __NR_HPUX_setpriority 96
108#define __NR_HPUX_socket_old 97
109#define __NR_HPUX_connect_old 98
110#define __NR_HPUX_accept_old 99
111#define __NR_HPUX_getpriority 100
112#define __NR_HPUX_send_old 101
113#define __NR_HPUX_recv_old 102
114#define __NR_HPUX_socketaddr_old 103
115#define __NR_HPUX_bind_old 104
116#define __NR_HPUX_setsockopt_old 105
117#define __NR_HPUX_listen_old 106
118#define __NR_HPUX_vtimes_old 107
119#define __NR_HPUX_sigvector 108
120#define __NR_HPUX_sigblock 109
121#define __NR_HPUX_siggetmask 110
122#define __NR_HPUX_sigpause 111
123#define __NR_HPUX_sigstack 112
124#define __NR_HPUX_recvmsg_old 113
125#define __NR_HPUX_sendmsg_old 114
126#define __NR_HPUX_vtrace_old 115
127#define __NR_HPUX_gettimeofday 116
128#define __NR_HPUX_getrusage 117
129#define __NR_HPUX_getsockopt_old 118
130#define __NR_HPUX_resuba_old 119
131#define __NR_HPUX_readv 120
132#define __NR_HPUX_writev 121
133#define __NR_HPUX_settimeofday 122
134#define __NR_HPUX_fchown 123
135#define __NR_HPUX_fchmod 124
136#define __NR_HPUX_recvfrom_old 125
137#define __NR_HPUX_setresuid 126
138#define __NR_HPUX_setresgid 127
139#define __NR_HPUX_rename 128
140#define __NR_HPUX_truncate 129
141#define __NR_HPUX_ftruncate 130
142#define __NR_HPUX_flock_old 131
143#define __NR_HPUX_sysconf 132
144#define __NR_HPUX_sendto_old 133
145#define __NR_HPUX_shutdown_old 134
146#define __NR_HPUX_socketpair_old 135
147#define __NR_HPUX_mkdir 136
148#define __NR_HPUX_rmdir 137
149#define __NR_HPUX_utimes_old 138
150#define __NR_HPUX_sigcleanup_old 139
151#define __NR_HPUX_setcore 140
152#define __NR_HPUX_getpeername_old 141
153#define __NR_HPUX_gethostid 142
154#define __NR_HPUX_sethostid 143
155#define __NR_HPUX_getrlimit 144
156#define __NR_HPUX_setrlimit 145
157#define __NR_HPUX_killpg_old 146
158#define __NR_HPUX_cachectl 147
159#define __NR_HPUX_quotactl 148
160#define __NR_HPUX_get_sysinfo 149
161#define __NR_HPUX_getsockname_old 150
162#define __NR_HPUX_privgrp 151
163#define __NR_HPUX_rtprio 152
164#define __NR_HPUX_plock 153
165#define __NR_HPUX_reserved3 154
166#define __NR_HPUX_lockf 155
167#define __NR_HPUX_semget 156
168#define __NR_HPUX_osemctl 157
169#define __NR_HPUX_semop 158
170#define __NR_HPUX_msgget 159
171#define __NR_HPUX_omsgctl 160
172#define __NR_HPUX_msgsnd 161
173#define __NR_HPUX_msgrecv 162
174#define __NR_HPUX_shmget 163
175#define __NR_HPUX_oshmctl 164
176#define __NR_HPUX_shmat 165
177#define __NR_HPUX_shmdt 166
178#define __NR_HPUX_m68020_advise 167
179/* [168,189] are for Discless/DUX */
180#define __NR_HPUX_csp 168
181#define __NR_HPUX_cluster 169
182#define __NR_HPUX_mkrnod 170
183#define __NR_HPUX_test 171
184#define __NR_HPUX_unsp_open 172
185#define __NR_HPUX_reserved4 173
186#define __NR_HPUX_getcontext_old 174
187#define __NR_HPUX_osetcontext 175
188#define __NR_HPUX_bigio 176
189#define __NR_HPUX_pipenode 177
190#define __NR_HPUX_lsync 178
191#define __NR_HPUX_getmachineid 179
192#define __NR_HPUX_cnodeid 180
193#define __NR_HPUX_cnodes 181
194#define __NR_HPUX_swapclients 182
195#define __NR_HPUX_rmt_process 183
196#define __NR_HPUX_dskless_stats 184
197#define __NR_HPUX_sigprocmask 185
198#define __NR_HPUX_sigpending 186
199#define __NR_HPUX_sigsuspend 187
200#define __NR_HPUX_sigaction 188
201#define __NR_HPUX_reserved5 189
202#define __NR_HPUX_nfssvc 190
203#define __NR_HPUX_getfh 191
204#define __NR_HPUX_getdomainname 192
205#define __NR_HPUX_setdomainname 193
206#define __NR_HPUX_async_daemon 194
207#define __NR_HPUX_getdirentries 195
208#define __NR_HPUX_statfs 196
209#define __NR_HPUX_fstatfs 197
210#define __NR_HPUX_vfsmount 198
211#define __NR_HPUX_reserved6 199
212#define __NR_HPUX_waitpid 200
213/* 201 - 223 missing */
214#define __NR_HPUX_sigsetreturn 224
215#define __NR_HPUX_sigsetstatemask 225
216/* 226 missing */
217#define __NR_HPUX_cs 227
218#define __NR_HPUX_cds 228
219#define __NR_HPUX_set_no_trunc 229
220#define __NR_HPUX_pathconf 230
221#define __NR_HPUX_fpathconf 231
222/* 232, 233 missing */
223#define __NR_HPUX_nfs_fcntl 234
224#define __NR_HPUX_ogetacl 235
225#define __NR_HPUX_ofgetacl 236
226#define __NR_HPUX_osetacl 237
227#define __NR_HPUX_ofsetacl 238
228#define __NR_HPUX_pstat 239
229#define __NR_HPUX_getaudid 240
230#define __NR_HPUX_setaudid 241
231#define __NR_HPUX_getaudproc 242
232#define __NR_HPUX_setaudproc 243
233#define __NR_HPUX_getevent 244
234#define __NR_HPUX_setevent 245
235#define __NR_HPUX_audwrite 246
236#define __NR_HPUX_audswitch 247
237#define __NR_HPUX_audctl 248
238#define __NR_HPUX_ogetaccess 249
239#define __NR_HPUX_fsctl 250
240/* 251 - 258 missing */
241#define __NR_HPUX_swapfs 259
242#define __NR_HPUX_fss 260
243/* 261 - 266 missing */
244#define __NR_HPUX_tsync 267
245#define __NR_HPUX_getnumfds 268
246#define __NR_HPUX_poll 269
247#define __NR_HPUX_getmsg 270
248#define __NR_HPUX_putmsg 271
249#define __NR_HPUX_fchdir 272
250#define __NR_HPUX_getmount_cnt 273
251#define __NR_HPUX_getmount_entry 274
252#define __NR_HPUX_accept 275
253#define __NR_HPUX_bind 276
254#define __NR_HPUX_connect 277
255#define __NR_HPUX_getpeername 278
256#define __NR_HPUX_getsockname 279
257#define __NR_HPUX_getsockopt 280
258#define __NR_HPUX_listen 281
259#define __NR_HPUX_recv 282
260#define __NR_HPUX_recvfrom 283
261#define __NR_HPUX_recvmsg 284
262#define __NR_HPUX_send 285
263#define __NR_HPUX_sendmsg 286
264#define __NR_HPUX_sendto 287
265#define __NR_HPUX_setsockopt 288
266#define __NR_HPUX_shutdown 289
267#define __NR_HPUX_socket 290
268#define __NR_HPUX_socketpair 291
269#define __NR_HPUX_proc_open 292
270#define __NR_HPUX_proc_close 293
271#define __NR_HPUX_proc_send 294
272#define __NR_HPUX_proc_recv 295
273#define __NR_HPUX_proc_sendrecv 296
274#define __NR_HPUX_proc_syscall 297
275/* 298 - 311 missing */
276#define __NR_HPUX_semctl 312
277#define __NR_HPUX_msgctl 313
278#define __NR_HPUX_shmctl 314
279#define __NR_HPUX_mpctl 315
280#define __NR_HPUX_exportfs 316
281#define __NR_HPUX_getpmsg 317
282#define __NR_HPUX_putpmsg 318
283/* 319 missing */
284#define __NR_HPUX_msync 320
285#define __NR_HPUX_msleep 321
286#define __NR_HPUX_mwakeup 322
287#define __NR_HPUX_msem_init 323
288#define __NR_HPUX_msem_remove 324
289#define __NR_HPUX_adjtime 325
290#define __NR_HPUX_kload 326
291#define __NR_HPUX_fattach 327
292#define __NR_HPUX_fdetach 328
293#define __NR_HPUX_serialize 329
294#define __NR_HPUX_statvfs 330
295#define __NR_HPUX_fstatvfs 331
296#define __NR_HPUX_lchown 332
297#define __NR_HPUX_getsid 333
298#define __NR_HPUX_sysfs 334
299/* 335, 336 missing */
300#define __NR_HPUX_sched_setparam 337
301#define __NR_HPUX_sched_getparam 338
302#define __NR_HPUX_sched_setscheduler 339
303#define __NR_HPUX_sched_getscheduler 340
304#define __NR_HPUX_sched_yield 341
305#define __NR_HPUX_sched_get_priority_max 342
306#define __NR_HPUX_sched_get_priority_min 343
307#define __NR_HPUX_sched_rr_get_interval 344
308#define __NR_HPUX_clock_settime 345
309#define __NR_HPUX_clock_gettime 346
310#define __NR_HPUX_clock_getres 347
311#define __NR_HPUX_timer_create 348
312#define __NR_HPUX_timer_delete 349
313#define __NR_HPUX_timer_settime 350
314#define __NR_HPUX_timer_gettime 351
315#define __NR_HPUX_timer_getoverrun 352
316#define __NR_HPUX_nanosleep 353
317#define __NR_HPUX_toolbox 354
318/* 355 missing */
319#define __NR_HPUX_getdents 356
320#define __NR_HPUX_getcontext 357
321#define __NR_HPUX_sysinfo 358
322#define __NR_HPUX_fcntl64 359
323#define __NR_HPUX_ftruncate64 360
324#define __NR_HPUX_fstat64 361
325#define __NR_HPUX_getdirentries64 362
326#define __NR_HPUX_getrlimit64 363
327#define __NR_HPUX_lockf64 364
328#define __NR_HPUX_lseek64 365
329#define __NR_HPUX_lstat64 366
330#define __NR_HPUX_mmap64 367
331#define __NR_HPUX_setrlimit64 368
332#define __NR_HPUX_stat64 369
333#define __NR_HPUX_truncate64 370
334#define __NR_HPUX_ulimit64 371
335#define __NR_HPUX_pread 372
336#define __NR_HPUX_preadv 373
337#define __NR_HPUX_pwrite 374
338#define __NR_HPUX_pwritev 375
339#define __NR_HPUX_pread64 376
340#define __NR_HPUX_preadv64 377
341#define __NR_HPUX_pwrite64 378
342#define __NR_HPUX_pwritev64 379
343#define __NR_HPUX_setcontext 380
344#define __NR_HPUX_sigaltstack 381
345#define __NR_HPUX_waitid 382
346#define __NR_HPUX_setpgrp 383
347#define __NR_HPUX_recvmsg2 384
348#define __NR_HPUX_sendmsg2 385
349#define __NR_HPUX_socket2 386
350#define __NR_HPUX_socketpair2 387
351#define __NR_HPUX_setregid 388
352#define __NR_HPUX_lwp_create 389
353#define __NR_HPUX_lwp_terminate 390
354#define __NR_HPUX_lwp_wait 391
355#define __NR_HPUX_lwp_suspend 392
356#define __NR_HPUX_lwp_resume 393
357/* 394 missing */
358#define __NR_HPUX_lwp_abort_syscall 395
359#define __NR_HPUX_lwp_info 396
360#define __NR_HPUX_lwp_kill 397
361#define __NR_HPUX_ksleep 398
362#define __NR_HPUX_kwakeup 399
363/* 400 missing */
364#define __NR_HPUX_pstat_getlwp 401
365#define __NR_HPUX_lwp_exit 402
366#define __NR_HPUX_lwp_continue 403
367#define __NR_HPUX_getacl 404
368#define __NR_HPUX_fgetacl 405
369#define __NR_HPUX_setacl 406
370#define __NR_HPUX_fsetacl 407
371#define __NR_HPUX_getaccess 408
372#define __NR_HPUX_lwp_mutex_init 409
373#define __NR_HPUX_lwp_mutex_lock_sys 410
374#define __NR_HPUX_lwp_mutex_unlock 411
375#define __NR_HPUX_lwp_cond_init 412
376#define __NR_HPUX_lwp_cond_signal 413
377#define __NR_HPUX_lwp_cond_broadcast 414
378#define __NR_HPUX_lwp_cond_wait_sys 415
379#define __NR_HPUX_lwp_getscheduler 416
380#define __NR_HPUX_lwp_setscheduler 417
381#define __NR_HPUX_lwp_getstate 418
382#define __NR_HPUX_lwp_setstate 419
383#define __NR_HPUX_lwp_detach 420
384#define __NR_HPUX_mlock 421
385#define __NR_HPUX_munlock 422
386#define __NR_HPUX_mlockall 423
387#define __NR_HPUX_munlockall 424
388#define __NR_HPUX_shm_open 425
389#define __NR_HPUX_shm_unlink 426
390#define __NR_HPUX_sigqueue 427
391#define __NR_HPUX_sigwaitinfo 428
392#define __NR_HPUX_sigtimedwait 429
393#define __NR_HPUX_sigwait 430
394#define __NR_HPUX_aio_read 431
395#define __NR_HPUX_aio_write 432
396#define __NR_HPUX_lio_listio 433
397#define __NR_HPUX_aio_error 434
398#define __NR_HPUX_aio_return 435
399#define __NR_HPUX_aio_cancel 436
400#define __NR_HPUX_aio_suspend 437
401#define __NR_HPUX_aio_fsync 438
402#define __NR_HPUX_mq_open 439
403#define __NR_HPUX_mq_close 440
404#define __NR_HPUX_mq_unlink 441
405#define __NR_HPUX_mq_send 442
406#define __NR_HPUX_mq_receive 443
407#define __NR_HPUX_mq_notify 444
408#define __NR_HPUX_mq_setattr 445
409#define __NR_HPUX_mq_getattr 446
410#define __NR_HPUX_ksem_open 447
411#define __NR_HPUX_ksem_unlink 448
412#define __NR_HPUX_ksem_close 449
413#define __NR_HPUX_ksem_post 450
414#define __NR_HPUX_ksem_wait 451
415#define __NR_HPUX_ksem_read 452
416#define __NR_HPUX_ksem_trywait 453
417#define __NR_HPUX_lwp_rwlock_init 454
418#define __NR_HPUX_lwp_rwlock_destroy 455
419#define __NR_HPUX_lwp_rwlock_rdlock_sys 456
420#define __NR_HPUX_lwp_rwlock_wrlock_sys 457
421#define __NR_HPUX_lwp_rwlock_tryrdlock 458
422#define __NR_HPUX_lwp_rwlock_trywrlock 459
423#define __NR_HPUX_lwp_rwlock_unlock 460
424#define __NR_HPUX_ttrace 461
425#define __NR_HPUX_ttrace_wait 462
426#define __NR_HPUX_lf_wire_mem 463
427#define __NR_HPUX_lf_unwire_mem 464
428#define __NR_HPUX_lf_send_pin_map 465
429#define __NR_HPUX_lf_free_buf 466
430#define __NR_HPUX_lf_wait_nq 467
431#define __NR_HPUX_lf_wakeup_conn_q 468
432#define __NR_HPUX_lf_unused 469
433#define __NR_HPUX_lwp_sema_init 470
434#define __NR_HPUX_lwp_sema_post 471
435#define __NR_HPUX_lwp_sema_wait 472
436#define __NR_HPUX_lwp_sema_trywait 473
437#define __NR_HPUX_lwp_sema_destroy 474
438#define __NR_HPUX_statvfs64 475
439#define __NR_HPUX_fstatvfs64 476
440#define __NR_HPUX_msh_register 477
441#define __NR_HPUX_ptrace64 478
442#define __NR_HPUX_sendfile 479
443#define __NR_HPUX_sendpath 480
444#define __NR_HPUX_sendfile64 481
445#define __NR_HPUX_sendpath64 482
446#define __NR_HPUX_modload 483
447#define __NR_HPUX_moduload 484
448#define __NR_HPUX_modpath 485
449#define __NR_HPUX_getksym 486
450#define __NR_HPUX_modadm 487
451#define __NR_HPUX_modstat 488
452#define __NR_HPUX_lwp_detached_exit 489
453#define __NR_HPUX_crashconf 490
454#define __NR_HPUX_siginhibit 491
455#define __NR_HPUX_sigenable 492
456#define __NR_HPUX_spuctl 493
457#define __NR_HPUX_zerokernelsum 494
458#define __NR_HPUX_nfs_kstat 495
459#define __NR_HPUX_aio_read64 496
460#define __NR_HPUX_aio_write64 497
461#define __NR_HPUX_aio_error64 498
462#define __NR_HPUX_aio_return64 499
463#define __NR_HPUX_aio_cancel64 500
464#define __NR_HPUX_aio_suspend64 501
465#define __NR_HPUX_aio_fsync64 502
466#define __NR_HPUX_lio_listio64 503
467#define __NR_HPUX_recv2 504
468#define __NR_HPUX_recvfrom2 505
469#define __NR_HPUX_send2 506
470#define __NR_HPUX_sendto2 507
471#define __NR_HPUX_acl 508
472#define __NR_HPUX___cnx_p2p_ctl 509
473#define __NR_HPUX___cnx_gsched_ctl 510
474#define __NR_HPUX___cnx_pmon_ctl 511
475
476#define __NR_HPUX_syscalls 512
477
478/*
479 * Linux system call numbers.
480 *
481 * Cary Coutant says that we should just use another syscall gateway
482 * page to avoid clashing with the HPUX space, and I think he's right:
483 * it will would keep a branch out of our syscall entry path, at the
484 * very least. If we decide to change it later, we can ``just'' tweak
485 * the LINUX_GATEWAY_ADDR define at the bottom and make __NR_Linux be
486 * 1024 or something. Oh, and recompile libc. =)
487 *
488 * 64-bit HPUX binaries get the syscall gateway address passed in a register
489 * from the kernel at startup, which seems a sane strategy.
490 */
491
492#define __NR_Linux 0
493#define __NR_restart_syscall (__NR_Linux + 0)
494#define __NR_exit (__NR_Linux + 1)
495#define __NR_fork (__NR_Linux + 2)
496#define __NR_read (__NR_Linux + 3)
497#define __NR_write (__NR_Linux + 4)
498#define __NR_open (__NR_Linux + 5)
499#define __NR_close (__NR_Linux + 6)
500#define __NR_waitpid (__NR_Linux + 7)
501#define __NR_creat (__NR_Linux + 8)
502#define __NR_link (__NR_Linux + 9)
503#define __NR_unlink (__NR_Linux + 10)
504#define __NR_execve (__NR_Linux + 11)
505#define __NR_chdir (__NR_Linux + 12)
506#define __NR_time (__NR_Linux + 13)
507#define __NR_mknod (__NR_Linux + 14)
508#define __NR_chmod (__NR_Linux + 15)
509#define __NR_lchown (__NR_Linux + 16)
510#define __NR_socket (__NR_Linux + 17)
511#define __NR_stat (__NR_Linux + 18)
512#define __NR_lseek (__NR_Linux + 19)
513#define __NR_getpid (__NR_Linux + 20)
514#define __NR_mount (__NR_Linux + 21)
515#define __NR_bind (__NR_Linux + 22)
516#define __NR_setuid (__NR_Linux + 23)
517#define __NR_getuid (__NR_Linux + 24)
518#define __NR_stime (__NR_Linux + 25)
519#define __NR_ptrace (__NR_Linux + 26)
520#define __NR_alarm (__NR_Linux + 27)
521#define __NR_fstat (__NR_Linux + 28)
522#define __NR_pause (__NR_Linux + 29)
523#define __NR_utime (__NR_Linux + 30)
524#define __NR_connect (__NR_Linux + 31)
525#define __NR_listen (__NR_Linux + 32)
526#define __NR_access (__NR_Linux + 33)
527#define __NR_nice (__NR_Linux + 34)
528#define __NR_accept (__NR_Linux + 35)
529#define __NR_sync (__NR_Linux + 36)
530#define __NR_kill (__NR_Linux + 37)
531#define __NR_rename (__NR_Linux + 38)
532#define __NR_mkdir (__NR_Linux + 39)
533#define __NR_rmdir (__NR_Linux + 40)
534#define __NR_dup (__NR_Linux + 41)
535#define __NR_pipe (__NR_Linux + 42)
536#define __NR_times (__NR_Linux + 43)
537#define __NR_getsockname (__NR_Linux + 44)
538#define __NR_brk (__NR_Linux + 45)
539#define __NR_setgid (__NR_Linux + 46)
540#define __NR_getgid (__NR_Linux + 47)
541#define __NR_signal (__NR_Linux + 48)
542#define __NR_geteuid (__NR_Linux + 49)
543#define __NR_getegid (__NR_Linux + 50)
544#define __NR_acct (__NR_Linux + 51)
545#define __NR_umount2 (__NR_Linux + 52)
546#define __NR_getpeername (__NR_Linux + 53)
547#define __NR_ioctl (__NR_Linux + 54)
548#define __NR_fcntl (__NR_Linux + 55)
549#define __NR_socketpair (__NR_Linux + 56)
550#define __NR_setpgid (__NR_Linux + 57)
551#define __NR_send (__NR_Linux + 58)
552#define __NR_uname (__NR_Linux + 59)
553#define __NR_umask (__NR_Linux + 60)
554#define __NR_chroot (__NR_Linux + 61)
555#define __NR_ustat (__NR_Linux + 62)
556#define __NR_dup2 (__NR_Linux + 63)
557#define __NR_getppid (__NR_Linux + 64)
558#define __NR_getpgrp (__NR_Linux + 65)
559#define __NR_setsid (__NR_Linux + 66)
560#define __NR_pivot_root (__NR_Linux + 67)
561#define __NR_sgetmask (__NR_Linux + 68)
562#define __NR_ssetmask (__NR_Linux + 69)
563#define __NR_setreuid (__NR_Linux + 70)
564#define __NR_setregid (__NR_Linux + 71)
565#define __NR_mincore (__NR_Linux + 72)
566#define __NR_sigpending (__NR_Linux + 73)
567#define __NR_sethostname (__NR_Linux + 74)
568#define __NR_setrlimit (__NR_Linux + 75)
569#define __NR_getrlimit (__NR_Linux + 76)
570#define __NR_getrusage (__NR_Linux + 77)
571#define __NR_gettimeofday (__NR_Linux + 78)
572#define __NR_settimeofday (__NR_Linux + 79)
573#define __NR_getgroups (__NR_Linux + 80)
574#define __NR_setgroups (__NR_Linux + 81)
575#define __NR_sendto (__NR_Linux + 82)
576#define __NR_symlink (__NR_Linux + 83)
577#define __NR_lstat (__NR_Linux + 84)
578#define __NR_readlink (__NR_Linux + 85)
579#define __NR_uselib (__NR_Linux + 86)
580#define __NR_swapon (__NR_Linux + 87)
581#define __NR_reboot (__NR_Linux + 88)
582#define __NR_mmap2 (__NR_Linux + 89)
583#define __NR_mmap (__NR_Linux + 90)
584#define __NR_munmap (__NR_Linux + 91)
585#define __NR_truncate (__NR_Linux + 92)
586#define __NR_ftruncate (__NR_Linux + 93)
587#define __NR_fchmod (__NR_Linux + 94)
588#define __NR_fchown (__NR_Linux + 95)
589#define __NR_getpriority (__NR_Linux + 96)
590#define __NR_setpriority (__NR_Linux + 97)
591#define __NR_recv (__NR_Linux + 98)
592#define __NR_statfs (__NR_Linux + 99)
593#define __NR_fstatfs (__NR_Linux + 100)
594#define __NR_stat64 (__NR_Linux + 101)
595/* #define __NR_socketcall (__NR_Linux + 102) */
596#define __NR_syslog (__NR_Linux + 103)
597#define __NR_setitimer (__NR_Linux + 104)
598#define __NR_getitimer (__NR_Linux + 105)
599#define __NR_capget (__NR_Linux + 106)
600#define __NR_capset (__NR_Linux + 107)
601#define __NR_pread64 (__NR_Linux + 108)
602#define __NR_pwrite64 (__NR_Linux + 109)
603#define __NR_getcwd (__NR_Linux + 110)
604#define __NR_vhangup (__NR_Linux + 111)
605#define __NR_fstat64 (__NR_Linux + 112)
606#define __NR_vfork (__NR_Linux + 113)
607#define __NR_wait4 (__NR_Linux + 114)
608#define __NR_swapoff (__NR_Linux + 115)
609#define __NR_sysinfo (__NR_Linux + 116)
610#define __NR_shutdown (__NR_Linux + 117)
611#define __NR_fsync (__NR_Linux + 118)
612#define __NR_madvise (__NR_Linux + 119)
613#define __NR_clone (__NR_Linux + 120)
614#define __NR_setdomainname (__NR_Linux + 121)
615#define __NR_sendfile (__NR_Linux + 122)
616#define __NR_recvfrom (__NR_Linux + 123)
617#define __NR_adjtimex (__NR_Linux + 124)
618#define __NR_mprotect (__NR_Linux + 125)
619#define __NR_sigprocmask (__NR_Linux + 126)
620#define __NR_create_module (__NR_Linux + 127)
621#define __NR_init_module (__NR_Linux + 128)
622#define __NR_delete_module (__NR_Linux + 129)
623#define __NR_get_kernel_syms (__NR_Linux + 130)
624#define __NR_quotactl (__NR_Linux + 131)
625#define __NR_getpgid (__NR_Linux + 132)
626#define __NR_fchdir (__NR_Linux + 133)
627#define __NR_bdflush (__NR_Linux + 134)
628#define __NR_sysfs (__NR_Linux + 135)
629#define __NR_personality (__NR_Linux + 136)
630#define __NR_afs_syscall (__NR_Linux + 137) /* Syscall for Andrew File System */
631#define __NR_setfsuid (__NR_Linux + 138)
632#define __NR_setfsgid (__NR_Linux + 139)
633#define __NR__llseek (__NR_Linux + 140)
634#define __NR_getdents (__NR_Linux + 141)
635#define __NR__newselect (__NR_Linux + 142)
636#define __NR_flock (__NR_Linux + 143)
637#define __NR_msync (__NR_Linux + 144)
638#define __NR_readv (__NR_Linux + 145)
639#define __NR_writev (__NR_Linux + 146)
640#define __NR_getsid (__NR_Linux + 147)
641#define __NR_fdatasync (__NR_Linux + 148)
642#define __NR__sysctl (__NR_Linux + 149)
643#define __NR_mlock (__NR_Linux + 150)
644#define __NR_munlock (__NR_Linux + 151)
645#define __NR_mlockall (__NR_Linux + 152)
646#define __NR_munlockall (__NR_Linux + 153)
647#define __NR_sched_setparam (__NR_Linux + 154)
648#define __NR_sched_getparam (__NR_Linux + 155)
649#define __NR_sched_setscheduler (__NR_Linux + 156)
650#define __NR_sched_getscheduler (__NR_Linux + 157)
651#define __NR_sched_yield (__NR_Linux + 158)
652#define __NR_sched_get_priority_max (__NR_Linux + 159)
653#define __NR_sched_get_priority_min (__NR_Linux + 160)
654#define __NR_sched_rr_get_interval (__NR_Linux + 161)
655#define __NR_nanosleep (__NR_Linux + 162)
656#define __NR_mremap (__NR_Linux + 163)
657#define __NR_setresuid (__NR_Linux + 164)
658#define __NR_getresuid (__NR_Linux + 165)
659#define __NR_sigaltstack (__NR_Linux + 166)
660#define __NR_query_module (__NR_Linux + 167)
661#define __NR_poll (__NR_Linux + 168)
662#define __NR_nfsservctl (__NR_Linux + 169)
663#define __NR_setresgid (__NR_Linux + 170)
664#define __NR_getresgid (__NR_Linux + 171)
665#define __NR_prctl (__NR_Linux + 172)
666#define __NR_rt_sigreturn (__NR_Linux + 173)
667#define __NR_rt_sigaction (__NR_Linux + 174)
668#define __NR_rt_sigprocmask (__NR_Linux + 175)
669#define __NR_rt_sigpending (__NR_Linux + 176)
670#define __NR_rt_sigtimedwait (__NR_Linux + 177)
671#define __NR_rt_sigqueueinfo (__NR_Linux + 178)
672#define __NR_rt_sigsuspend (__NR_Linux + 179)
673#define __NR_chown (__NR_Linux + 180)
674#define __NR_setsockopt (__NR_Linux + 181)
675#define __NR_getsockopt (__NR_Linux + 182)
676#define __NR_sendmsg (__NR_Linux + 183)
677#define __NR_recvmsg (__NR_Linux + 184)
678#define __NR_semop (__NR_Linux + 185)
679#define __NR_semget (__NR_Linux + 186)
680#define __NR_semctl (__NR_Linux + 187)
681#define __NR_msgsnd (__NR_Linux + 188)
682#define __NR_msgrcv (__NR_Linux + 189)
683#define __NR_msgget (__NR_Linux + 190)
684#define __NR_msgctl (__NR_Linux + 191)
685#define __NR_shmat (__NR_Linux + 192)
686#define __NR_shmdt (__NR_Linux + 193)
687#define __NR_shmget (__NR_Linux + 194)
688#define __NR_shmctl (__NR_Linux + 195)
689
690#define __NR_getpmsg (__NR_Linux + 196) /* Somebody *wants* streams? */
691#define __NR_putpmsg (__NR_Linux + 197)
692
693#define __NR_lstat64 (__NR_Linux + 198)
694#define __NR_truncate64 (__NR_Linux + 199)
695#define __NR_ftruncate64 (__NR_Linux + 200)
696#define __NR_getdents64 (__NR_Linux + 201)
697#define __NR_fcntl64 (__NR_Linux + 202)
698#define __NR_attrctl (__NR_Linux + 203)
699#define __NR_acl_get (__NR_Linux + 204)
700#define __NR_acl_set (__NR_Linux + 205)
701#define __NR_gettid (__NR_Linux + 206)
702#define __NR_readahead (__NR_Linux + 207)
703#define __NR_tkill (__NR_Linux + 208)
704#define __NR_sendfile64 (__NR_Linux + 209)
705#define __NR_futex (__NR_Linux + 210)
706#define __NR_sched_setaffinity (__NR_Linux + 211)
707#define __NR_sched_getaffinity (__NR_Linux + 212)
708#define __NR_set_thread_area (__NR_Linux + 213)
709#define __NR_get_thread_area (__NR_Linux + 214)
710#define __NR_io_setup (__NR_Linux + 215)
711#define __NR_io_destroy (__NR_Linux + 216)
712#define __NR_io_getevents (__NR_Linux + 217)
713#define __NR_io_submit (__NR_Linux + 218)
714#define __NR_io_cancel (__NR_Linux + 219)
715#define __NR_alloc_hugepages (__NR_Linux + 220)
716#define __NR_free_hugepages (__NR_Linux + 221)
717#define __NR_exit_group (__NR_Linux + 222)
718#define __NR_lookup_dcookie (__NR_Linux + 223)
719#define __NR_epoll_create (__NR_Linux + 224)
720#define __NR_epoll_ctl (__NR_Linux + 225)
721#define __NR_epoll_wait (__NR_Linux + 226)
722#define __NR_remap_file_pages (__NR_Linux + 227)
723#define __NR_semtimedop (__NR_Linux + 228)
724#define __NR_mq_open (__NR_Linux + 229)
725#define __NR_mq_unlink (__NR_Linux + 230)
726#define __NR_mq_timedsend (__NR_Linux + 231)
727#define __NR_mq_timedreceive (__NR_Linux + 232)
728#define __NR_mq_notify (__NR_Linux + 233)
729#define __NR_mq_getsetattr (__NR_Linux + 234)
730#define __NR_waitid (__NR_Linux + 235)
731#define __NR_fadvise64_64 (__NR_Linux + 236)
732#define __NR_set_tid_address (__NR_Linux + 237)
733#define __NR_setxattr (__NR_Linux + 238)
734#define __NR_lsetxattr (__NR_Linux + 239)
735#define __NR_fsetxattr (__NR_Linux + 240)
736#define __NR_getxattr (__NR_Linux + 241)
737#define __NR_lgetxattr (__NR_Linux + 242)
738#define __NR_fgetxattr (__NR_Linux + 243)
739#define __NR_listxattr (__NR_Linux + 244)
740#define __NR_llistxattr (__NR_Linux + 245)
741#define __NR_flistxattr (__NR_Linux + 246)
742#define __NR_removexattr (__NR_Linux + 247)
743#define __NR_lremovexattr (__NR_Linux + 248)
744#define __NR_fremovexattr (__NR_Linux + 249)
745#define __NR_timer_create (__NR_Linux + 250)
746#define __NR_timer_settime (__NR_Linux + 251)
747#define __NR_timer_gettime (__NR_Linux + 252)
748#define __NR_timer_getoverrun (__NR_Linux + 253)
749#define __NR_timer_delete (__NR_Linux + 254)
750#define __NR_clock_settime (__NR_Linux + 255)
751#define __NR_clock_gettime (__NR_Linux + 256)
752#define __NR_clock_getres (__NR_Linux + 257)
753#define __NR_clock_nanosleep (__NR_Linux + 258)
754#define __NR_tgkill (__NR_Linux + 259)
755#define __NR_mbind (__NR_Linux + 260)
756#define __NR_get_mempolicy (__NR_Linux + 261)
757#define __NR_set_mempolicy (__NR_Linux + 262)
758#define __NR_vserver (__NR_Linux + 263)
759#define __NR_add_key (__NR_Linux + 264)
760#define __NR_request_key (__NR_Linux + 265)
761#define __NR_keyctl (__NR_Linux + 266)
762#define __NR_ioprio_set (__NR_Linux + 267)
763#define __NR_ioprio_get (__NR_Linux + 268)
764#define __NR_inotify_init (__NR_Linux + 269)
765#define __NR_inotify_add_watch (__NR_Linux + 270)
766#define __NR_inotify_rm_watch (__NR_Linux + 271)
767#define __NR_migrate_pages (__NR_Linux + 272)
768#define __NR_pselect6 (__NR_Linux + 273)
769#define __NR_ppoll (__NR_Linux + 274)
770#define __NR_openat (__NR_Linux + 275)
771#define __NR_mkdirat (__NR_Linux + 276)
772#define __NR_mknodat (__NR_Linux + 277)
773#define __NR_fchownat (__NR_Linux + 278)
774#define __NR_futimesat (__NR_Linux + 279)
775#define __NR_fstatat64 (__NR_Linux + 280)
776#define __NR_unlinkat (__NR_Linux + 281)
777#define __NR_renameat (__NR_Linux + 282)
778#define __NR_linkat (__NR_Linux + 283)
779#define __NR_symlinkat (__NR_Linux + 284)
780#define __NR_readlinkat (__NR_Linux + 285)
781#define __NR_fchmodat (__NR_Linux + 286)
782#define __NR_faccessat (__NR_Linux + 287)
783#define __NR_unshare (__NR_Linux + 288)
784#define __NR_set_robust_list (__NR_Linux + 289)
785#define __NR_get_robust_list (__NR_Linux + 290)
786#define __NR_splice (__NR_Linux + 291)
787#define __NR_sync_file_range (__NR_Linux + 292)
788#define __NR_tee (__NR_Linux + 293)
789#define __NR_vmsplice (__NR_Linux + 294)
790#define __NR_move_pages (__NR_Linux + 295)
791#define __NR_getcpu (__NR_Linux + 296)
792#define __NR_epoll_pwait (__NR_Linux + 297)
793#define __NR_statfs64 (__NR_Linux + 298)
794#define __NR_fstatfs64 (__NR_Linux + 299)
795#define __NR_kexec_load (__NR_Linux + 300)
796#define __NR_utimensat (__NR_Linux + 301)
797#define __NR_signalfd (__NR_Linux + 302)
798#define __NR_timerfd (__NR_Linux + 303)
799#define __NR_eventfd (__NR_Linux + 304)
800#define __NR_fallocate (__NR_Linux + 305)
801#define __NR_timerfd_create (__NR_Linux + 306)
802#define __NR_timerfd_settime (__NR_Linux + 307)
803#define __NR_timerfd_gettime (__NR_Linux + 308)
804#define __NR_signalfd4 (__NR_Linux + 309)
805#define __NR_eventfd2 (__NR_Linux + 310)
806#define __NR_epoll_create1 (__NR_Linux + 311)
807#define __NR_dup3 (__NR_Linux + 312)
808#define __NR_pipe2 (__NR_Linux + 313)
809#define __NR_inotify_init1 (__NR_Linux + 314)
810
811#define __NR_Linux_syscalls (__NR_inotify_init1 + 1)
812
813
814#define __IGNORE_select /* newselect */
815#define __IGNORE_fadvise64 /* fadvise64_64 */
816#define __IGNORE_utimes /* utime */
817
818
819#define HPUX_GATEWAY_ADDR 0xC0000004
820#define LINUX_GATEWAY_ADDR 0x100
821
822#ifdef __KERNEL__
823#ifndef __ASSEMBLY__
824
825#define SYS_ify(syscall_name) __NR_##syscall_name
826
827#ifndef ASM_LINE_SEP
828# define ASM_LINE_SEP ;
829#endif
830
831/* Definition taken from glibc 2.3.3
832 * sysdeps/unix/sysv/linux/hppa/sysdep.h
833 */
834
835#ifdef PIC
836/* WARNING: CANNOT BE USED IN A NOP! */
837# define K_STW_ASM_PIC " copy %%r19, %%r4\n"
838# define K_LDW_ASM_PIC " copy %%r4, %%r19\n"
839# define K_USING_GR4 "%r4",
840#else
841# define K_STW_ASM_PIC " \n"
842# define K_LDW_ASM_PIC " \n"
843# define K_USING_GR4
844#endif
845
846/* GCC has to be warned that a syscall may clobber all the ABI
847 registers listed as "caller-saves", see page 8, Table 2
848 in section 2.2.6 of the PA-RISC RUN-TIME architecture
849 document. However! r28 is the result and will conflict with
850 the clobber list so it is left out. Also the input arguments
851 registers r20 -> r26 will conflict with the list so they
852 are treated specially. Although r19 is clobbered by the syscall
853 we cannot say this because it would violate ABI, thus we say
854 r4 is clobbered and use that register to save/restore r19
855 across the syscall. */
856
857#define K_CALL_CLOB_REGS "%r1", "%r2", K_USING_GR4 \
858 "%r20", "%r29", "%r31"
859
860#undef K_INLINE_SYSCALL
861#define K_INLINE_SYSCALL(name, nr, args...) ({ \
862 long __sys_res; \
863 { \
864 register unsigned long __res __asm__("r28"); \
865 K_LOAD_ARGS_##nr(args) \
866 /* FIXME: HACK stw/ldw r19 around syscall */ \
867 __asm__ volatile( \
868 K_STW_ASM_PIC \
869 " ble 0x100(%%sr2, %%r0)\n" \
870 " ldi %1, %%r20\n" \
871 K_LDW_ASM_PIC \
872 : "=r" (__res) \
873 : "i" (SYS_ify(name)) K_ASM_ARGS_##nr \
874 : "memory", K_CALL_CLOB_REGS K_CLOB_ARGS_##nr \
875 ); \
876 __sys_res = (long)__res; \
877 } \
878 if ( (unsigned long)__sys_res >= (unsigned long)-4095 ){ \
879 errno = -__sys_res; \
880 __sys_res = -1; \
881 } \
882 __sys_res; \
883})
884
885#define K_LOAD_ARGS_0()
886#define K_LOAD_ARGS_1(r26) \
887 register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \
888 K_LOAD_ARGS_0()
889#define K_LOAD_ARGS_2(r26,r25) \
890 register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
891 K_LOAD_ARGS_1(r26)
892#define K_LOAD_ARGS_3(r26,r25,r24) \
893 register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
894 K_LOAD_ARGS_2(r26,r25)
895#define K_LOAD_ARGS_4(r26,r25,r24,r23) \
896 register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \
897 K_LOAD_ARGS_3(r26,r25,r24)
898#define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
899 register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \
900 K_LOAD_ARGS_4(r26,r25,r24,r23)
901#define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
902 register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \
903 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
904
905/* Even with zero args we use r20 for the syscall number */
906#define K_ASM_ARGS_0
907#define K_ASM_ARGS_1 K_ASM_ARGS_0, "r" (__r26)
908#define K_ASM_ARGS_2 K_ASM_ARGS_1, "r" (__r25)
909#define K_ASM_ARGS_3 K_ASM_ARGS_2, "r" (__r24)
910#define K_ASM_ARGS_4 K_ASM_ARGS_3, "r" (__r23)
911#define K_ASM_ARGS_5 K_ASM_ARGS_4, "r" (__r22)
912#define K_ASM_ARGS_6 K_ASM_ARGS_5, "r" (__r21)
913
914/* The registers not listed as inputs but clobbered */
915#define K_CLOB_ARGS_6
916#define K_CLOB_ARGS_5 K_CLOB_ARGS_6, "%r21"
917#define K_CLOB_ARGS_4 K_CLOB_ARGS_5, "%r22"
918#define K_CLOB_ARGS_3 K_CLOB_ARGS_4, "%r23"
919#define K_CLOB_ARGS_2 K_CLOB_ARGS_3, "%r24"
920#define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
921#define K_CLOB_ARGS_0 K_CLOB_ARGS_1, "%r26"
922
923#define _syscall0(type,name) \
924type name(void) \
925{ \
926 return K_INLINE_SYSCALL(name, 0); \
927}
928
929#define _syscall1(type,name,type1,arg1) \
930type name(type1 arg1) \
931{ \
932 return K_INLINE_SYSCALL(name, 1, arg1); \
933}
934
935#define _syscall2(type,name,type1,arg1,type2,arg2) \
936type name(type1 arg1, type2 arg2) \
937{ \
938 return K_INLINE_SYSCALL(name, 2, arg1, arg2); \
939}
940
941#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
942type name(type1 arg1, type2 arg2, type3 arg3) \
943{ \
944 return K_INLINE_SYSCALL(name, 3, arg1, arg2, arg3); \
945}
946
947#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
948type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
949{ \
950 return K_INLINE_SYSCALL(name, 4, arg1, arg2, arg3, arg4); \
951}
952
953/* select takes 5 arguments */
954#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
955type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
956{ \
957 return K_INLINE_SYSCALL(name, 5, arg1, arg2, arg3, arg4, arg5); \
958}
959
960#define __ARCH_WANT_OLD_READDIR
961#define __ARCH_WANT_STAT64
962#define __ARCH_WANT_SYS_ALARM
963#define __ARCH_WANT_SYS_GETHOSTNAME
964#define __ARCH_WANT_SYS_PAUSE
965#define __ARCH_WANT_SYS_SGETMASK
966#define __ARCH_WANT_SYS_SIGNAL
967#define __ARCH_WANT_SYS_TIME
968#define __ARCH_WANT_COMPAT_SYS_TIME
969#define __ARCH_WANT_SYS_UTIME
970#define __ARCH_WANT_SYS_WAITPID
971#define __ARCH_WANT_SYS_SOCKETCALL
972#define __ARCH_WANT_SYS_FADVISE64
973#define __ARCH_WANT_SYS_GETPGRP
974#define __ARCH_WANT_SYS_LLSEEK
975#define __ARCH_WANT_SYS_NICE
976#define __ARCH_WANT_SYS_OLD_GETRLIMIT
977#define __ARCH_WANT_SYS_OLDUMOUNT
978#define __ARCH_WANT_SYS_SIGPENDING
979#define __ARCH_WANT_SYS_SIGPROCMASK
980#define __ARCH_WANT_SYS_RT_SIGACTION
981#define __ARCH_WANT_SYS_RT_SIGSUSPEND
982#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND
983
984#endif /* __ASSEMBLY__ */
985
986#undef STR
987
988/*
989 * "Conditional" syscalls
990 *
991 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
992 * but it doesn't work on all toolchains, so we just do it by hand
993 */
994#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
995
996#endif /* __KERNEL__ */
997#endif /* _ASM_PARISC_UNISTD_H_ */
diff --git a/arch/parisc/include/asm/unwind.h b/arch/parisc/include/asm/unwind.h
new file mode 100644
index 000000000000..52482e4fc20d
--- /dev/null
+++ b/arch/parisc/include/asm/unwind.h
@@ -0,0 +1,79 @@
1#ifndef _UNWIND_H_
2#define _UNWIND_H_
3
4#include <linux/list.h>
5
6/* From ABI specifications */
7struct unwind_table_entry {
8 unsigned int region_start;
9 unsigned int region_end;
10 unsigned int Cannot_unwind:1; /* 0 */
11 unsigned int Millicode:1; /* 1 */
12 unsigned int Millicode_save_sr0:1; /* 2 */
13 unsigned int Region_description:2; /* 3..4 */
14 unsigned int reserved1:1; /* 5 */
15 unsigned int Entry_SR:1; /* 6 */
16 unsigned int Entry_FR:4; /* number saved *//* 7..10 */
17 unsigned int Entry_GR:5; /* number saved *//* 11..15 */
18 unsigned int Args_stored:1; /* 16 */
19 unsigned int Variable_Frame:1; /* 17 */
20 unsigned int Separate_Package_Body:1; /* 18 */
21 unsigned int Frame_Extension_Millicode:1; /* 19 */
22 unsigned int Stack_Overflow_Check:1; /* 20 */
23 unsigned int Two_Instruction_SP_Increment:1; /* 21 */
24 unsigned int Ada_Region:1; /* 22 */
25 unsigned int cxx_info:1; /* 23 */
26 unsigned int cxx_try_catch:1; /* 24 */
27 unsigned int sched_entry_seq:1; /* 25 */
28 unsigned int reserved2:1; /* 26 */
29 unsigned int Save_SP:1; /* 27 */
30 unsigned int Save_RP:1; /* 28 */
31 unsigned int Save_MRP_in_frame:1; /* 29 */
32 unsigned int extn_ptr_defined:1; /* 30 */
33 unsigned int Cleanup_defined:1; /* 31 */
34
35 unsigned int MPE_XL_interrupt_marker:1; /* 0 */
36 unsigned int HP_UX_interrupt_marker:1; /* 1 */
37 unsigned int Large_frame:1; /* 2 */
38 unsigned int Pseudo_SP_Set:1; /* 3 */
39 unsigned int reserved4:1; /* 4 */
40 unsigned int Total_frame_size:27; /* 5..31 */
41};
42
43struct unwind_table {
44 struct list_head list;
45 const char *name;
46 unsigned long gp;
47 unsigned long base_addr;
48 unsigned long start;
49 unsigned long end;
50 const struct unwind_table_entry *table;
51 unsigned long length;
52};
53
54struct unwind_frame_info {
55 struct task_struct *t;
56 /* Eventually we would like to be able to get at any of the registers
57 available; but for now we only try to get the sp and ip for each
58 frame */
59 /* struct pt_regs regs; */
60 unsigned long sp, ip, rp, r31;
61 unsigned long prev_sp, prev_ip;
62};
63
64struct unwind_table *
65unwind_table_add(const char *name, unsigned long base_addr,
66 unsigned long gp, void *start, void *end);
67void
68unwind_table_remove(struct unwind_table *table);
69
70void unwind_frame_init(struct unwind_frame_info *info, struct task_struct *t,
71 struct pt_regs *regs);
72void unwind_frame_init_from_blocked_task(struct unwind_frame_info *info, struct task_struct *t);
73void unwind_frame_init_running(struct unwind_frame_info *info, struct pt_regs *regs);
74int unwind_once(struct unwind_frame_info *info);
75int unwind_to_user(struct unwind_frame_info *info);
76
77int unwind_init(void);
78
79#endif
diff --git a/arch/parisc/include/asm/user.h b/arch/parisc/include/asm/user.h
new file mode 100644
index 000000000000..80224753e508
--- /dev/null
+++ b/arch/parisc/include/asm/user.h
@@ -0,0 +1,5 @@
1/* This file should not exist, but lots of generic code still includes
2 it. It's a hangover from old a.out days and the traditional core
3 dump format. We are ELF-only, and so are our core dumps. If we
4 need to support HP/UX core format then we'll do it here
5 eventually. */
diff --git a/arch/parisc/include/asm/vga.h b/arch/parisc/include/asm/vga.h
new file mode 100644
index 000000000000..171399a88ca6
--- /dev/null
+++ b/arch/parisc/include/asm/vga.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_PARISC_VGA_H__
2#define __ASM_PARISC_VGA_H__
3
4/* nothing */
5
6#endif /* __ASM_PARISC_VGA_H__ */
diff --git a/arch/parisc/include/asm/xor.h b/arch/parisc/include/asm/xor.h
new file mode 100644
index 000000000000..c82eb12a5b18
--- /dev/null
+++ b/arch/parisc/include/asm/xor.h
@@ -0,0 +1 @@
#include <asm-generic/xor.h>
diff --git a/arch/parisc/kernel/.gitignore b/arch/parisc/kernel/.gitignore
new file mode 100644
index 000000000000..c5f676c3c224
--- /dev/null
+++ b/arch/parisc/kernel/.gitignore
@@ -0,0 +1 @@
vmlinux.lds
diff --git a/arch/parisc/kernel/asm-offsets.c b/arch/parisc/kernel/asm-offsets.c
index 3efc0b73e4ff..699cf8ef2118 100644
--- a/arch/parisc/kernel/asm-offsets.c
+++ b/arch/parisc/kernel/asm-offsets.c
@@ -290,5 +290,8 @@ int main(void)
290 DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip)); 290 DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip));
291 DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space)); 291 DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space));
292 DEFINE(EXCDATA_ADDR, offsetof(struct exception_data, fault_addr)); 292 DEFINE(EXCDATA_ADDR, offsetof(struct exception_data, fault_addr));
293 BLANK();
294 DEFINE(ASM_PDC_RESULT_SIZE, NUM_PDC_RESULT * sizeof(unsigned long));
295 BLANK();
293 return 0; 296 return 0;
294} 297}
diff --git a/arch/parisc/kernel/firmware.c b/arch/parisc/kernel/firmware.c
index 7177a6cd1b7f..03f26bd75bd8 100644
--- a/arch/parisc/kernel/firmware.c
+++ b/arch/parisc/kernel/firmware.c
@@ -71,8 +71,8 @@
71#include <asm/processor.h> /* for boot_cpu_data */ 71#include <asm/processor.h> /* for boot_cpu_data */
72 72
73static DEFINE_SPINLOCK(pdc_lock); 73static DEFINE_SPINLOCK(pdc_lock);
74static unsigned long pdc_result[32] __attribute__ ((aligned (8))); 74extern unsigned long pdc_result[NUM_PDC_RESULT];
75static unsigned long pdc_result2[32] __attribute__ ((aligned (8))); 75extern unsigned long pdc_result2[NUM_PDC_RESULT];
76 76
77#ifdef CONFIG_64BIT 77#ifdef CONFIG_64BIT
78#define WIDE_FIRMWARE 0x1 78#define WIDE_FIRMWARE 0x1
@@ -150,26 +150,40 @@ static void convert_to_wide(unsigned long *addr)
150#endif 150#endif
151} 151}
152 152
153#ifdef CONFIG_64BIT
154void __init set_firmware_width_unlocked(void)
155{
156 int ret;
157
158 ret = mem_pdc_call(PDC_MODEL, PDC_MODEL_CAPABILITIES,
159 __pa(pdc_result), 0);
160 convert_to_wide(pdc_result);
161 if (pdc_result[0] != NARROW_FIRMWARE)
162 parisc_narrow_firmware = 0;
163}
164
153/** 165/**
154 * set_firmware_width - Determine if the firmware is wide or narrow. 166 * set_firmware_width - Determine if the firmware is wide or narrow.
155 * 167 *
156 * This function must be called before any pdc_* function that uses the convert_to_wide 168 * This function must be called before any pdc_* function that uses the
157 * function. 169 * convert_to_wide function.
158 */ 170 */
159void __init set_firmware_width(void) 171void __init set_firmware_width(void)
160{ 172{
161#ifdef CONFIG_64BIT
162 int retval;
163 unsigned long flags; 173 unsigned long flags;
174 spin_lock_irqsave(&pdc_lock, flags);
175 set_firmware_width_unlocked();
176 spin_unlock_irqrestore(&pdc_lock, flags);
177}
178#else
179void __init set_firmware_width_unlocked(void) {
180 return;
181}
164 182
165 spin_lock_irqsave(&pdc_lock, flags); 183void __init set_firmware_width(void) {
166 retval = mem_pdc_call(PDC_MODEL, PDC_MODEL_CAPABILITIES, __pa(pdc_result), 0); 184 return;
167 convert_to_wide(pdc_result);
168 if(pdc_result[0] != NARROW_FIRMWARE)
169 parisc_narrow_firmware = 0;
170 spin_unlock_irqrestore(&pdc_lock, flags);
171#endif
172} 185}
186#endif /*CONFIG_64BIT*/
173 187
174/** 188/**
175 * pdc_emergency_unlock - Unlock the linux pdc lock 189 * pdc_emergency_unlock - Unlock the linux pdc lock
@@ -288,6 +302,20 @@ int pdc_chassis_warn(unsigned long *warn)
288 return retval; 302 return retval;
289} 303}
290 304
305int __init pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info)
306{
307 int ret;
308
309 ret = mem_pdc_call(PDC_COPROC, PDC_COPROC_CFG, __pa(pdc_result));
310 convert_to_wide(pdc_result);
311 pdc_coproc_info->ccr_functional = pdc_result[0];
312 pdc_coproc_info->ccr_present = pdc_result[1];
313 pdc_coproc_info->revision = pdc_result[17];
314 pdc_coproc_info->model = pdc_result[18];
315
316 return ret;
317}
318
291/** 319/**
292 * pdc_coproc_cfg - To identify coprocessors attached to the processor. 320 * pdc_coproc_cfg - To identify coprocessors attached to the processor.
293 * @pdc_coproc_info: Return buffer address. 321 * @pdc_coproc_info: Return buffer address.
@@ -297,19 +325,14 @@ int pdc_chassis_warn(unsigned long *warn)
297 */ 325 */
298int __init pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info) 326int __init pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
299{ 327{
300 int retval; 328 int ret;
301 unsigned long flags; 329 unsigned long flags;
302 330
303 spin_lock_irqsave(&pdc_lock, flags); 331 spin_lock_irqsave(&pdc_lock, flags);
304 retval = mem_pdc_call(PDC_COPROC, PDC_COPROC_CFG, __pa(pdc_result)); 332 ret = pdc_coproc_cfg_unlocked(pdc_coproc_info);
305 convert_to_wide(pdc_result); 333 spin_unlock_irqrestore(&pdc_lock, flags);
306 pdc_coproc_info->ccr_functional = pdc_result[0];
307 pdc_coproc_info->ccr_present = pdc_result[1];
308 pdc_coproc_info->revision = pdc_result[17];
309 pdc_coproc_info->model = pdc_result[18];
310 spin_unlock_irqrestore(&pdc_lock, flags);
311 334
312 return retval; 335 return ret;
313} 336}
314 337
315/** 338/**
diff --git a/arch/parisc/kernel/head.S b/arch/parisc/kernel/head.S
index a84e31e82876..0e3d9f9b9e33 100644
--- a/arch/parisc/kernel/head.S
+++ b/arch/parisc/kernel/head.S
@@ -121,7 +121,7 @@ $pgt_fill_loop:
121 copy %r0,%r2 121 copy %r0,%r2
122 122
123 /* And the RFI Target address too */ 123 /* And the RFI Target address too */
124 load32 start_kernel,%r11 124 load32 start_parisc,%r11
125 125
126 /* And the initial task pointer */ 126 /* And the initial task pointer */
127 load32 init_thread_union,%r6 127 load32 init_thread_union,%r6
diff --git a/arch/parisc/kernel/ptrace.c b/arch/parisc/kernel/ptrace.c
index 49c637970789..90904f9dfc50 100644
--- a/arch/parisc/kernel/ptrace.c
+++ b/arch/parisc/kernel/ptrace.c
@@ -4,6 +4,7 @@
4 * Copyright (C) 2000 Hewlett-Packard Co, Linuxcare Inc. 4 * Copyright (C) 2000 Hewlett-Packard Co, Linuxcare Inc.
5 * Copyright (C) 2000 Matthew Wilcox <matthew@wil.cx> 5 * Copyright (C) 2000 Matthew Wilcox <matthew@wil.cx>
6 * Copyright (C) 2000 David Huggins-Daines <dhd@debian.org> 6 * Copyright (C) 2000 David Huggins-Daines <dhd@debian.org>
7 * Copyright (C) 2008 Helge Deller <deller@gmx.de>
7 */ 8 */
8 9
9#include <linux/kernel.h> 10#include <linux/kernel.h>
@@ -27,15 +28,149 @@
27/* PSW bits we allow the debugger to modify */ 28/* PSW bits we allow the debugger to modify */
28#define USER_PSW_BITS (PSW_N | PSW_V | PSW_CB) 29#define USER_PSW_BITS (PSW_N | PSW_V | PSW_CB)
29 30
30#undef DEBUG_PTRACE 31/*
32 * Called by kernel/ptrace.c when detaching..
33 *
34 * Make sure single step bits etc are not set.
35 */
36void ptrace_disable(struct task_struct *task)
37{
38 task->ptrace &= ~(PT_SINGLESTEP|PT_BLOCKSTEP);
31 39
32#ifdef DEBUG_PTRACE 40 /* make sure the trap bits are not set */
33#define DBG(x...) printk(x) 41 pa_psw(task)->r = 0;
34#else 42 pa_psw(task)->t = 0;
35#define DBG(x...) 43 pa_psw(task)->h = 0;
36#endif 44 pa_psw(task)->l = 0;
45}
46
47/*
48 * The following functions are called by ptrace_resume() when
49 * enabling or disabling single/block tracing.
50 */
51void user_disable_single_step(struct task_struct *task)
52{
53 ptrace_disable(task);
54}
55
56void user_enable_single_step(struct task_struct *task)
57{
58 task->ptrace &= ~PT_BLOCKSTEP;
59 task->ptrace |= PT_SINGLESTEP;
60
61 if (pa_psw(task)->n) {
62 struct siginfo si;
63
64 /* Nullified, just crank over the queue. */
65 task_regs(task)->iaoq[0] = task_regs(task)->iaoq[1];
66 task_regs(task)->iasq[0] = task_regs(task)->iasq[1];
67 task_regs(task)->iaoq[1] = task_regs(task)->iaoq[0] + 4;
68 pa_psw(task)->n = 0;
69 pa_psw(task)->x = 0;
70 pa_psw(task)->y = 0;
71 pa_psw(task)->z = 0;
72 pa_psw(task)->b = 0;
73 ptrace_disable(task);
74 /* Don't wake up the task, but let the
75 parent know something happened. */
76 si.si_code = TRAP_TRACE;
77 si.si_addr = (void __user *) (task_regs(task)->iaoq[0] & ~3);
78 si.si_signo = SIGTRAP;
79 si.si_errno = 0;
80 force_sig_info(SIGTRAP, &si, task);
81 /* notify_parent(task, SIGCHLD); */
82 return;
83 }
84
85 /* Enable recovery counter traps. The recovery counter
86 * itself will be set to zero on a task switch. If the
87 * task is suspended on a syscall then the syscall return
88 * path will overwrite the recovery counter with a suitable
89 * value such that it traps once back in user space. We
90 * disable interrupts in the tasks PSW here also, to avoid
91 * interrupts while the recovery counter is decrementing.
92 */
93 pa_psw(task)->r = 1;
94 pa_psw(task)->t = 0;
95 pa_psw(task)->h = 0;
96 pa_psw(task)->l = 0;
97}
98
99void user_enable_block_step(struct task_struct *task)
100{
101 task->ptrace &= ~PT_SINGLESTEP;
102 task->ptrace |= PT_BLOCKSTEP;
103
104 /* Enable taken branch trap. */
105 pa_psw(task)->r = 0;
106 pa_psw(task)->t = 1;
107 pa_psw(task)->h = 0;
108 pa_psw(task)->l = 0;
109}
110
111long arch_ptrace(struct task_struct *child, long request, long addr, long data)
112{
113 unsigned long tmp;
114 long ret = -EIO;
37 115
38#ifdef CONFIG_64BIT 116 switch (request) {
117
118 /* Read the word at location addr in the USER area. For ptraced
119 processes, the kernel saves all regs on a syscall. */
120 case PTRACE_PEEKUSR:
121 if ((addr & (sizeof(long)-1)) ||
122 (unsigned long) addr >= sizeof(struct pt_regs))
123 break;
124 tmp = *(unsigned long *) ((char *) task_regs(child) + addr);
125 ret = put_user(tmp, (unsigned long *) data);
126 break;
127
128 /* Write the word at location addr in the USER area. This will need
129 to change when the kernel no longer saves all regs on a syscall.
130 FIXME. There is a problem at the moment in that r3-r18 are only
131 saved if the process is ptraced on syscall entry, and even then
132 those values are overwritten by actual register values on syscall
133 exit. */
134 case PTRACE_POKEUSR:
135 /* Some register values written here may be ignored in
136 * entry.S:syscall_restore_rfi; e.g. iaoq is written with
137 * r31/r31+4, and not with the values in pt_regs.
138 */
139 if (addr == PT_PSW) {
140 /* Allow writing to Nullify, Divide-step-correction,
141 * and carry/borrow bits.
142 * BEWARE, if you set N, and then single step, it won't
143 * stop on the nullified instruction.
144 */
145 data &= USER_PSW_BITS;
146 task_regs(child)->gr[0] &= ~USER_PSW_BITS;
147 task_regs(child)->gr[0] |= data;
148 ret = 0;
149 break;
150 }
151
152 if ((addr & (sizeof(long)-1)) ||
153 (unsigned long) addr >= sizeof(struct pt_regs))
154 break;
155 if ((addr >= PT_GR1 && addr <= PT_GR31) ||
156 addr == PT_IAOQ0 || addr == PT_IAOQ1 ||
157 (addr >= PT_FR0 && addr <= PT_FR31 + 4) ||
158 addr == PT_SAR) {
159 *(unsigned long *) ((char *) task_regs(child) + addr) = data;
160 ret = 0;
161 }
162 break;
163
164 default:
165 ret = ptrace_request(child, request, addr, data);
166 break;
167 }
168
169 return ret;
170}
171
172
173#ifdef CONFIG_COMPAT
39 174
40/* This function is needed to translate 32 bit pt_regs offsets in to 175/* This function is needed to translate 32 bit pt_regs offsets in to
41 * 64 bit pt_regs offsets. For example, a 32 bit gdb under a 64 bit kernel 176 * 64 bit pt_regs offsets. For example, a 32 bit gdb under a 64 bit kernel
@@ -61,106 +196,25 @@ static long translate_usr_offset(long offset)
61 else 196 else
62 return -1; 197 return -1;
63} 198}
64#endif
65 199
66/* 200long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
67 * Called by kernel/ptrace.c when detaching.. 201 compat_ulong_t addr, compat_ulong_t data)
68 *
69 * Make sure single step bits etc are not set.
70 */
71void ptrace_disable(struct task_struct *child)
72{ 202{
73 /* make sure the trap bits are not set */ 203 compat_uint_t tmp;
74 pa_psw(child)->r = 0; 204 long ret = -EIO;
75 pa_psw(child)->t = 0;
76 pa_psw(child)->h = 0;
77 pa_psw(child)->l = 0;
78}
79
80long arch_ptrace(struct task_struct *child, long request, long addr, long data)
81{
82 long ret;
83#ifdef DEBUG_PTRACE
84 long oaddr=addr, odata=data;
85#endif
86 205
87 switch (request) { 206 switch (request) {
88 case PTRACE_PEEKTEXT: /* read word at location addr. */
89 case PTRACE_PEEKDATA: {
90#ifdef CONFIG_64BIT
91 if (__is_compat_task(child)) {
92 int copied;
93 unsigned int tmp;
94
95 addr &= 0xffffffffL;
96 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
97 ret = -EIO;
98 if (copied != sizeof(tmp))
99 goto out_tsk;
100 ret = put_user(tmp,(unsigned int *) data);
101 DBG("sys_ptrace(PEEK%s, %d, %lx, %lx) returning %ld, data %x\n",
102 request == PTRACE_PEEKTEXT ? "TEXT" : "DATA",
103 pid, oaddr, odata, ret, tmp);
104 }
105 else
106#endif
107 ret = generic_ptrace_peekdata(child, addr, data);
108 goto out_tsk;
109 }
110 207
111 /* when I and D space are separate, this will have to be fixed. */ 208 case PTRACE_PEEKUSR:
112 case PTRACE_POKETEXT: /* write the word at location addr. */ 209 if (addr & (sizeof(compat_uint_t)-1))
113 case PTRACE_POKEDATA: 210 break;
114 ret = 0; 211 addr = translate_usr_offset(addr);
115#ifdef CONFIG_64BIT 212 if (addr < 0)
116 if (__is_compat_task(child)) { 213 break;
117 unsigned int tmp = (unsigned int)data;
118 DBG("sys_ptrace(POKE%s, %d, %lx, %lx)\n",
119 request == PTRACE_POKETEXT ? "TEXT" : "DATA",
120 pid, oaddr, odata);
121 addr &= 0xffffffffL;
122 if (access_process_vm(child, addr, &tmp, sizeof(tmp), 1) == sizeof(tmp))
123 goto out_tsk;
124 }
125 else
126#endif
127 {
128 if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
129 goto out_tsk;
130 }
131 ret = -EIO;
132 goto out_tsk;
133
134 /* Read the word at location addr in the USER area. For ptraced
135 processes, the kernel saves all regs on a syscall. */
136 case PTRACE_PEEKUSR: {
137 ret = -EIO;
138#ifdef CONFIG_64BIT
139 if (__is_compat_task(child)) {
140 unsigned int tmp;
141
142 if (addr & (sizeof(int)-1))
143 goto out_tsk;
144 if ((addr = translate_usr_offset(addr)) < 0)
145 goto out_tsk;
146
147 tmp = *(unsigned int *) ((char *) task_regs(child) + addr);
148 ret = put_user(tmp, (unsigned int *) data);
149 DBG("sys_ptrace(PEEKUSR, %d, %lx, %lx) returning %ld, addr %lx, data %x\n",
150 pid, oaddr, odata, ret, addr, tmp);
151 }
152 else
153#endif
154 {
155 unsigned long tmp;
156 214
157 if ((addr & (sizeof(long)-1)) || (unsigned long) addr >= sizeof(struct pt_regs)) 215 tmp = *(compat_uint_t *) ((char *) task_regs(child) + addr);
158 goto out_tsk; 216 ret = put_user(tmp, (compat_uint_t *) (unsigned long) data);
159 tmp = *(unsigned long *) ((char *) task_regs(child) + addr); 217 break;
160 ret = put_user(tmp, (unsigned long *) data);
161 }
162 goto out_tsk;
163 }
164 218
165 /* Write the word at location addr in the USER area. This will need 219 /* Write the word at location addr in the USER area. This will need
166 to change when the kernel no longer saves all regs on a syscall. 220 to change when the kernel no longer saves all regs on a syscall.
@@ -169,185 +223,46 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
169 those values are overwritten by actual register values on syscall 223 those values are overwritten by actual register values on syscall
170 exit. */ 224 exit. */
171 case PTRACE_POKEUSR: 225 case PTRACE_POKEUSR:
172 ret = -EIO;
173 /* Some register values written here may be ignored in 226 /* Some register values written here may be ignored in
174 * entry.S:syscall_restore_rfi; e.g. iaoq is written with 227 * entry.S:syscall_restore_rfi; e.g. iaoq is written with
175 * r31/r31+4, and not with the values in pt_regs. 228 * r31/r31+4, and not with the values in pt_regs.
176 */ 229 */
177 /* PT_PSW=0, so this is valid for 32 bit processes under 64
178 * bit kernels.
179 */
180 if (addr == PT_PSW) { 230 if (addr == PT_PSW) {
181 /* PT_PSW=0, so this is valid for 32 bit processes 231 /* Since PT_PSW==0, it is valid for 32 bit processes
182 * under 64 bit kernels. 232 * under 64 bit kernels as well.
183 *
184 * Allow writing to Nullify, Divide-step-correction,
185 * and carry/borrow bits.
186 * BEWARE, if you set N, and then single step, it won't
187 * stop on the nullified instruction.
188 */ 233 */
189 DBG("sys_ptrace(POKEUSR, %d, %lx, %lx)\n", 234 ret = arch_ptrace(child, request, addr, data);
190 pid, oaddr, odata); 235 } else {
191 data &= USER_PSW_BITS; 236 if (addr & (sizeof(compat_uint_t)-1))
192 task_regs(child)->gr[0] &= ~USER_PSW_BITS; 237 break;
193 task_regs(child)->gr[0] |= data; 238 addr = translate_usr_offset(addr);
194 ret = 0; 239 if (addr < 0)
195 goto out_tsk; 240 break;
196 }
197#ifdef CONFIG_64BIT
198 if (__is_compat_task(child)) {
199 if (addr & (sizeof(int)-1))
200 goto out_tsk;
201 if ((addr = translate_usr_offset(addr)) < 0)
202 goto out_tsk;
203 DBG("sys_ptrace(POKEUSR, %d, %lx, %lx) addr %lx\n",
204 pid, oaddr, odata, addr);
205 if (addr >= PT_FR0 && addr <= PT_FR31 + 4) { 241 if (addr >= PT_FR0 && addr <= PT_FR31 + 4) {
206 /* Special case, fp regs are 64 bits anyway */ 242 /* Special case, fp regs are 64 bits anyway */
207 *(unsigned int *) ((char *) task_regs(child) + addr) = data; 243 *(__u64 *) ((char *) task_regs(child) + addr) = data;
208 ret = 0; 244 ret = 0;
209 } 245 }
210 else if ((addr >= PT_GR1+4 && addr <= PT_GR31+4) || 246 else if ((addr >= PT_GR1+4 && addr <= PT_GR31+4) ||
211 addr == PT_IAOQ0+4 || addr == PT_IAOQ1+4 || 247 addr == PT_IAOQ0+4 || addr == PT_IAOQ1+4 ||
212 addr == PT_SAR+4) { 248 addr == PT_SAR+4) {
213 /* Zero the top 32 bits */ 249 /* Zero the top 32 bits */
214 *(unsigned int *) ((char *) task_regs(child) + addr - 4) = 0; 250 *(__u32 *) ((char *) task_regs(child) + addr - 4) = 0;
215 *(unsigned int *) ((char *) task_regs(child) + addr) = data; 251 *(__u32 *) ((char *) task_regs(child) + addr) = data;
216 ret = 0; 252 ret = 0;
217 } 253 }
218 goto out_tsk;
219 } 254 }
220 else 255 break;
221#endif
222 {
223 if ((addr & (sizeof(long)-1)) || (unsigned long) addr >= sizeof(struct pt_regs))
224 goto out_tsk;
225 if ((addr >= PT_GR1 && addr <= PT_GR31) ||
226 addr == PT_IAOQ0 || addr == PT_IAOQ1 ||
227 (addr >= PT_FR0 && addr <= PT_FR31 + 4) ||
228 addr == PT_SAR) {
229 *(unsigned long *) ((char *) task_regs(child) + addr) = data;
230 ret = 0;
231 }
232 goto out_tsk;
233 }
234
235 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
236 case PTRACE_CONT:
237 ret = -EIO;
238 DBG("sys_ptrace(%s)\n",
239 request == PTRACE_SYSCALL ? "SYSCALL" : "CONT");
240 if (!valid_signal(data))
241 goto out_tsk;
242 child->ptrace &= ~(PT_SINGLESTEP|PT_BLOCKSTEP);
243 if (request == PTRACE_SYSCALL) {
244 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
245 } else {
246 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
247 }
248 child->exit_code = data;
249 goto out_wake_notrap;
250
251 case PTRACE_KILL:
252 /*
253 * make the child exit. Best I can do is send it a
254 * sigkill. perhaps it should be put in the status
255 * that it wants to exit.
256 */
257 ret = 0;
258 DBG("sys_ptrace(KILL)\n");
259 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
260 goto out_tsk;
261 child->exit_code = SIGKILL;
262 goto out_wake_notrap;
263
264 case PTRACE_SINGLEBLOCK:
265 DBG("sys_ptrace(SINGLEBLOCK)\n");
266 ret = -EIO;
267 if (!valid_signal(data))
268 goto out_tsk;
269 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
270 child->ptrace &= ~PT_SINGLESTEP;
271 child->ptrace |= PT_BLOCKSTEP;
272 child->exit_code = data;
273
274 /* Enable taken branch trap. */
275 pa_psw(child)->r = 0;
276 pa_psw(child)->t = 1;
277 pa_psw(child)->h = 0;
278 pa_psw(child)->l = 0;
279 goto out_wake;
280
281 case PTRACE_SINGLESTEP:
282 DBG("sys_ptrace(SINGLESTEP)\n");
283 ret = -EIO;
284 if (!valid_signal(data))
285 goto out_tsk;
286
287 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
288 child->ptrace &= ~PT_BLOCKSTEP;
289 child->ptrace |= PT_SINGLESTEP;
290 child->exit_code = data;
291
292 if (pa_psw(child)->n) {
293 struct siginfo si;
294
295 /* Nullified, just crank over the queue. */
296 task_regs(child)->iaoq[0] = task_regs(child)->iaoq[1];
297 task_regs(child)->iasq[0] = task_regs(child)->iasq[1];
298 task_regs(child)->iaoq[1] = task_regs(child)->iaoq[0] + 4;
299 pa_psw(child)->n = 0;
300 pa_psw(child)->x = 0;
301 pa_psw(child)->y = 0;
302 pa_psw(child)->z = 0;
303 pa_psw(child)->b = 0;
304 ptrace_disable(child);
305 /* Don't wake up the child, but let the
306 parent know something happened. */
307 si.si_code = TRAP_TRACE;
308 si.si_addr = (void __user *) (task_regs(child)->iaoq[0] & ~3);
309 si.si_signo = SIGTRAP;
310 si.si_errno = 0;
311 force_sig_info(SIGTRAP, &si, child);
312 //notify_parent(child, SIGCHLD);
313 //ret = 0;
314 goto out_wake;
315 }
316
317 /* Enable recovery counter traps. The recovery counter
318 * itself will be set to zero on a task switch. If the
319 * task is suspended on a syscall then the syscall return
320 * path will overwrite the recovery counter with a suitable
321 * value such that it traps once back in user space. We
322 * disable interrupts in the childs PSW here also, to avoid
323 * interrupts while the recovery counter is decrementing.
324 */
325 pa_psw(child)->r = 1;
326 pa_psw(child)->t = 0;
327 pa_psw(child)->h = 0;
328 pa_psw(child)->l = 0;
329 /* give it a chance to run. */
330 goto out_wake;
331
332 case PTRACE_GETEVENTMSG:
333 ret = put_user(child->ptrace_message, (unsigned int __user *) data);
334 goto out_tsk;
335 256
336 default: 257 default:
337 ret = ptrace_request(child, request, addr, data); 258 ret = compat_ptrace_request(child, request, addr, data);
338 goto out_tsk; 259 break;
339 } 260 }
340 261
341out_wake_notrap:
342 ptrace_disable(child);
343out_wake:
344 wake_up_process(child);
345 ret = 0;
346out_tsk:
347 DBG("arch_ptrace(%ld, %d, %lx, %lx) returning %ld\n",
348 request, pid, oaddr, odata, ret);
349 return ret; 262 return ret;
350} 263}
264#endif
265
351 266
352void syscall_trace(void) 267void syscall_trace(void)
353{ 268{
diff --git a/arch/parisc/kernel/real2.S b/arch/parisc/kernel/real2.S
index 7a92695d95a6..5f3d3a1f9037 100644
--- a/arch/parisc/kernel/real2.S
+++ b/arch/parisc/kernel/real2.S
@@ -8,12 +8,24 @@
8 * 8 *
9 */ 9 */
10 10
11#include <asm/pdc.h>
11#include <asm/psw.h> 12#include <asm/psw.h>
12#include <asm/assembly.h> 13#include <asm/assembly.h>
14#include <asm/asm-offsets.h>
13 15
14#include <linux/linkage.h> 16#include <linux/linkage.h>
15 17
18
16 .section .bss 19 .section .bss
20
21 .export pdc_result
22 .export pdc_result2
23 .align 8
24pdc_result:
25 .block ASM_PDC_RESULT_SIZE
26pdc_result2:
27 .block ASM_PDC_RESULT_SIZE
28
17 .export real_stack 29 .export real_stack
18 .export real32_stack 30 .export real32_stack
19 .export real64_stack 31 .export real64_stack
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c
index 39e7c5a5946a..7d27853ff8c8 100644
--- a/arch/parisc/kernel/setup.c
+++ b/arch/parisc/kernel/setup.c
@@ -44,6 +44,7 @@
44#include <asm/pdc_chassis.h> 44#include <asm/pdc_chassis.h>
45#include <asm/io.h> 45#include <asm/io.h>
46#include <asm/setup.h> 46#include <asm/setup.h>
47#include <asm/unwind.h>
47 48
48static char __initdata command_line[COMMAND_LINE_SIZE]; 49static char __initdata command_line[COMMAND_LINE_SIZE];
49 50
@@ -123,6 +124,7 @@ void __init setup_arch(char **cmdline_p)
123#ifdef CONFIG_64BIT 124#ifdef CONFIG_64BIT
124 extern int parisc_narrow_firmware; 125 extern int parisc_narrow_firmware;
125#endif 126#endif
127 unwind_init();
126 128
127 init_per_cpu(smp_processor_id()); /* Set Modes & Enable FP */ 129 init_per_cpu(smp_processor_id()); /* Set Modes & Enable FP */
128 130
@@ -368,6 +370,31 @@ static int __init parisc_init(void)
368 370
369 return 0; 371 return 0;
370} 372}
371
372arch_initcall(parisc_init); 373arch_initcall(parisc_init);
373 374
375void start_parisc(void)
376{
377 extern void start_kernel(void);
378
379 int ret, cpunum;
380 struct pdc_coproc_cfg coproc_cfg;
381
382 cpunum = smp_processor_id();
383
384 set_firmware_width_unlocked();
385
386 ret = pdc_coproc_cfg_unlocked(&coproc_cfg);
387 if (ret >= 0 && coproc_cfg.ccr_functional) {
388 mtctl(coproc_cfg.ccr_functional, 10);
389
390 cpu_data[cpunum].fp_rev = coproc_cfg.revision;
391 cpu_data[cpunum].fp_model = coproc_cfg.model;
392
393 asm volatile ("fstd %fr0,8(%sp)");
394 } else {
395 panic("must have an fpu to boot linux");
396 }
397
398 start_kernel();
399 // not reached
400}
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index c7e59f548817..303d2b647e41 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -87,7 +87,7 @@
87 ENTRY_SAME(setuid) 87 ENTRY_SAME(setuid)
88 ENTRY_SAME(getuid) 88 ENTRY_SAME(getuid)
89 ENTRY_COMP(stime) /* 25 */ 89 ENTRY_COMP(stime) /* 25 */
90 ENTRY_SAME(ptrace) 90 ENTRY_COMP(ptrace)
91 ENTRY_SAME(alarm) 91 ENTRY_SAME(alarm)
92 /* see stat comment */ 92 /* see stat comment */
93 ENTRY_COMP(newfstat) 93 ENTRY_COMP(newfstat)
@@ -407,6 +407,12 @@
407 ENTRY_SAME(timerfd_create) 407 ENTRY_SAME(timerfd_create)
408 ENTRY_COMP(timerfd_settime) 408 ENTRY_COMP(timerfd_settime)
409 ENTRY_COMP(timerfd_gettime) 409 ENTRY_COMP(timerfd_gettime)
410 ENTRY_COMP(signalfd4)
411 ENTRY_SAME(eventfd2) /* 310 */
412 ENTRY_SAME(epoll_create1)
413 ENTRY_SAME(dup3)
414 ENTRY_SAME(pipe2)
415 ENTRY_SAME(inotify_init1)
410 416
411 /* Nothing yet */ 417 /* Nothing yet */
412 418
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c
index 24be86bba94d..4d09203bc693 100644
--- a/arch/parisc/kernel/time.c
+++ b/arch/parisc/kernel/time.c
@@ -23,6 +23,7 @@
23#include <linux/smp.h> 23#include <linux/smp.h>
24#include <linux/profile.h> 24#include <linux/profile.h>
25#include <linux/clocksource.h> 25#include <linux/clocksource.h>
26#include <linux/platform_device.h>
26 27
27#include <asm/uaccess.h> 28#include <asm/uaccess.h>
28#include <asm/io.h> 29#include <asm/io.h>
@@ -215,6 +216,24 @@ void __init start_cpu_itimer(void)
215 cpu_data[cpu].it_value = next_tick; 216 cpu_data[cpu].it_value = next_tick;
216} 217}
217 218
219struct platform_device rtc_parisc_dev = {
220 .name = "rtc-parisc",
221 .id = -1,
222};
223
224static int __init rtc_init(void)
225{
226 int ret;
227
228 ret = platform_device_register(&rtc_parisc_dev);
229 if (ret < 0)
230 printk(KERN_ERR "unable to register rtc device...\n");
231
232 /* not necessarily an error */
233 return 0;
234}
235module_init(rtc_init);
236
218void __init time_init(void) 237void __init time_init(void)
219{ 238{
220 static struct pdc_tod tod_data; 239 static struct pdc_tod tod_data;
@@ -245,4 +264,3 @@ void __init time_init(void)
245 xtime.tv_nsec = 0; 264 xtime.tv_nsec = 0;
246 } 265 }
247} 266}
248
diff --git a/arch/parisc/kernel/unwind.c b/arch/parisc/kernel/unwind.c
index 701b2d2d8882..6773c582e457 100644
--- a/arch/parisc/kernel/unwind.c
+++ b/arch/parisc/kernel/unwind.c
@@ -170,7 +170,7 @@ void unwind_table_remove(struct unwind_table *table)
170} 170}
171 171
172/* Called from setup_arch to import the kernel unwind info */ 172/* Called from setup_arch to import the kernel unwind info */
173static int unwind_init(void) 173int unwind_init(void)
174{ 174{
175 long start, stop; 175 long start, stop;
176 register unsigned long gp __asm__ ("r27"); 176 register unsigned long gp __asm__ ("r27");
@@ -417,5 +417,3 @@ int unwind_to_user(struct unwind_frame_info *info)
417 417
418 return ret; 418 return ret;
419} 419}
420
421module_init(unwind_init);