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authorGrant Grundler <grundler@parisc-linux.org>2005-10-21 22:55:51 -0400
committerKyle McMartin <kyle@parisc-linux.org>2005-10-21 22:55:51 -0400
commit9b3b331d0322b60de1bde20528bf974f62804ffa (patch)
tree6c9f07131f4985f8b48ccd198a88d6405fc43869 /arch/parisc
parent37318a3cb1028933417533084ddbf9d84be06878 (diff)
[PARISC] Properly specify index field to I/D cache flush ops
replace use of "0" with "%r0" since PA 1.1 I/D flush ops only take a general register and not an immediate value for the index field. This just forces the code to always be PA 1.1 "clean". From: Joel Soete <soete.joel@tiscali.be> Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch/parisc')
-rw-r--r--arch/parisc/kernel/pacache.S4
-rw-r--r--arch/parisc/kernel/signal.c11
2 files changed, 9 insertions, 6 deletions
diff --git a/arch/parisc/kernel/pacache.S b/arch/parisc/kernel/pacache.S
index e217ae369fbb..08cde5addfca 100644
--- a/arch/parisc/kernel/pacache.S
+++ b/arch/parisc/kernel/pacache.S
@@ -227,7 +227,7 @@ flush_instruction_cache_local:
227 227
228fimanyloop: /* Loop if LOOP >= 2 */ 228fimanyloop: /* Loop if LOOP >= 2 */
229 ADDIB> -1, %r31, fimanyloop /* Adjusted inner loop decr */ 229 ADDIB> -1, %r31, fimanyloop /* Adjusted inner loop decr */
230 fice 0(%sr1, %arg0) 230 fice %r0(%sr1, %arg0)
231 fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */ 231 fice,m %arg1(%sr1, %arg0) /* Last fice and addr adjust */
232 movb,tr %arg3, %r31, fimanyloop /* Re-init inner loop count */ 232 movb,tr %arg3, %r31, fimanyloop /* Re-init inner loop count */
233 ADDIB<=,n -1, %arg2, fisync /* Outer loop decr */ 233 ADDIB<=,n -1, %arg2, fisync /* Outer loop decr */
@@ -269,7 +269,7 @@ flush_data_cache_local:
269 269
270fdmanyloop: /* Loop if LOOP >= 2 */ 270fdmanyloop: /* Loop if LOOP >= 2 */
271 ADDIB> -1, %r31, fdmanyloop /* Adjusted inner loop decr */ 271 ADDIB> -1, %r31, fdmanyloop /* Adjusted inner loop decr */
272 fdce 0(%sr1, %arg0) 272 fdce %r0(%sr1, %arg0)
273 fdce,m %arg1(%sr1, %arg0) /* Last fdce and addr adjust */ 273 fdce,m %arg1(%sr1, %arg0) /* Last fdce and addr adjust */
274 movb,tr %arg3, %r31, fdmanyloop /* Re-init inner loop count */ 274 movb,tr %arg3, %r31, fdmanyloop /* Re-init inner loop count */
275 ADDIB<=,n -1, %arg2, fdsync /* Outer loop decr */ 275 ADDIB<=,n -1, %arg2, fdsync /* Outer loop decr */
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index befdfe700616..82c24e62ab63 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -625,11 +625,14 @@ do_signal(sigset_t *oldset, struct pt_regs *regs, int in_syscall)
625 put_user(0xe0008200, &usp[3]); 625 put_user(0xe0008200, &usp[3]);
626 put_user(0x34140000, &usp[4]); 626 put_user(0x34140000, &usp[4]);
627 627
628 /* Stack is 64-byte aligned, and we only 628 /* Stack is 64-byte aligned, and we only need
629 * need to flush 1 cache line */ 629 * to flush 1 cache line.
630 asm("fdc 0(%%sr3, %0)\n" 630 * Flushing one cacheline is cheap.
631 * "sync" on bigger (> 4 way) boxes is not.
632 */
633 asm("fdc %%r0(%%sr3, %0)\n"
631 "sync\n" 634 "sync\n"
632 "fic 0(%%sr3, %0)\n" 635 "fic %%r0(%%sr3, %0)\n"
633 "sync\n" 636 "sync\n"
634 : : "r"(regs->gr[30])); 637 : : "r"(regs->gr[30]));
635 638